Prosecution Insights
Last updated: August 17, 2026
Application No. 18/500,878

SEMICONDUCTOR DEVICE AND METHODS OF FORMATION

Non-Final OA §102§103§112
Filed
Nov 02, 2023
Priority
Aug 02, 2023 — provisional 63/517,274
Examiner
CHEN, YU
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
68%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allowance Rate
730 granted / 1074 resolved
At TC average
Strong +30% interview lift
Without
With
+29.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
88 currently pending
Career history
1181
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
45.9%
+5.9% vs TC avg
§102
23.6%
-16.4% vs TC avg
§112
22.8%
-17.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1074 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of invention Group I and Species II (FIG. 5), encompassing claims 1-13 and 21-27 in the reply filed on 6/3/2026 is acknowledged. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 27 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 27 reciting “a dielectric layer over the silicon carbide layer” renders the claim indefinite. It is unclear how does “a dielectric layer” is referring to one the “second plurality of dielectric layers over the silicon carbide layer” previously recited in claim 21. Or is “a dielectric layer” separate from the “second plurality of dielectric layers”. Other claims are rejected for depending on a rejected claim. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 5, 7-8, 21-22, 24-25, and 27 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kuang et al. US 2015/0108644 A1 (Kuang). PNG media_image1.png 782 976 media_image1.png Greyscale In re claim 1, Kuang discloses (e.g. FIG. 11) a semiconductor device, comprising: a device layer 104; an interconnect structure 106,108, above the device layer 104, comprising: a plurality of dielectric layers 108; and a plurality of metallization layers 106 included in the plurality of dielectric layers 108; and a bonding region 110,114,116,118,120, above the interconnect structure 106,108, comprising: a metal layer 112 above the plurality of metallization layers 106; a silicon carbide (SiC) layer 114 (¶ 15) above the plurality of dielectric layers 108 and above the metal layer 112; a bonding via structure (lower portion of 130 in 114+116) above and coupled with the metal layer 112; and a bonding pad structure (upper portion of 130 in 118) above and coupled with the bonding via structure (lower portion of 130 in 114+116), wherein the bonding via (lower portion of 130) extends through the silicon carbide layer 114. In re claim 5, Kuang discloses (e.g. FIG. 11) wherein the bonding region further comprises: an extreme low dielectric constant (ELK) dielectric layer 110 (k value lower than about 2.0, ¶ 13) under the silicon carbide layer 114, wherein the metal layer 112 is included in the ELK dielectric layer 110. In re claim 7, Kuang discloses (e.g. FIG. 11) a semiconductor device, comprising: a first semiconductor die 100, comprising: a first device layer 104; a first interconnect structure 106,108, above the first device layer 104, comprising: a first plurality of dielectric layers 108; and a first plurality of metallization layers 106 included in the first plurality of dielectric layers 108; and a first bonding region 110,114,116,118,120, above the first interconnect structure 106,108, comprising: a first extreme low dielectric constant (ELK) dielectric layer 110 (k value lower than about 2.0, ¶ 13) above the first plurality of dielectric layers 108; a first metal layer 112 above the first plurality of metallization layers 106 and included in the first ELK dielectric layer 110; a first bonding via (lower portion of 130 in 114+116) above and coupled with the first metal layer 112, wherein the first bonding via (lower portion of 130 in 114+116) is above the first ELK dielectric layer 110; and a first bonding pad (upper portion of 130 in 118) above and coupled with the first bonding via (lower portion of 130 in 114+116); a second semiconductor die 200, comprising: a second device layer 204; a second interconnect structure106,208, below the second device layer 204, comprising: a second plurality of dielectric layers 208; and a second plurality of metallization layers 206 included in the first plurality of dielectric layers 208; and a second bonding region 210,214,216,218,220, below the second interconnect structure 206,208, comprising: a second ELK dielectric layer 210 (being same as 110, ¶ 23, with a k value lower than about 2.0, ¶ 13) below the second plurality of dielectric layers 108; a second metal layer 212 below the second plurality of metallization layers 206 and included in the second ELK dielectric layer 210; a second bonding via (upper portion of 230 in 214+216) below and coupled with the second metal layer 212, wherein the second bonding via (upper portion of 230 in 214+216) is below the second ELK dielectric layer 210; and a second bonding pad (lower portion of 230 in 218) below and coupled with the second bonding via (upper portion of 230 in 214+216), wherein the first semiconductor die 100 and the second semiconductor die 200 are bonded at the first bonding pad (upper portion of 130 in 118) and the second bonding pad (lower portion of 230 in 218). In re claim 8, Kuang discloses (e.g. FIG. 11) wherein the first semiconductor die 100 further comprises a first silicon carbide (SiC) layer 114 above the first plurality of dielectric layers 108 and above the first metal layer 106, wherein the first bonding via (lower portion of 130 in 114+116) extends through the first silicon carbide layer 114; and wherein the second semiconductor die 200 further comprises a second silicon carbide (SiC) layer 214 (being same as 114, ¶ 25, comprises silicon carbide, ¶ 15) below the second plurality of dielectric layers 208 and below the second metal layer 206, wherein the second bonding via (upper portion of 130 in 214+216) extends through the second silicon carbide layer 214. In re claim 21, Kuang discloses (e.g. FIG. 11) a semiconductor device, comprising: a first plurality of dielectric layers 108 in an interconnect structure of the semiconductor device 100; a plurality of metallization layers 106 included in the first plurality of dielectric layers 108; an extreme low dielectric constant (ELK) dielectric layer 110 (k value lower than about 2.0, ¶ 13), of a bonding region of the semiconductor device, above the first plurality of dielectric layers 108 in the interconnect structure; a metal interconnect (some portion of the plural metal features 112) and a metal layer (other portion of the plural metal features 112) in the ELK dielectric layer 110; a silicon carbide (SiC) layer 114 on the ELK dielectric layer 110 and above the metal layer 112; a second plurality of dielectric layers 116,118,120 over the silicon carbide layer 114; a bonding via (lower portion of 130) on the metal layer 112 and in a first recess 122 (see FIG. 3), wherein the first recess 122 (FIG. 3) extends through the second plurality of dielectric layers 116,118,120 and through the silicon carbide layer 114 to expose a top surface of the metal layer 112; and a bonding pad (upper portion of 130) on the bonding via (lower portion of 130) and in the first recess 122. In re claim 22, Kuang discloses (e.g. FIG. 11) wherein the silicon carbide layer 114 is a single-layer silicon carbide layer. In re claim 24, Kuang discloses (e.g. FIG. 11) wherein each of the metal interconnect 112 and the metal layer 112 includes: a liner layer (conductive barrier, ¶ 14) between the ELK dielectric layer 110 and a conductive structure (copper region, ¶ 14); and the conductive structure (copper region of 112) is disposed in a second recess (occupied by 112) of the ELK dielectric layer 110. In re claim 25, Kuang discloses (e.g. FIG. 11) wherein the bonding via (lower portion of 130) comprises: a liner layer 126 on sidewall of the first recess 122 corresponding to the silicon carbide layer 114; and a conductive structure 128 over the liner layer 126. In re claim 27, as best understood, Kuang discloses (e.g. FIG. 11) further comprising: “a dielectric layer” 116 over the silicon carbide layer 114, wherein the dielectric layer 116 comprises a high density plasma (HDP) dielectric material (¶ 15). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-3, 9-13, and 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kuang as applied to claims 1, 8, and 21 above, and further in view of Usami et al. US 2004/0155342 A1 (Usami). In re claims 2 and 9, Kuang discloses (e.g. FIG. 11) wherein the silicon carbide layer 114 is an etch stop layer that comprises silicon carbide, silicon nitride, silicon oxynitride, or other dielectric materials (¶ 15). Kuang does not explicitly disclose wherein the silicon carbide layer comprises a multiple-layer structure that includes: a first sub-layer having a first carbon (C) concentration; and a second sub-layer, on the first sub-layer, having a second carbon concentration that is greater than the first carbon concentration. However, Usami discloses (e.g. FIGs. 1 & 5(b)) a silicon carbide layer 6 (¶ 42,50) comprises a multiple-layer structure 6a,6b,6c that includes: a first sub-layer 6a having a first carbon (C) concentration; and a second sub-layer 6b,6c, on the first sub-layer 6a, having a second carbon concentration that is greater than the first carbon concentration (¶ 43,68). Usami discloses forming the silicon carbide layer 6 as a multiple-layer structure to have different C concentrations such that the low C concentration film provides high etch selectivity, effective Cu diffusion prevention, and good adhesive property, while high C concentration film reduces overall dielectric constant to prevent parasitic capacitance between metal elements (¶ 43,50,55,80). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Kuang’s silicon carbide layer 114 as a multiple-layer structure including a low C concentration first sub-layer and a high C concentration second sub-layer as taught by Usami to obtain an etch stop layer having high etch selectivity, effective Cu diffusion prevention, good adhesive property, and reduced overall dielectric constant. In re claims 3 and 10, Usami discloses (e.g. FIG. (5b)) wherein the multiple-layer structure 6 includes a third sub-layer 6b, on the second sub-layer 6c, having a third carbon concentration that is greater than the second carbon concentration (¶ 68). In re claim 11, Kuang discloses (e.g. FIG. 11) wherein the second silicon carbide layer 214 comprises a single-layer structure. Furthermore, a multiple-layer silicon carbide structure 6 as taught by Usami would comprise a single-layer structure. In re claim 12, Kuang discloses the second silicon carbide (SiC) layer 214 being same as 114 (¶ 25) which is an etch stop layer that comprises silicon carbide, silicon nitride, silicon oxynitride, or other dielectric materials (¶ 15). Therefore, it would have also been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Kuang’s second silicon carbide layer 214 as a multiple-layer structure including a low C concentration first sub-layer and a high C concentration second sub-layer as taught by Usami to obtain an etch stop layer having high etch selectivity, effective Cu diffusion prevention, good adhesive property, and reduced overall dielectric constant. Therefore, the multiple-layer structure of the second silicon carbide layer comprises includes: a third sub-layer 6a having a third carbon (C) concentration; and a fourth sub-layer 6b,6c, under the third sub-layer 6a (when flip bonded), having a fourth carbon concentration that is greater than the third carbon concentration (¶ 43,68). In re claim 13, the combination of Kuang and Usami teaches wherein the multiple-layer structure (Kuang’s 114 being replaced with Usami’s multiple-layer structure 6) includes a fifth sub-layer 6b, on the second sub-layer 6c, having a fifth carbon concentration that is greater than the second carbon concentration (¶ 68); and wherein the other multiple-layer structure (Kuang’s 214 being replaced with Usami’s multiple-layer structure 6) includes a sixth sub-layer 6b, on the fourth sub-layer 6c, having a sixth carbon concentration that is greater than the fourth carbon concentration (¶ 68). In re claim 23, Kuang discloses (e.g. FIG. 11) wherein the silicon carbide layer 114 is an etch stop layer that comprises silicon carbide, silicon nitride, silicon oxynitride, or other dielectric materials (¶ 15). Kuang does not explicitly disclose wherein the silicon carbide layer comprises a first sub-layer, of the silicon carbide layer, having a first carbon concentration; a second sub-layer of the silicon carbide layer, on the first sub-layer, having a second carbon concentration that is greater than the first carbon concentration; and a third sub-layer of the silicon carbide layer, on the second sub-layer, having a third carbon concentration that is greater than the second carbon concentration. However, Usami discloses (e.g. FIG. 5(b)) a silicon carbide layer 6 comprises a first sub-layer 6a, of the silicon carbide layer, having a first carbon concentration; a second sub-layer 6c of the silicon carbide layer, on the first sub-layer, having a second carbon concentration that is greater than the first carbon concentration (¶ 68); and a third sub-layer 6b of the silicon carbide layer, on the second sub-layer 6c, having a third carbon concentration that is greater than the second carbon concentration (¶ 68). Usami discloses forming the silicon carbide layer 6 as a multiple-layer structure to have different C concentrations such that the low C concentration film provides high etch selectivity, effective Cu diffusion prevention, and good adhesive property, while high C concentration film reduces overall dielectric constant to prevent parasitic capacitance between metal elements (¶ 43,50,55,80). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Kuang’s silicon carbide layer 114 as a multiple-layer structure including a low C concentration first sub-layer, a mid C concentration second sub-layer, and a high C concentration third sub-layer as taught by Usami to obtain an etch stop layer having high etch selectivity, effective Cu diffusion prevention, good adhesive property, and reduced overall dielectric constant. Claims 4 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Kuang as applied to claims 1 and 21 above, and further in view of Bielefeld et al. US 2018/0226289 A1 (Bielefeld). In re claims 4 and 26, Kuang discloses (e.g. FIG. 11) wherein the silicon carbide layer 114 is an etch stop layer that comprises silicon carbide, silicon nitride, silicon oxynitride, or other dielectric materials (¶ 15). Kuang does not explicitly disclose the silicon carbide layer 114 additionally comprises at least one of: nitrogen (N), hydrogen (H), or oxygen (O) as recited in claim 4 or comprises nitrogen (N), hydrogen (H), and oxygen (O) as recited in claim 26. However, Bielefeld discloses (e.g. FIG. 1J) an etch stop layer 126 that comprises silicon (Si), carbon (C), nitrogen (N), oxygen (O), hydrogen (H), or any combination thereof, e.g. the etch stop layer 126 is a SiCNOH layer (¶ 60). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Kuang’s silicon carbide etch stop layer 114 to further include nitrogen (N), hydrogen (H), and oxygen (O) as suitable etch stop layer material as taught by Bielefeld for its known desired etch selectivity and dielectric constant. It has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kuang as applied to claim 5 above, and further in view of Wang et al. US 2011/0223759 A1 (Wang). In re claim 6, Kuang discloses the dielectric layer 110 has k value lower than about 2.0 (¶ 13). Wang discloses (e.g. FIG. 7) a low k dielectric layer 40,42 in an interconnect structure having k value less than about 2.7 and comprises carbon-doped silicon oxide (¶ 19). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Kuang’s low k dielectric layer 110 using carbon doped silicon oxide, as a known low k dielectric material, as taught by Wang. It has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2015/0364434 A1 (FIG. 9) directed bonded dies 100,200 having a silicon carbide layer 109 in the bonding region. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU CHEN whose telephone number is (571)270-7881. The examiner can normally be reached Monday-Friday: 9AM-5PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WILLIAM KRAIG can be reached on 5712728660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YU CHEN/Primary Examiner, Art Unit 2896 YU CHEN Examiner Art Unit 2896
Read full office action

Prosecution Timeline

Nov 02, 2023
Application Filed
Jun 03, 2026
Response Filed
Jul 28, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
68%
Grant Probability
98%
With Interview (+29.7%)
2y 10m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1074 resolved cases by this examiner. Grant probability derived from career allowance rate.

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