Prosecution Insights
Last updated: April 19, 2026
Application No. 18/503,735

DISPLAY DEVICE

Non-Final OA §102§103
Filed
Nov 07, 2023
Examiner
CLINTON, EVAN GARRETT
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
94%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
483 granted / 549 resolved
+20.0% vs TC avg
Moderate +6% lift
Without
With
+5.5%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
27 currently pending
Career history
576
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
56.7%
+16.7% vs TC avg
§102
28.6%
-11.4% vs TC avg
§112
14.1%
-25.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 549 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, and 11-13 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee et al. (U.S. Publication No. 2023/0005962). Regarding claim 1, Lee teaches a display device comprising: a substrate (Fig. 3, substrate 111/118/112) having a first surface (top surface) on which a light emitting element (LED 130) is located, a second surface (bottom surface) on which a driving unit (paragraph [0079]) for driving the light emitting element is located, the second surface being opposite the first surface, and a first side surface (left side in Fig. 3) between the first surface and the second surface; a first pad (pad 180T) on the first surface of the substrate and electrically connected to the light emitting element (see paragraph [0089]); a second pad (180B) on the second surface of the substrate and electrically connected to the driving unit (see paragraph [0089]); and a side wiring (side wiring 150) on the first surface, the second surface, and the first side surface of the substrate to electrically connect the first pad and the second pad (Fig. 3), wherein the side wiring comprises a first side wiring and a second side wiring spaced from each other (Fig. 2, several adjacent wirings 150 spaced apart), and wherein the first pad comprises: a first contact portion in contact with the first side wiring (see Fig. 2, several adjacent pads 180T2, each in contact with one of the side wirings); and a second contact portion on one side of the first contact portion and in contact with the second side wiring (see Fig. 2, several adjacent pads 180T2, each in contact with one of the side wirings). Regarding claim 11, Lee teaches a display device comprising: a substrate (Fig. 3, substrate 111/118/112) having a first surface (top surface) on which a light emitting element (LED 130) is located and a second surface (bottom surface) on which a driving unit for driving the light emitting element is located (paragraph [0079]), the second surface being opposite the first surface (top and bottom); a first upper pad electrode (pad 180T) on the first surface of the substrate and electrically connected to the light emitting element (paragraph [0089]); a first insulating layer (insulating layer 116) on the first upper pad electrode and having a first opening and a second opening exposing the first upper pad electrode (see Fig. 2 and 3, opening above 180T2 at each connection point); a first lower pad (lower pad 180B) electrode on the second surface of the substrate and electrically connected to the driving unit (paragraph [0089]); a second insulating layer (second layer 117) on the first lower pad electrode and having a third opening and a fourth opening exposing the first lower pad electrode (Fig. 2-3, openings at 180B2 above each connection point); and a side wiring (side wiring 150) electrically connecting the first upper pad electrode and the first lower pad electrode (Fig. 3), wherein the side wiring comprises: a first side wiring in contact with a portion of the first upper pad electrode exposed by the first opening and a portion of the first lower pad electrode exposed by the third opening (see Fig. 2-3); and a second side wiring spaced from the first side wiring and in contact with a portion of the first upper pad electrode exposed by the second opening and a portion of the first lower pad electrode exposed by the fourth opening (see Fig. 2-3). Regarding claim 12, Lee teaches the display device of claim 11, further comprising an overcoat layer covering the first side wiring and the second side wiring (Fig. 3, overcoat 170), wherein the overcoat layer is in contact with the first insulating layer in a separation space between the first side wiring and the second side wiring on the first surface of the substrate (see Fig. 2, overcoat portion 171 shown to be continuous between adjacent wiring layers, and Fig. 3, in contact with insulating layer 116). Regarding claim 13, Lee teaches the display device of claim 12, wherein the overcoat layer is in contact with the second insulating layer in a separation space between the first side wiring and the second side wiring on the second surface (see Fig. 2-3). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Ito et al. (U.S. Publication No. 2024/0055442) Regarding claim 2, Lee teaches the display device of claim 1, further comprising: a top connection line (not shown, but inherent that a connection between the pad and TFT 120 exists in order for connection to the LED to be possible) and electrically connecting the first pad and the light emitting element (see paragraph [0089]); and Lee does not teach the top connection line is between the first surface of the substrate and the first pad; an upper insulating layer between the top connection line and the first pad, wherein the first pad is in contact with the top connection line through a plurality of contact holes penetrating through the upper insulating layer. However, Ito teaches a similar device in which a connection line is formed between the substrate and the pad (Ito Fig. 5, connection line 53 between pad 54 and substrate 55), an upper insulating layer between the top connection line and the first pad (Ito Fig. 5, insulating layer 56), wherein the first pad is in contact with the top connection line through a plurality of contact holes penetrating through the upper insulating layer (see Ito Fig. 5, pad 54 and connection line 53 connected through contact holes in insulating layer 56). It would have been obvious to a person of skill in the art at the time of the effective filing date that the pad could have connected to a connection line with insulation between because Ito teaches that this reduces the likelihood of shorting the pad to other wiring or elements (Ito paragraph [0057]). Claims 7-10 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Jung et al. (U.S. Publication No. 2020/0203235) Regarding claim 7, Lee teaches the display device of claim 1, but does not teach wherein the substrate further comprises: a first chamfered surface extending from one side of the first surface ; and a second chamfered surface extending from one side of the second surface, wherein the first side surface connects the first chamfered surface and the second chamfered surface. However, Jung teaches a first chamfered surface extending from one side of the first surface (Jung Fig. 11, surface CF1); and a second chamfered surface extending from one side of the second surface (Jung Fig. 11, surface CF2), wherein the first side surface connects the first chamfered surface and the second chamfered surface (Jung Fig. 11). It would have been obvious to a person of skill in the art at the time of the effective filing date that a chamfered surface at the corners could have been used because Jung teaches that this avoids the sharp 90° corner, reducing the chance of wire breakage (Jung paragraph [0226]). Regarding claim 8, Lee in view of Jung teaches the display device of claim 7, wherein the side wiring is on the first surface, the first chamfered surface, the first side surface, the second chamfered surface, and the second surface (see Jung Fig. 11 and Lee Fig. 3, on all surfaces). Regarding claim 9, Lee in view of Jung teaches the display device of claim 8, wherein the side wiring comprises silver (Ag) (Lee paragraph [0090]). Regarding claim 10, Lee teaches the display device of claim 1, wherein the light emitting element is a micro light emitting diode element (Lee Fig. 3, LED 130). Lee does not teach that the LED is attached in a flip chip style. However, Jung teaches a similar device where the LED is attached in a flip chip style (see Jung Fig. 11, LED 290 is pads down). It would have been obvious to a person of skill in the art at the time of the effective filing date that the chip could have been attached flip chip style because this allows the full substrate and wiring to be formed prior to chip connection, allowing for separate formation of LED and substrate. Regarding claim 15, Lee teaches the display device of claim 11, but does not teach wherein the substrate further comprises: a first chamfered surface extending from one side of the first surface; a second chamfered surface extending from one side of the second surface; and a first side surface connecting the first chamfered surface and the second chamfered surface, and wherein the side wiring is on the first surface, the first chamfered surface, the first side surface, the second chamfered surface, and the second surface. However, Jung teaches a first chamfered surface extending from one side of the first surface (Jung Fig. 11, surface CF1); and a second chamfered surface extending from one side of the second surface (Jung Fig. 11, surface CF2), wherein the first side surface connects the first chamfered surface and the second chamfered surface (Jung Fig. 11), and the wiring is on the chamfered and side surface, and the top and bottom surface (see Jung Fig. 11 and Lee Fig. 3). It would have been obvious to a person of skill in the art at the time of the effective filing date that a chamfered surface at the corners could have been used because Jung teaches that this avoids the sharp 90° corner, reducing the chance of wire breakage (Jung paragraph [0226]). Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Kim et al. (U.S. Publication No. 2024/0128280). Regarding claim 14, Lee teaches the display device of claim 13, wherein the side wiring comprises silver (Ag) (paragraph [0090]), but does not teach wherein the overcoat layer comprises one or more selected from among acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and a polyimide resin. However, Kim teaches a similar device in which the overcoat comprises an acrylic resin (see Kim paragraph [0055]). It would have been obvious to a person of skill in the art at the time of the effective filing date that the overcoating of Lee could have used a similar material because it would have been a simple substitution of one known material for another with predictable results. Allowable Subject Matter Claims 16-20 are allowed. The following is an examiner’s statement of reasons for allowance: Regarding claims 16-20, the prior art, alone or in combination, fails to teach or suggest a first inspection portion that does not overlap the side wiring. Claims 3-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claims 3-6, the prior art, alone or in combination, fails to teach or suggest wherein the first pad further comprises a first inspection portion on an other side of the first contact portion and not overlapping the side wiring. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Evan G Clinton whose telephone number is (571)270-0525. The examiner can normally be reached Monday-Friday at 8:30am to 5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EVAN G CLINTON/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Nov 07, 2023
Application Filed
Jan 09, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
94%
With Interview (+5.5%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 549 resolved cases by this examiner. Grant probability derived from career allow rate.

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