Prosecution Insights
Last updated: April 19, 2026
Application No. 18/504,296

SEMICONDUCTOR DEVICE

Non-Final OA §102§112
Filed
Nov 08, 2023
Examiner
MILLER, JAMI VALENTINE
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
DENSO CORPORATION
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allow Rate
1011 granted / 1067 resolved
+26.8% vs TC avg
Minimal +4% lift
Without
With
+3.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
23 currently pending
Career history
1090
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
27.2%
-12.8% vs TC avg
§102
45.6%
+5.6% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1067 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-9 are pending in this application. Foreign Priority Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Information Disclosure Statement Acknowledgment is made that the information disclosure statement has been received and considered by the examiner. If the applicant is aware of any prior art or any other co-pending applications not already of record, he/she is reminded of his/her duty under 37 CFR 1.56 to disclose the same. Drawings There are no objections or rejections to the drawings. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1 and 3 are rejected under pre-AIA 35 U.S.C. 102(a)(1) as being anticipated by Kato et al. (US Patent Application Publication No 2020/0273845) hereinafter referred to as Kato. Per Claim 1 Kato discloses a semiconductor device, comprising a semiconductor element (10A) having main electrodes (32A and 150A) disposed on opposite faces (top and bottom) in a plate thickness direction (as shown in figures 4L); (The examiner notes that the term "on" includes "directly on" (no intermediate materials, elements or space disposed therebetween) and "indirectly on" (intermediate materials, elements or space disposed therebetween)) a substrate (20A/C, see figure 4G-J) having an insulating base member (73), a front-face metal body (75A (see figure 4G-L which shows that 24/24A includes 75A and 75B both of which are conductive wiring layers)) disposed on a front face of the insulating base member (73) and electrically connected (connected via 31A and 75B)) to one of the main electrodes (150A) of the semiconductor element (10A), and a back-face metal body (25/25A) disposed on a back face of the insulating base member (see figures 4E-L); (The examiner notes that the term "electrically connected " includes both ohmic (metallic) connection as well as capacitive (insulating) connection) a bonding member (75B (which is part of 24A)); and a metal member (31A) connected to the front-face metal body (75A) through the bonding member (75B), (The examiner notes that the term "connected" includes "directly connected" (no intermediate materials, elements or space disposed therebetween) and "indirectly connected " (intermediate materials, elements or space disposed therebetween)) wherein the metal member (31A) has an opposing face (top face) opposing an upper face of the front-face metal body (75A) and a receiving portion (bottom portion) disposed adjacent to the opposing face to provide a receiving space to receive the bonding member (75B) therein, (The examiner notes that the term "adjacent" includes "directly adjacent" (no intermediate materials, elements or space disposed therebetween) and "indirectly adjacent" (intermediate materials, elements or space disposed therebetween)) and the bonding member (75B) is received in the receiving space (bottom portion of 31A) in a state where the opposing face (top portion of 31A) is in contact with the upper face of the front-face metal body (75A). (The examiner notes that the term "contact" includes "direct contact" (no intermediate materials, elements or space disposed therebetween) and "indirect contact" (intermediate materials, elements or space disposed therebetween)) (see figs. 4E-L) Per Claim 3 Kato discloses the device of claim 1 including where the semiconductor element (10A) includes, as the main electrodes (32A and 150A), a first main electrode (150A) and a second main electrode (32A) disposed on the opposite faces of the semiconductor element in the plate thickness direction (see figure 4G-L), and the substrate (20A/C) includes a first substrate (20A) to which the first main electrode (150A) is connected and a second substrate (20C) to which the second main electrode (32A) is connected, and the first substrate and the second substrate are disposed to interpose the semiconductor element therebetween in the plate thickness direction (as shown in figure 4L). Allowable Subject Matter Claims 2, 4-9 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Cited Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicants are directed to consider additional pertinent prior art included on the Notice of References Cited (PTOL 892) attached herewith. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMI VALENTINE MILLER whose telephone number is (571)272-9786. The examiner can normally be reached on Monday-Thursday 7am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached on (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Jami Valentine Miller/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Nov 08, 2023
Application Filed
Jan 04, 2026
Non-Final Rejection — §102, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
99%
With Interview (+3.9%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 1067 resolved cases by this examiner. Grant probability derived from career allow rate.

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