DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-6 and 9-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (U.S. Pub. 2020/0083036) [Hereafter “Lin ’036”] in view of Lin et al. (U.S. Pub. 2021/0384078) [Hereafter “Lin ’078”] and Uozumi (U.S. Pub. 2021/0091024).
Regarding claim 1, Lin ’036 [Figs.1A-E] discloses a method for assembling two integrated circuit wafers, the method comprising:
removing a portion of an assembly face of a first wafer [1] on a perimeter of the first wafer [Fig.1B]; and
bonding the assembly face of the first wafer to an assembly face of a second wafer [51] [Fig.1D].
Lin ’036 discloses a wafer edge trimming process, but fails to explicitly disclose removing by abrasion. However, Lin ’078 [Figs.8-9] discloses a wafer edge trimming process comprising removing by abrasion [Paras.59-60]. It would have been obvious to provide the wafer edge trimming process comprising removing by abrasion, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Lin ’036 discloses wafer [1] comprises integrated circuit components [Para.34], but fails to explicitly disclose the second wafer [51] being an integrated wafer. However, Uozumi [Fig.10C] discloses a method for assembling two integrated circuit wafers comprising bonding the assembly face of the first wafer [3] to an assembly face of a second integrated circuit wafer [2]. It would have been obvious to bond two integrated circuit wafers as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 2-4, Lee ’036 [Figs.1B-D] discloses the method
wherein the removing forms a peripheral hollow having a surface extending from the assembly face [top surface of layer 2] to the perimeter of the first wafer [1], the surface of the hollow having a rounded shape from the assembly face of the first wafer to a depth in the first wafer then being planar and parallel to the assembly face from this depth to the perimeter of the first wafer [Fig.1C];
wherein the hollow extends [W1] from the perimeter of the first wafer over a distance comprised between 1 and 4 mm [Fig.1B] [Para.31];
wherein the hollow is formed over a depth [d1] comprised between 50 and 150 µm [Para.31].
Regarding claims 5-6, Lee ’036 [Figs.1B-D] discloses the method
wherein the rounded shape of the hollow has a radius of curvature comprised between 1 and 10 mm [It appears obvious that at some portion of the rounded surface of the hollow of Lee has a radius of curvature comprised between 1 and 10 mm];
wherein the surface of the hollow has, at the intersection between this surface and the assembly face, a tangent oriented relative to the assembly face at an angle comprised between 5 and 20 degrees [It appears obvious that at some portion of the surface of the hollow of Lee has a tangent oriented relative to the assembly face at an angle comprised between 5 and 20 degrees].
Regarding claims 9-10, Lee ’036 [Figs.1B-D] discloses the method
wherein the bonding is a bonding by molecular adhesion [Para.34];
further comprising controlling a conformity of the bonding [Para.34].
Regarding claim 11, Lee ’036 and Uozumi [Fig.10C] disclose the method
wherein each integrated circuit wafer comprises a first portion including electronic components [12,14] and a second portion including interconnection networks [6,9] integrated in one or more dielectric layers, the interconnection networks extending from the electronic components to the assembly face [5,8] of this integrated circuit wafer, the interconnection networks of the two integrated circuit wafers being adapted to be electrically connected via the two assembly faces once the two integrated circuit wafers have been assembled [Uozumi; Fig.10C; Paras.20-22,50].
Regarding claim 12, Lin ’036 [Figs.1A-E] discloses a method for assembling two integrated circuit wafers, the method comprising:
removing a portion of an assembly face of a first wafer [1] on a perimeter of the first wafer [Fig.1B]; and
bonding the assembly face of the first wafer to an assembly face of a second wafer [51] [Fig.1D].
Lin ’036 discloses a wafer edge trimming process, but fails to explicitly disclose removing by abrasion. However, Lin ’078 [Figs.8-9] discloses a wafer edge trimming process comprising removing by abrasion [Paras.59-60]. It would have been obvious to provide the wafer edge trimming process comprising removing by abrasion, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Lin ’036 discloses wafer [1] comprises integrated circuit components [Para.34], but fails to explicitly disclose the second wafer [51] being an integrated wafer; and annealing following the bonding. However, Uozumi [Fig.10C] discloses a method for assembling two integrated circuit wafers comprising bonding the assembly face of the first wafer [3] to an assembly face of a second integrated circuit wafer [2]; and annealing following the bonding [Para.50]. It would have been obvious to bond two integrated circuit wafers and annealing following the bonding as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 13-14, Lee ’036 and Uozumi [Fig.10C] disclose the method
wherein the annealing is carried out after controlling the conformity of the bonding [Appears to be an obvious step in the bonding process of Uozumi, Fig.10C];
further comprising controlling the assembly of the two integrated circuit wafers after the annealing [Appears to be an obvious step in the bonding process of Uozumi, Fig.10C].
Claim(s) 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (U.S. Pub. 2020/0083036) [Hereafter “Lin ’036”] in view of Lin et al. (U.S. Pub. 2021/0384078) [Hereafter “Lin ’078”] and Uozumi (U.S. Pub. 2021/0091024), as applied above and further in view of Nakanishi et al. (U.S. Pub. 2013/0237033) [Hereafter “Nakanishi”].
Regarding claims 7-8, Lin ’078 [Figs.8-9] discloses a wafer edge trimming process comprising removing by abrasion comprising abrasive diamonds [Paras.59-60]. Lin ’078 fails to explicitly disclose
wherein the removing is carried out using at least one abrasive belt placed against the assembly face on the perimeter of the first wafer while driving the first wafer in rotation; and
wherein the surface of the abrasive belts has an abrasive face including abrasive diamonds.
However, Nakanishi [Fig.2] discloses and makes obvious a method comprising
wherein the removing is carried out using at least one abrasive belt [34,44] placed against the assembly face on the perimeter of the first wafer while driving the first wafer in rotation [Para.39-46; and
wherein the surface of the abrasive belts has an abrasive face including abrasive diamonds [Paras.45-46].
It would have been obvious to use the abrasive belt as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim(s) 15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (U.S. Pub. 2020/0083036) [Hereafter “Lin ’036”] in view of Uozumi (U.S. Pub. 2021/0091024).
Regarding claim 15, Lee ’036 [Figs.1B-D] discloses an assembly of two integrated circuit wafers comprising:
a first wafer [1] including an assembly face and a peripheral hollow having a surface extending from the assembly face [top surface of layer 2] to the perimeter of the first wafer, the surface of the hollow having a rounded shape from the assembly face of the first wafer to a depth in the first wafer then being planar and parallel to the assembly face from this depth to the perimeter of the first wafer [Fig.1C]; and
a second wafer [51] including an assembly face bonded to the assembly face of the first wafer [Fig.1D].
Lin ’036 discloses wafer [1] comprises integrated circuit components [Para.34], but fails to explicitly disclose the second wafer [51] being an integrated wafer. However, Uozumi [Fig.10C] discloses an assembly of two integrated circuit wafers comprising a second integrated circuit wafer [2] including an assembly face bonded to the assembly face of the first wafer [3]. It would have been obvious to bond two integrated circuit wafers as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 16 and 19, Lee ’036 [Figs.1B-D] discloses an assembly
wherein the surface of the hollow has, at the intersection between this surface and the assembly face, a tangent oriented relative to the assembly face at an angle comprised between 5 and 20 degrees [It appears obvious that at some portion of the surface of the hollow of Lee has a tangent oriented relative to the assembly face at an angle comprised between 5 and 20 degrees];
wherein the rounded shape of the hollow has a radius of curvature comprised between 1 and 10 mm, in particular in the range of 5 mm [It appears obvious that at some portion of the rounded surface of the hollow of Lee has a radius of curvature comprised between 1 and 10 mm, in particular in the range of 5 mm].
Regarding claims 17-18, Lee ’036 [Figs.1B-D] discloses the assembly
wherein the hollow extends [W1] from the perimeter of the first wafer over a distance comprised between 1 and 4 mm [Fig.1B] [Para.31];
wherein the depth [d1] of the peripheral hollow is comprised between 50 and 150 µm [Para.31].
Regarding claim 20, Lee ’036 and Uozumi [Fig.10C] disclose the method
wherein each integrated circuit wafer comprises a first portion including electronic components [12,14] and a second portion including interconnection networks [6,9] integrated in one or more dielectric layers, the interconnection networks extending from the electronic components to the assembly face [5,8] of this integrated circuit wafer, the interconnection networks of the two integrated circuit wafers being adapted to be electrically connected via the two assembly faces [Uozumi; Fig.10C; Paras.20-22,50].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art is considered analogous art and discloses at least some of the claimed subject matter of the current invention.
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/BAC H AU/Primary Examiner, Art Unit 2898