Prosecution Insights
Last updated: April 19, 2026
Application No. 18/507,726

Semiconductor Package With Thermal Conductive Structure and the Methods of Forming the Same

Non-Final OA §102§Other
Filed
Nov 13, 2023
Examiner
HARRISTON, WILLIAM A
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
98%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
941 granted / 1054 resolved
+21.3% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
19 currently pending
Career history
1073
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
48.0%
+8.0% vs TC avg
§102
43.5%
+3.5% vs TC avg
§112
5.4%
-34.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1054 resolved cases

Office Action

§102 §Other
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement filed on 08/21/2024 has been considered. Drawings The drawings filed on 02/21/2024 are acceptable. Specification The abstract of the disclosure and the specification filed on 11/13/2023 are acceptable. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 6, 7, 11-16, 18-20 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Chou (US 2023/0021005). PNG media_image1.png 510 776 media_image1.png Greyscale Regarding claim 1, Chou (US 2023/0021005) discloses: A method comprising: depositing a first metal layer (metal layer BSM1, ¶0048) on a package component, wherein the package component comprises a first device die (100a, ¶0041); forming a first dielectric layer (non-metallic TIM 602, ¶0056) on the package component; forming a metal thermal interface material (604, ¶0059) on the first metal layer (BSM1), wherein the first dielectric layer (602) comprises portions on opposing sides of the metal thermal interface material (604, figure 4c); and bonding a heat sink (800, ¶0065) on the metal thermal interface material (604), wherein the heat sink comprises a second metal layer (BSM2, ¶0064) bonding to the metal thermal interface material (604) through metal- to-metal direct bonding (¶0064). Regarding claim 2, Chou further discloses: wherein the heat sink (800) further comprises a second dielectric layer (602) on opposing sides of the second metal layer (BSM2), and wherein the second dielectric layer is further in contact with the first dielectric layer (figure 5). Regarding claim 6, Chou further discloses: wherein the forming the first dielectric layer (602) comprises dispensing a polymer (¶0056). Regarding claim 7, Chou further discloses: wherein the dispensing the polymer comprises dispensing benzocyclobutene (BCB) (¶0026 and ¶0056 taken together discloses BCB and PBO are both appropriate polymers). Regarding claim 11, Chou further discloses: wherein the metal thermal interface material (604) comprises copper (¶0059). Regarding claim 12, Chou discloses: A structure comprising: a package component comprising a first device die (100a); a metal layer over (BSM1) and in physical contact with the package component; a metal thermal interface material (604) on the metal layer (BSM1); and a heat sink (800) bonding to the metal thermal interface material (604), wherein the heat sink (800) comprises an additional metal layer (BSM2) physically joined to the metal thermal interface material (604). Regarding claim 13, Chiu further discloses: wherein the metal layer (BSM1) extends laterally beyond edges of the metal thermal interface material (604). Regarding claim 14, Chou further discloses: a first dielectric layer (602) over and contacting the metal layer (604), wherein a first sidewall of the first dielectric layer contacts a second sidewall of the metal thermal interface material to form an interface (figure 4c). Regarding claim 15, Chiu further discloses: wherein the metal layer (BSM1) further extends laterally beyond additional edges of the first dielectric layer (figure 5). Regarding claim 16, Chou further discloses: wherein the first dielectric layer (602) comprises a polymer (¶0056). Regarding claim 18, Chou discloses: A structure comprising: an interposer comprising first edges; a first device die and a second device die over and bonding to the interposer; a metallic feature (BSM1 and TIM 604 taken together) over and contacting the first device (100a) die and the second device die (100b), wherein the metallic feature comprises: a lower portion (BSM1) comprising second edges vertically aligned to respective ones of the first edges; and an upper portion (TIM 604), wherein the upper portion is laterally recessed from the second edges; and a metal lid (800) over and bonding to the upper portion (604) . Regarding claim 19, Chou further discloses: wherein the upper portion comprises copper (604), and the upper portion is physically joined to an additional copper feature in the metal lid (¶0065 discloses lid 800 is copper). Regarding claim 20, Chou further discloses: a first dielectric layer (602) over and contacting the lower portion (BSM1), with the first dielectric layer (602) and the upper portion (604) forming a first vertical interface in between; and a second dielectric layer (602) over and bonding to the first dielectric layer (602), with the second dielectric layer (602) and an additional portion (804) of the metal lid (800) forming a second vertical interface in between. Allowable Subject Matter Claims 3-5, 8-10, 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 3, the prior art does not disclose “after the metal thermal interface material is plated, patterning the first dielectric layer to reveal a portion of the first metal layer” in combination with the remaining claimed features. Regarding claim 5, the prior art does not disclose “performing a planarization process to level top surfaces of the first dielectric layer and the metal thermal interface material” in combination with the remaining claimed features. Regarding claim 8, the prior art does not disclose “wherein the heat sink comprises a top metal lid, and the method further comprises attaching a sunroof metal lid through an adhesive, wherein the sunroof metal lid encircles the top metal lid adhesive comprises a bottom surface contacting the first metal layer, and a top surface contacting an additional bottom surface of the sunroof metal lid” in combination with the remaining claimed features. Regarding claim 9, the prior art does not disclose “forming a patterned plating mask over the first metal layer, wherein the metal thermal interface material is plated using the patterned plating mask to define patterns; removing the patterned plating mask; forming a blanket dielectric layer to cover both of the metal thermal interface material and the first metal layer; and performing a planarization process on the blanket dielectric layer to reveal the metal thermal interface material, wherein remaining portions of the blanket dielectric layer comprise the first dielectric layer” in combination with the remaining claimed features. Regarding claim 10, the prior art does not disclose “wherein the bonding the heat sink on the metal thermal interface material comprises: a compression bonding process; and an anneal process performed after the compression bonding process” in combination with the remaining claimed features. Regarding claim 17, the prior art does not disclose “wherein the heat sink further comprises a second dielectric layer bonding to the first dielectric layer” in combination with the remaining claimed features. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A HARRISTON whose telephone number is (571)270-3897. The examiner can normally be reached Mon-Fri, 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571 270 7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM A HARRISTON/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Nov 13, 2023
Application Filed
Jan 10, 2026
Non-Final Rejection — §102, §Other (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
98%
With Interview (+8.2%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 1054 resolved cases by this examiner. Grant probability derived from career allow rate.

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