Prosecution Insights
Last updated: October 01, 2026
Application No. 18/509,052

GAN-BASED, LATERAL-CONDUCTION, ELECTRONIC DEVICE WITH IMPROVED METALLIC LAYERS LAYOUT

Final Rejection §103
Filed
Nov 14, 2023
Priority
Nov 09, 2018 — IT 102018000010195 +1 more
Examiner
LIU, BENJAMIN T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
STMicroelectronics N.V.
OA Round
2 (Final)
75%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
541 granted / 721 resolved
+7.0% vs TC avg
Moderate +12% lift
Without
With
+12.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
36 currently pending
Career history
755
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
59.4%
+19.4% vs TC avg
§102
30.7%
-9.3% vs TC avg
§112
9.1%
-30.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 721 resolved cases

Office Action

§103
DETAILED ACTION Response to Arguments Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Cho (US 2018/0211904) in view of Bunin (US 2019/0280089). With regard to claim 1, fig. 1A of Cho disclose an electronic device, comprising: a layer of gallium nitride (“GaN”, par [0051]); a drain terminal 52B on the layer of gallium nitride (“GaN”, par [0051]); and a first source metal strip (left 60a, fig. 1A) and a second source metal strip (middle 60A, fig. 1A); a plurality of drain metal strips 64 coupled to the drain terminal 52B, the plurality of drain metal strips 64 including a first drain metal strip (left 64, fig. 1A) and a second drain metal strip (middle 64, fig. 1A), the first drain metal strip (left 64, fig. 1A) being between the first (left 60A) and second source metal strips (middle 60A), the first drain metal strip (left 64) having a first end (top end of left 64 in fig. 1A) spaced from a second end (bottom end of left 64 in fig. 1A) along a first direction (top to bottom in fig. 1A), the first end (top end of left 64 in fig. 1A) of the first drain metal strip (left 64) being aligned with a central region (center of left 60A) of the first source metal strip (left 60A) along a second direction (left to right in fig. 1A) that is transverse to the first direction (top to bottom in fig. 1A). Cho does not disclose a trapezoidal source metal bus on the first source metal strip. However, figs. 1 and 3 of Bunin discloses a trapezoidal (“source plate 111, each having a trapezoid form”, par [0035])) source metal bus 111 on the first source metal strip (170 above 130, fig. 3). Therefore, it would have been obvious to one of ordinary skill in the art to form the source conductive pads of Bunin with the source plate as taught in Bunin in order to collect the source current from different transistor cells. See par [0036] of Bunin. With regard to claim 2, Cho does not disclose that the trapezoidal source metal bus is on the second source metal strip, and on the plurality of drain metal strips. However, figs. 1 and 3 of Bunin discloses that the trapezoidal source metal bus 112 is on the second source metal strip (170 above 130, fig. 3), and on the plurality of drain metal strips (170 above 140, fig. 3). Therefore, it would have been obvious to one of ordinary skill in the art to form the source conductive pads of Bunin with the source plate as taught in Bunin in order to provide uniform current density at the different transistor cells along the source plate. See par [0036] of Bunin. With regard to claim 3, Cho does not disclose a trapezoidal drain metal bus spaced from the source metal bus, the drain metal bus being on the first source metal strip, the second source metal strip, and on the plurality of drain metal strips. However, figs. 1 and 3 of Bunin discloses a trapezoidal drain metal bus 112 spaced from the source metal bus 111, the drain metal bus 112 being on the first source metal strip (170 on 130), the second source metal strip (another 170 on 130), and on the plurality of drain metal strips (170 on 140). Therefore, it would have been obvious to one of ordinary skill in the art to form the source and drain conductive pads of Bunin with the source plate and drain plate as taught in Bunin in order to provide connections to the source and drain terminals of different transistors. See par [0036] of Bunin. With regard to claim 4, Cho does not disclose an insulating layer that separates the source metal bus from the drain metal bus; and a first conductive pad electrically coupled to the source metal bus; and a second conductive pad electrically coupled to the drain metal bus. However, figs. 1 and 3 of Bunin an insulating layer 122 that separates the source metal bus 111 from the drain metal bus 112; and a first conductive pad (“bond pads”, par [0035]) electrically coupled to the source metal bus 111; and a second conductive pad (“bond pads”, par [0035]) electrically coupled to the drain metal bus 112. Therefore, it would have been obvious to one of ordinary skill in the art to form the source and drain conductive pads of Bunin with the source plate and drain plate as taught in Bunin in order to provide connections to the source and drain terminals of different transistors. See par [0036] of Bunin. With regard to claim 24, Cho does not disclose that the first and second source metal strips are electrically insulated from one another by a passivation layer. However, figs. 1 and 3 of Bunin discloses that the first (170 above 130) and second (another 170 above 130) source metal strips are electrically insulated from one another by a passivation layer 122. Therefore, it would have been obvious to one of ordinary skill in the art to form the source conductive pads of Bunin with the dielectric material as taught in Bunin in order to isolate the plurality of conductive metal interconnect layers. See par [0027] of Bunin. Allowable Subject Matter Claims 9-23 are allowed. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for allowance of claims 9 and 12 is that Cho (US 2018/0211904) and Bunin (US 2019/0280089) do not disclose a first hour-glass shaped drain bus between the first insulating region and the second insulating region. Claims 10-11 and 13-23 are allowed for being dependent on independent claims 9 and 12. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN T LIU whose telephone number is (571)272-6009. The examiner can normally be reached Monday-Friday 11:00am-7:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at 571 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BENJAMIN TZU-HUNG LIU/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Nov 14, 2023
Application Filed
Jan 10, 2026
Non-Final Rejection (signed) — §103
Feb 10, 2026
Non-Final Rejection mailed — §103
May 07, 2026
Response Filed
Jul 31, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
75%
Grant Probability
87%
With Interview (+12.3%)
2y 11m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 721 resolved cases by this examiner. Grant probability derived from career allowance rate.

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