Prosecution Insights
Last updated: April 19, 2026
Application No. 18/509,307

DISPLAY DEVICE

Non-Final OA §102§103§112
Filed
Nov 15, 2023
Examiner
CHOU, SHIH TSUN A
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
93%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
338 granted / 447 resolved
+7.6% vs TC avg
Strong +17% interview lift
Without
With
+17.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
24 currently pending
Career history
471
Total Applications
across all art units

Statute-Specific Performance

§103
48.9%
+8.9% vs TC avg
§102
23.4%
-16.6% vs TC avg
§112
26.6%
-13.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 447 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 15 and 17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The term “substantially” in claim 15 is a relative term which renders the claim indefinite. The term “substantially” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The limitation “substantially the same” in the claim has been rendered indefinite by the use of the term “substantially”. The term “substantially” in claim 17 is a relative term which renders the claim indefinite. The term “substantially” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The limitation “a substantially under-cut shape” in the claim has been rendered indefinite by the use of the term “substantially”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kawakami (US 2005/0145861). Regarding claim 1, Kawakami discloses, in FIGS. 1-2 and in related text, a display device comprising: a pixel circuit layer comprising a base layer (11) and a pixel circuit; and a light emitting element disposed on the pixel circuit layer and comprising: a first electrode (20); a second electrode (23); and a light emitting layer (22) electrically connected the first electrode and the second electrode, wherein the pixel circuit comprises a first transistor (17), the first transistor comprises: a first gate electrode (16); a first active layer (14a); a first source electrode; and a first drain electrode (19a, 19b) (see Kawakami, [0044], [0047], [0051]), the first electrode forms an open area (gap between repeating parts of first electrode 20 in FIG. 2), and the first gate electrode (16) and the open area overlap each other in a plan view (see Kawakami, FIG. 2, [0058]). Claims 1-2, 4-5, 14 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kawakami (US 2005/0161680). Regarding claim 1, Kawakami discloses, in FIGS. 1-2 and in related text, a display device comprising: a pixel circuit layer comprising a base layer (11) and a pixel circuit; and a light emitting element disposed on the pixel circuit layer and comprising: a first electrode (20); a second electrode (23); and a light emitting layer (22) electrically connected the first electrode and the second electrode, wherein the pixel circuit comprises a first transistor (16), the first transistor comprises: a first gate electrode (15); a first active layer (13); a first source electrode; and a first drain electrode (19a, 19b) (see Kawakami, [0036], [0039], [0041]), the first electrode forms an open area (gap between repeating parts of first electrode 20 in FIG. 2), and the first gate electrode (15) and the open area overlap each other in a plan view (see Kawakami, FIG. 2, [0050]-[0051]). Regarding claim 2, Kawakami discloses the device of claim 1. Kawakami discloses wherein the first gate electrode (15) is an uppermost conductive layer of the pixel circuit layer in an area including the first gate electrode (see Kawakami, FIG. 1). Regarding claim 4, Kawakami discloses the device of claim 1. Kawakami discloses wherein the first gate electrode (15) overlaps the second electrode (23) in a plan view (in vertical direction in FIG. 1) (see Kawakami, FIG. 1) Regarding claim 5, Kawakami discloses the device of claim 4. Kawakami discloses wherein the first gate electrode (15) forms a capacitance with the second electrode (23) (see Kawakami, FIG. 1, [0040]-[0041], [0062]-[0065], [0069]: first gate electrode 15 and second electrode 23 sandwich insulating layers 17, 18 and 21, thus form a capacitor). Regarding claim 14, Kawakami discloses the device of claim 1. Kawakami discloses wherein a shape of the open area (gap between repeating parts of first electrode 20 in FIG. 2) corresponds to a shape of the first gate electrode (15) (see Kawakami, FIG. 2: first gate electrode 15 extends in parallel with the gap). Regarding claim 16, Kawakami discloses the device of claim 1. Kawakami discloses wherein the first electrode (20) is a cathode electrode electrically connected to the light emitting layer (22), the second electrode (23) is an anode electrode electrically connected to the light emitting layer, and the first electrode is disposed between the second electrode and the base layer (11) (see Kawakami, FIG. 1, [0085]). Claim 20 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kawakami (US 2005/0161680). Regarding claim 20, Kawakami discloses, in FIGS. 1-2 and in related text, a display device comprising: a pixel circuit layer comprising a base layer (11) and a pixel circuit; and a light emitting element disposed on the pixel circuit layer and comprising a first electrode (20), a second electrode (23), and a light emitting layer (22) electrically connected to the first electrode and the second electrode, wherein the pixel circuit comprises a driving transistor (16) (see Kawakami, [0036], [0039], [0093]), the first electrode (20) forms an open area (gap between repeating parts of first electrode 20), and the open area surrounds an edge of a gate electrode (15) of the driving transistor in a plan view (see Kawakami, FIG. 2, [0050]-[0051]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Kawakami in view of Wikipedia (Wikipedia, OLED, 19 December 2022). Regarding claim 18, Kawakami discloses the device of claim 1. Kawakami discloses that the light emitting layer (22) between cathode and anode (first and second electrodes 20, 23) of the light emitting element is an organic material (see Kawakami, [0039], [0048]). Kawakami does not explicitly disclose wherein the light emitting element is an organic light emitting diode (OLED). Wikipedia teaches an organic light emitting diode includes an organic layer between cathode and anode (see Wikipedia, Working principle). Wikipedia teaches wherein the light emitting element is an organic light emitting diode (OLED). Kawakami and Wikipedia are analogous art because they both are directed to display devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kawakami with the features of Wikipedia because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Kawakami to include wherein the light emitting element is an organic light emitting diode (OLED), as taught by Wikipedia, to provide a display without a backlight (see Wikipedia, first page). Allowable Subject Matter Claims 3 and 6-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 19 is allowed. The following is a statement of reasons for the indication of allowable subject matter: The prior art of record, Kawakami, discloses wherein the pixel circuit layer comprises: an active layer; an interlayer conductive layer that form the pixel circuit, at least a portion of the first gate electrode is formed by the interlayer conductive layer. The prior art of records, individually or in combination, do not disclose nor teach “a lower auxiliary electrode layer; the lower auxiliary electrode layer is closer to the base layer than the interlayer conductive layer” in combination with other limitations as recited in claim 3. The prior art of records, individually or in combination, do not disclose nor teach “a bridge electrode layer, the bridge electrode layer and the first electrode being disposed on a same layer and electrically connected to each other, wherein the first electrode forms a peripheral opening area, and the peripheral opening area surrounds the bridge electrode layer.” in combination with other limitations as recited in claim 6. The prior art of record, Park (US 2021/0043707), discloses a display device comprising: a pixel circuit layer comprising a base layer and a pixel circuit disposed on the base layer; and a light-emitting-element layer comprising a light emitting element disposed on the pixel circuit layer and comprising a cathode electrode, an anode electrode, and a light emitting layer electrically connected to the cathode electrode and the anode electrode, wherein the pixel circuit layer comprises a lower auxiliary electrode layer, an active layer, and an interlayer conductive layer, the interlayer conductive layer is closer to the light-emitting-element layer than the lower auxiliary electrode layer, the pixel circuit comprises a first transistor and a second transistor, the first transistor comprises a first gate electrode, a first active layer, a first source electrode, and a first drain electrode, the second transistor comprises a second gate electrode, a second active layer, a second source electrode, and a second drain electrode, the second source electrode is electrically connected to the first gate electrode, the first gate electrode and the second gate electrode are formed by the interlayer conductive layer, the first active layer and the second active layer are formed by the active layer. See Park, FIGS. 1 and 8, and paragraphs [0044]-[0047], [0080], [0087] and [0153]-[0159]. The prior art of records, individually or in combination, do not disclose nor teach “the cathode electrode and at least a portion of the interlayer conductive layer forming the second gate electrode do not overlap each other in a plan view” in combination with other limitations as recited in claim 19. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHIH TSUN A CHOU whose telephone number is (408)918-7583. The examiner can normally be reached M-F 8:00-16:00 Arizona Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at (571) 272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHIH TSUN A CHOU/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Nov 15, 2023
Application Filed
Feb 24, 2026
Non-Final Rejection — §102, §103, §112
Apr 16, 2026
Interview Requested

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
93%
With Interview (+17.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 447 resolved cases by this examiner. Grant probability derived from career allow rate.

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