Prosecution Insights
Last updated: April 19, 2026
Application No. 18/509,629

SEMICONDUCTOR DIE STUCTURE WITH AIR GAPS AND METHOD FOR PREPARING THE SAME

Non-Final OA §102§103
Filed
Nov 15, 2023
Examiner
BEARDSLEY, JONAS TYLER
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nanya Technology Corporation
OA Round
1 (Non-Final)
58%
Grant Probability
Moderate
1-2
OA Rounds
3y 4m
To Grant
90%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allow Rate
158 granted / 270 resolved
-9.5% vs TC avg
Strong +31% interview lift
Without
With
+31.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
43 currently pending
Career history
313
Total Applications
across all art units

Statute-Specific Performance

§103
46.2%
+6.2% vs TC avg
§102
32.7%
-7.3% vs TC avg
§112
20.2%
-19.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 270 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-11 in the reply filed on 3/4/2026 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-3 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by YANG (US 20150091186). Regarding claim 1, YANG discloses a semiconductor die structure, comprising: a substrate (fig 4E, 41, para 56); a first supporting backbone (the left contact plug CP1, see fig 4E, para 57) disposed on the substrate; a second supporting backbone (the right contact plug CP1, see fig 4E, para 57) disposed on the substrate; a first conductor block disposed on the first supporting backbone (the left conductor L comprising 44 and 45, see fig 4E, para 59); a second conductor block disposed on the second supporting backbone (the right conductor L comprising 44 and 45, see fig 4E, para 59); and a plurality of third conductor blocks (the three lines L between the left and right lines, see fig 4E, para 59) disposed between the first conductor block and the second conductor block, wherein the plurality of third conductor blocks are suspended on the substrate (the lines L are at least indirectly on and over 41, and are attached to and suspended by 47, see fig 4E, para 66). Regarding claim 2, YANG discloses the semiconductor die structure of claim 1, further comprising: an air gap structure (the air gap structure comprising AG1, AG2 and 46, see fig 4E, para 65 and 70) disposed on the substrate and between the first conductor block and the second conductor block (46, AG1 and AG2 extend between the left and right lines L, see fig 4E), wherein the plurality of the third conductor blocks are suspended over the air gap structure (L extend over the structure comprising AG1, AG2 and 46, see fig 4E, para 70). Regarding claim 3, YANG discloses the semiconductor die structure of claim 2, wherein the air gap structure comprises: an air gap (air gaps AG1 and AG2, see fig 4E, para 70); and a liner layer enclosing the air gap (fig 4E, 46, para 65). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4-7, 9 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over YANG (US 20150091186) in view of BARK (US 20180261546). Regarding claim 4, YANG discloses the semiconductor die structure of claim 2. YANG fails to explicitly disclose a device, wherein the first conductor block comprises: a first contact; a second contact, disposed over the first contact; a third contact, disposed over the second contact; a fourth contact, disposed over the third contact; and a plurality of spacers, wherein the first contact, the second contact, the third contact, and the fourth contact are sandwiched by the plurality of spacers. BARK teaches a device, wherein the first conductor block (conductor GL which can comprise a stack of TiN / TaN / TiAlC / TiN / W see fig 17, para 132) comprises: a first contact (the lowest TiN layer of GL, see fig 17, see para 132); a second contact (the TaN layer on the lower TiN layer of GL, see fig 17, para 132), disposed over the first contact; a third contact (the TiAlC layer of GL, see fig 17, para 132), disposed over the second contact; a fourth contact (the W layer, of GL, see fig 17, para 132), disposed over the third contact; and a plurality of spacers (the spacers 662, see fig 17, para 133), wherein the first contact, the second contact, the third contact, and the fourth contact are sandwiched by the plurality of spacers (GL comprising the 4 layers is located between 662, see fig 17B). YANG and BARK are analogous art because they both are directed towards conductor structures for semiconductor devices, and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG with the multilayer structure of BARK because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG with the multilayer structure of BARK in order to suppress a resistance increase and a current leakage (see BARK para 139). Regarding claim 5, YANG and BARK disclose the semiconductor die structure of claim 4. YANG fails to explicitly disclose a device, wherein the first contact and the plurality of spacers are in contact with the first supporting backbone. BARK teaches a device, wherein the first contact and the plurality of spacers are in contact with the first supporting backbone (GL and 662 are at least indirectly in contact with support FA, see fig 17B, para 129). YANG and BARK are analogous art because they both are directed towards conductor structures for semiconductor devices, and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG with the spacers of BARK because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG with the spacers of BARK in order to suppress a resistance increase and a current leakage (see BARK para 139). Regarding claim 6, YANG and BARK disclose the semiconductor die structure of claim 4. YANG fails to explicitly disclose a device, further comprising: a first metal silicide, disposed over the first conductor block, wherein the first metal silicide is in contact with the fourth contact and the plurality of spacers; and a first hard mask, disposed over the first metal silicide. BARK teaches a device, further comprising: a first metal silicide (alloy capping layer 640 which can be a silicide as 140A, see fig 17C, para 138 and 28) , disposed over the first conductor block (640 is over a top of GL, see fig 17C), wherein the first metal silicide is in contact with the fourth contact and the plurality of spacers (640 is at least indirectly in contact with GL and 662, see fig 17); and a first hard mask, disposed over the first metal silicide (insulator layer 650 which can be the similar to 150, see fig 17, para 138). YANG and BARK are analogous art because they both are directed towards conductor structures for semiconductor devices, and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG with the specific materials of BARK because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG with the specific materials of BARK in order to suppress a resistance increase and a current leakage (see BARK para 139). Regarding claim 7, YANG and BARK disclose the semiconductor die structure of claim 6 YANG further discloses a device, further comprising: a first hard mask, disposed over the first metal silicide (insulator layer 650 which can be the similar to 150, see fig 17, para 138). YANG fails to explicitly disclose a device, further comprising: a first metal silicide, disposed over the first conductor block, wherein the first metal silicide is in contact with the fourth contact and the plurality of spacers. BARK teaches a device, further comprising a first metal silicide (alloy capping layer 640 which can be a silicide as 140A, see fig 17C, para 138 and 28) , disposed over the first conductor block (640 is over a top of GL, see fig 17C), wherein the first metal silicide is in contact with the fourth contact and the plurality of spacers (640 is at least indirectly in contact with GL and 662, see fig 17). YANG and BARK are analogous art because they both are directed towards conductor structures for semiconductor devices, and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG with the specific materials of BARK because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG with the specific materials of BARK in order to suppress a resistance increase and a current leakage (see BARK para 139). Regarding claim 9, YANG and BARK disclose the semiconductor die structure of claim 4. YANG fails to explicitly disclose a device, wherein the plurality of spacers comprises silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide. BARK teaches a device, wherein the plurality of spacers comprises silicon oxide, silicon nitride (662 can be SiN, see fig 17B, para 133), silicon oxynitride, or silicon nitride oxide. YANG and BARK are analogous art because they both are directed towards conductor structures for semiconductor devices, and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG with the specific materials of BARK because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG with the specific materials of BARK in order to suppress a resistance increase and a current leakage (see BARK para 139). Regarding claim 11, YANG and BARK disclose the semiconductor die structure of claim 10. YANG further discloses a device, wherein the first conductor block, the second conductor block, and the plurality of third conductor blocks are spaced apart from each other by the air gap structure (the conductors L are spaced apart by AG2, see fig 4E, para 25). Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over YANG (US 20150091186) in view of BARK (US 20180261546) and further in view of KIM (US 20080057666). Regarding claim 8, YANG and BARK disclose the semiconductor die structure of claim 4. YANG fails to explicitly disclose a device, wherein the first contact comprises doped polysilicon, metal, metal nitride, or metal silicide, the second contact comprises doped polysilicon, the third contact comprises tungsten, aluminum, copper, nickel, or cobalt, and the fourth contact comprises tungsten, aluminum, copper, nickel, or cobalt. BARK teaches a device, wherein the first contact comprises doped polysilicon, metal, metal nitride (the first contact can be the lowest TiN layer of GL, see fig 17, para 132), or metal silicide, the third contact comprises tungsten, aluminum (the TiAlC layer of GL, see fig 17, para 132), copper, nickel, or cobalt, and the fourth contact comprises tungsten (the W layer, of GL, see fig 17, para 132), aluminum, copper, nickel, or cobalt. YANG and BARK are analogous art because they both are directed towards conductor structures for semiconductor devices, and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG with the specific materials of BARK because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG with the specific materials of BARK in order to suppress a resistance increase and a current leakage (see BARK para 139). YANG and BARK fail to explicitly disclose a device wherien the second contact comprises doped polysilicon. KIM teaches a device wherein the second contact comprises doped polysilicon (gate layer 108 can be polysilicon, see fig 1G, para 13). YANG, BARK and KIM are analogous art because they both are directed towards conductor structures for semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG and BARK with the material of KIM because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG and BARK with the material of KIM in order to reduce interference and increase the device speed (see KIM para 21-22). Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over YANG (US 20150091186) in view of BARK (US 20180261546) and further in view of RHA (US 20150037980). Regarding claim 10, YANG and BARK disclose the semiconductor die structure of claim 4. YANG fails to explicitly disclose a device wherein a top surface of the third contact is lower than a top surface of the air gap structure. RHA teaches a device wherein a top surface of the third contact is lower than a top surface of the air gap structure (the top surface of the air gap 51 is higher than a top surface of the entire electrode, see fig 11, para 90 and 51). YANG, BARK and RHA are analogous art because they both are directed towards conductive structures for semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of YANG and BARK with the conductor being lower than the air gap structure of RHA because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of YANG and BARK with the conductor being lower than the air gap structure of RHA in order to improve operation speed (see RHA para 168). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONAS TYLER BEARDSLEY whose telephone number is (571)272-3227. The examiner can normally be reached 930-600 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONAS T BEARDSLEY/Examiner, Art Unit 2811 /SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Nov 15, 2023
Application Filed
Mar 25, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
58%
Grant Probability
90%
With Interview (+31.0%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 270 resolved cases by this examiner. Grant probability derived from career allow rate.

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