DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Election/Restrictions
Applicant’s election without traverse of Group II, claims 18-20 in the reply filed on 4/14/2026 is acknowledged.
Group I, claims 1-17 are canceled. Claims 18 and 20 are amended. Claims 21-22 are new.
Information Disclosure Statement
Applicant is suggested/reminded to disclose relevant prior art(s) or other information that may be material to the patentability of the invention in a pending application. The prior art information must be submitted in the form of an information Disclosure Statement (“IDS”) (see MPEP 609 & 2001 and 37 CFR 1.56).
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 18-37 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 18 recites the limitation “forming an isolation hole to isolate the adjacent two of the active components” in line 5. Paragraph [0009] defines each active component as including a gate. However, as illustrated in FIGS. 3A-3C and described in paragraphs [0028] and [0032]-[0033], the isolation hole is formed through a previously formed active component, after which the isolation component is formed therein.
Accordingly, it is unclear which “the adjacent two of the active components” are isolated by the recited isolation hole. Therefore, the scope of the claimed manufacturing step is not reasonably clear.
For best understand and examination purpose, the claim will be best considered based on drawings, disclosure, and/or any applicable prior arts; and the claim limitation “forming an isolation hole to isolate the adjacent two of the active components” will be interpreted as “forming an isolation hole to isolate two active components” in the instant Office Action.
Claims 19-27 are rejected due to their dependency.
Claims 28 and 33 recite the limitation “forming an isolation hole to isolate the adjacent two of the active components” in line 4. However, this limitation is indefinite for substantially the same reasons discussed above with respect to claim 18 because it is unclear which “the adjacent two of the active components” are isolated by the recited isolation hole.
Claims 29-32 and 34-37 are rejected due to their dependency.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 18-19, 21-22, 28-29, 31-34, and 36-37 are rejected under 35 U.S.C. 103 as being unpatentable over Liaw (US 2021/0296185) in view of Lin et al. (US 2022/0352180; hereinafter ‘Lin’).
Regarding claim 18, Liaw teaches a manufacturing method for a semiconductor device [0007], comprising:
forming a plurality of active components (201-206 over 111a-111b, 112a-112d, 113a-113b, Fig. 19A, [0029, 0074]) on a substrate (110, [0074]);
forming an isolation hole (662, Fig. 20A, [0075]) to isolate the adjacent two of the active components (662 for isolating 202 and 204);
forming a dielectric structure (670 remaining in 662 after CMP, Figs. 21A and 22A, [0076]; ‘670R’) of an isolation component (312, [0076]) within the isolation hole (662);
forming a plug structure (394, Fig. 35A, [0092]; hereinafter ‘394312’) of the isolation component (312) within the isolation hole (662); and
forming a metal gate (185, 186, 188, 258, 259, and 390, Fig. 24A, 25A, 26A, 29A, 32A, and 35A, [0078, 0080, 0082, 0085, 0088, 0092]; hereinafter ‘MG’) on a corresponding active components (202 and 204).
Liaw does not explicitly teach that the plug structure is formed of a material the same as that of the metal gate.
Liaw, however, teaches that both the plug structure 394312 and the gate dielectric layer 185 of the metal gate MG share overlapping the high-k dielectric material selections, including HfO2, HfSiO, HfTaO, HfTiO, HfZrO, and Al2O3, [0079, 0100].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method for a semiconductor device, wherein the plug structure is formed of a material the same as that of the metal gate as claimed, because material commonality between the plug structure and the metal gate permits use of a common high-k integration scheme, thereby facilitating process integration, reducing manufacturing complexity, and improving material compatibility within the replacement-gate structure [0079, 0100]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Liaw does not teach that each active component comprises a plurality of active channel sheets vertically stacked.
Lin teaches a manufacturing method for a semiconductor device (100, FIG. 6, [0052]) wherein each active component (204 and 206, FIG. 4, [0033]) comprises a plurality of active channel sheets (207 and 209, FIG. 7A, [0038, 0055]) vertically stacked (207 and 209 vertically stacked).
As taught by Lin, one of ordinary skill in the art would utilize and modify the above teaching into Liaw to obtain and achieve the manufacturing method for a semiconductor device wherein each active component comprises a plurality of active channel sheets vertically stacked as claimed, because vertically stacked active channel sheets provide better gate control, lower leakage current, and improved scaling capability [0026].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lin in combination with Liaw due to above reason.
Regarding claim 19, Liaw in view of Lin teaches the manufacturing method as claimed in claim 18, wherein in forming the plug structure of the isolation component within the isolation hole, the plug structure is a high-k layer (Liaw: 394312 is a high-k layer, [0100]).
Regarding claim 21, Liaw in view of Lin teaches the manufacturing method as claimed in claim 18, further comprising: forming a patterned mask (Liaw: 650, Fig. 19A, [0074]) to cover some of the active components (650 covers 202, 204, and 205), wherein the patterned mask has an opening (650 has 651-653).
Liaw does not explicitly teach that the patterned mask is the patterned hard mask.
Liaw, however, teaches that masks used in photolithography processes are implemented as hard masks [0051, 0065]. The photoresist layer 650 corresponding to the patterned mask is patterned to form openings and functions as an etching mask that protects the underlying structures during the subsequent removal process [0074-0075].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method wherein the patterned mask is the patterned hard mask as claimed, because employing a hard mask protects the underlying dummy gate electrode layer and gate dielectric layer during the subsequent etching process, thereby improving etching selectivity and process robustness [0065].
Regarding claim 22, Liaw in view of Lin teaches the manufacturing method as claimed in claim 21, wherein in forming the isolation hole to isolate the adjacent two of the active components, the isolation hole is formed through the opening of the patterned hard mask (Liaw: 662 is formed through 652 of 650, Figs. 19A and 20A).
Regarding claim 28, Liaw teaches a manufacturing method for a semiconductor device [0007], comprising:
forming a plurality of active components (201-206 over 111a-111b, 112a-112d, 113a-113b, Fig. 19A, [0029, 0074]) on a substrate (110, [0074]);
forming an isolation hole (662, Fig. 20A, [0075]) to isolate the adjacent two of the active components (662 for isolating 202 and 204);
forming a dielectric structure (670 remaining in 662 after CMP, Figs. 21A and 22A, [0076]; ‘670R’) of an isolation component (312, [0076]) within the isolation hole (662);
forming a plug structure (394, Fig. 35A, [0092]; hereinafter ‘394312’) of the isolation component (312) within the isolation hole (662), wherein the plug structure is a top portion of the isolation component (394 is a top portion of 312, Fig. 35A); and
forming a metal gate (185, 186, 188, 258, 259, and 390, Fig. 24A, 25A, 26A, 29A, 32A, and 35A, [0078, 0080, 0082, 0085, 0088, 0092]; hereinafter ‘MG’) on a corresponding active components (202 and 204).
Liaw does not explicitly teach that the plug structure is formed of a material the same as that of the metal gate.
Liaw, however, teaches that both the plug structure 394312 and the gate dielectric layer 185 of the metal gate MG share overlapping the high-k dielectric material selections, including HfO2, HfSiO, HfTaO, HfTiO, HfZrO, and Al2O3, [0079, 0100].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method for a semiconductor device, wherein the plug structure is formed of a material the same as that of the metal gate as claimed, because material commonality between the plug structure and the metal gate permits use of a common high-k integration scheme, thereby facilitating process integration, reducing manufacturing complexity, and improving material compatibility within the replacement-gate structure [0079, 0100]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Liaw does not teach that each active component comprises a plurality of active channel sheets vertically stacked.
Lin teaches a manufacturing method for a semiconductor device (100, FIG. 6, [0052]) wherein each active component (204 and 206, FIG. 4, [0033]) comprises a plurality of active channel sheets (207 and 209, FIG. 7A, [0038, 0055]) vertically stacked (207 and 209 vertically stacked).
As taught by Lin, one of ordinary skill in the art would utilize and modify the above teaching into Liaw to obtain and achieve the manufacturing method for a semiconductor device wherein each active component comprises a plurality of active channel sheets vertically stacked as claimed, because vertically stacked active channel sheets provide better gate control, lower leakage current, and improved scaling capability [0026].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lin in combination with Liaw due to above reason.
Regarding claim 29, Liaw in view of Lin teaches the manufacturing method as claimed in claim 28, wherein in forming the plug structure of the isolation component within the isolation hole, the plug structure is a high-k layer (Liaw: 394312 is a high-k layer, [0100]).
Regarding claim 31, Liaw in view of Lin teaches the manufacturing method as claimed in claim 28, further comprising: forming a patterned mask (Liaw: 650, Fig. 19A, [0074]) to cover some of the active components (650 covers 202, 204, and 205), wherein the patterned mask has an opening (650 has 651-653).
Liaw does not explicitly teach that the patterned mask is the patterned hard mask.
Liaw, however, teaches that masks used in photolithography processes are implemented as hard masks [0051, 0065]. The photoresist layer 650 corresponding to the patterned mask is patterned to form openings and functions as an etching mask that protects the underlying structures during the subsequent removal process [0074-0075].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method wherein the patterned mask is the patterned hard mask as claimed, because employing a hard mask protects the underlying dummy gate electrode layer and gate dielectric layer during the subsequent etching process, thereby improving etching selectivity and process robustness [0065].
Regarding claim 32, Liaw in view of Lin teaches the manufacturing method as claimed in claim 31, wherein in forming the isolation hole to isolate the adjacent two of the active components, the isolation hole is formed through the opening of the patterned hard mask (Liaw: 662 is formed through 652 of 650, Figs. 19A and 20A).
Regarding claim 33, Liaw teaches a manufacturing method for a semiconductor device [0007], comprising:
forming a plurality of active components (201-206 over 111a-111b, 112a-112d, 113a-113b, Fig. 19A, [0029, 0074]) on a substrate (110, [0074]);
forming an isolation hole (662, Fig. 20A, [0075]) to isolate the adjacent two of the active components (662 for isolating 202 and 204);
forming a dielectric structure (670 remaining in 662 after CMP, Figs. 21A and 22A, [0076]; ‘670R’) of an isolation component (312, [0076]) within the isolation hole (662), wherein the dielectric structure has an upper surface (670R has an upper surface, Fig. 22A);
forming a plug structure (394, Fig. 35A, [0092]; hereinafter ‘394312’) of the isolation component (312) within the isolation hole (662); and
forming a metal gate (185, 186, 188, 258, 259, and 390, Fig. 24A, 25A, 26A, 29A, 32A, and 35A, [0078, 0080, 0082, 0085, 0088, 0092]; hereinafter ‘MG’) on a corresponding active components (202 and 204), wherein the metal gate has an upper surface (MG has an upper surface), and the upper surface of the dielectric structure and the upper surface of the metal gate are flush with each other (the upper surfaces of 670R is flush with the upper surface of MG, Fig. 35A).
Liaw does not explicitly teach that the plug structure is formed of a material the same as that of the metal gate.
Liaw, however, teaches that both the plug structure 394312 and the gate dielectric layer 185 of the metal gate MG share overlapping the high-k dielectric material selections, including HfO2, HfSiO, HfTaO, HfTiO, HfZrO, and Al2O3, [0079, 0100].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method for a semiconductor device, wherein the plug structure is formed of a material the same as that of the metal gate as claimed, because material commonality between the plug structure and the metal gate permits use of a common high-k integration scheme, thereby facilitating process integration, reducing manufacturing complexity, and improving material compatibility within the replacement-gate structure [0079, 0100]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Liaw does not teach that each active component comprises a plurality of active channel sheets vertically stacked.
Lin teaches a manufacturing method for a semiconductor device (100, FIG. 6, [0052]) wherein each active component (204 and 206, FIG. 4, [0033]) comprises a plurality of active channel sheets (207 and 209, FIG. 7A, [0038, 0055]) vertically stacked (207 and 209 vertically stacked).
As taught by Lin, one of ordinary skill in the art would utilize and modify the above teaching into Liaw to obtain and achieve the manufacturing method for a semiconductor device wherein each active component comprises a plurality of active channel sheets vertically stacked as claimed, because vertically stacked active channel sheets provide better gate control, lower leakage current, and improved scaling capability [0026].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lin in combination with Liaw due to above reason.
Regarding claim 34, Liaw in view of Lin teaches the manufacturing method as claimed in claim 33, wherein in forming the plug structure of the isolation component within the isolation hole, the plug structure is a high-k layer (Liaw: 394312 is a high-k layer, [0100]).
Regarding claim 36, Liaw in view of Lin teaches the manufacturing method as claimed in claim 33, further comprising: forming a patterned mask (Liaw: 650, Fig. 19A, [0074]) to cover some of the active components (650 covers 202, 204, and 205), wherein the patterned mask has an opening (650 has 651-653).
Liaw does not explicitly teach that the patterned mask is the patterned hard mask.
Liaw, however, teaches that masks used in photolithography processes are implemented as hard masks [0051, 0065]. The photoresist layer 650 corresponding to the patterned mask is patterned to form openings and functions as an etching mask that protects the underlying structures during the subsequent removal process [0074-0075].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method wherein the patterned mask is the patterned hard mask as claimed, because employing a hard mask protects the underlying dummy gate electrode layer and gate dielectric layer during the subsequent etching process, thereby improving etching selectivity and process robustness [0065].
Regarding claim 37, Liaw in view of Lin teaches the manufacturing method as claimed in claim 36, wherein in forming the isolation hole to isolate the adjacent two of the active components, the isolation hole is formed through the opening of the patterned hard mask (Liaw: 662 is formed through 652 of 650, Figs. 19A and 20A).
Claims 20, 23-27, 30, and 35 are rejected under 35 U.S.C. 103 as being unpatentable over Liaw (US 2021/0296185) in view of Lin (US 2022/0352180), and further in view of Lo et al. (US 2017/0316983; hereinafter ‘Lo’).
Regarding claim 20, Liaw in view of Lin teaches the manufacturing method as claimed in claim 18,
wherein in forming the metal gate (Liaw: MG, Fig. 35A) on the corresponding active component of the active components (202 and 204, Fig. 19A), the metal gate comprises a first high-k layer (185 includes a high-k dielectric layer such as HfO2, HfSiO, HfTaO, HfTiO, HfZrO, Al2O3, [0079]) and a first metal (186 includes TaN and 188 includes TiN, [0081, 0082]);
in forming the plug structure of the isolation component within the isolation hole (394312), the plug structure comprises a second high-k layer (394312 includes a high-k layer such as HfO2, HfSiO, HfTaO, HfTiO, HfZrO, Al2O3, [0100]).
Liaw does not explicitly teach that the first high-k layer is formed of a material the same as that of the second high-k layer.
Liaw, however, teaches that both the first high-k layer 185 of the metal gate MG and the second high-k layer of the plug structure 394312 share overlapping material selections, including HfO2, HfSiO, HfTaO, HfTiO, HfZrO, and Al2O3, [0079, 0100].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method wherein the first high-k layer is formed of a material the same as that of the second high-k layer as claimed, because material commonality between the plug structure and the metal gate permits use of a common high-k integration scheme, thereby facilitating process integration, reducing manufacturing complexity, and improving material compatibility within the replacement-gate structure [0079, 0100]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Liaw in view of Lin does not teach the manufacturing method wherein the plug structure comprises a second metal and the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure.
Lo teaches a manufacturing method (100, FIG. 1, [0012]) wherein the plug structure comprises a second metal (the plug structure 520 including a glue layer and second metal 515, [0035]) and first metal of the metal gate (the metal gates 230A and 230B include a first metal such as W and Al, FIG. 7, [0018]) and the second metal of the plug structure (520 including the second metal 515 with Al and W, [0035]).
Lo does not explicitly teach that the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure.
Lo, however, teaches that both the first metal of the metal gates 230A/230B and the second metal of the plug structure 520 share overlapping metal selections, including W and Al, [0018, 0035].
As taught by Lo, one of ordinary skill in the art would utilize and modify the above teaching into Liaw in view of Lin to obtain and achieve the manufacturing method wherein the plug structure comprises a second metal and the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure as claimed, because employing a common conductive material for multiple conductive feature simplifies fabrication and reduces manufacturing complexity, consistent with the fabrication simplicity and cost reduction [0026]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lo in combination with Liaw in view of Lin due to above reason.
Regarding claim 23, Liaw in view of Lin teaches the manufacturing method as claimed in claim 18, but does not teach the manufacturing method wherein forming the dielectric structure of the isolation component within the isolation hole comprises forming a first dielectric layer, a second dielectric layer and a third dielectric layer in the isolation hole; wherein the second dielectric layer is disposed between the first dielectric layer and the third dielectric layer.
Lo teaches a manufacturing method (100, FIG. 1, [0012])
wherein forming the dielectric structure (a dielectric structure including the patterned ESL 310 and the multiple films of dielectric material layer 505, FIG. 6, [0033, 0035]) of the isolation component (an isolation component including the dielectric structure and the plug structure 520, [0035]) within the isolation hole (430, [0033]), comprises
forming a first dielectric layer (a portion of 310 in 430, [0027, 0031]; hereinafter ‘310430’), a second dielectric layer (a first film of 505, [0034]; hereinafter ‘505F’) and a third dielectric layer (a second film of 505; hereinafter ‘505S’) in the isolation hole (430);
wherein the second dielectric layer is disposed between the first dielectric layer and the third dielectric layer (505F is disposed between 310430 and 505S, since 310 and the multiple films of 505 are sequentially stacked within 430).
As taught by Lo, one of ordinary skill in the art would utilize and modify the above teaching into Liaw in view of Lin to obtain and achieve the manufacturing method wherein forming the dielectric structure of the isolation component within the isolation hole comprises forming a first dielectric layer, a second dielectric layer and a third dielectric layer in the isolation hole; wherein the second dielectric layer is disposed between the first dielectric layer and the third dielectric layer as claimed, because multiple dielectric layers improve electrical insulation and facilitate electrically isolating the plug structure from adjacent conductive structures [0036].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lo in combination with Liaw in view of Lin due to above reason.
Regarding claim 24, Liaw in view of Lin and Lo teaches the manufacturing method as claimed in claim 23, Liaw in view of Lin does not teach the manufacturing method wherein forming the dielectric structure of the isolation component within the isolation hole further comprises: forming a first dielectric layer material, a second dielectric layer material and a third dielectric layer material to fill the isolation hole and over a patterned hard mask which covers some of the active components.
Lo teaches the manufacturing method wherein forming the dielectric structure of the isolation component within the isolation hole further comprises: forming a first dielectric layer material (310, FIG. 3), a second dielectric layer material (a first film of 505, FIG. 6A) and a third dielectric layer material (a second film of 505, FIG. 6A) to fill the isolation hole (430) and over a patterned hard mask (410, FIG. 4, [0029]) which covers some of the active components (230A and 230B, FIG. 4).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Lo to obtain and achieve the manufacturing method wherein forming the dielectric structure of the isolation component within the isolation hole further comprises: forming a first dielectric layer material, a second dielectric layer material and a third dielectric layer material to fill the isolation hole and over a patterned hard mask which covers some of the active components as claimed, because the patterned hard mask is used to define the opening and facilitate filling of dielectric materials in the desired regions [0029-0031].
Regarding claim 25, Liaw in view of Lin and Lo teaches the manufacturing method as claimed in claim 24, Liaw in view of Lin does not teach the manufacturing method further comprising: removing a portion of the first dielectric layer material, a portion of the second dielectric layer material and a portion of the third dielectric layer material, wherein a remaining portion of the first dielectric layer material forms the first dielectric layer, a remaining portion of the second dielectric layer material forms the second dielectric layer, and a remaining portion of the third dielectric layer material forms the third dielectric layer.
Lo teaches the manufacturing method further comprising: removing a portion of the first dielectric layer material (removing a portion of 310 during formation of 430, thereby exposing a remaining portion of 310, [0027, 0031]), a portion of the second dielectric layer material (removing the first film of 505 during anisotropic etching, FIGS. 6A-6B, [0033]) and a portion of the third dielectric layer material (removing the second film of 505 during anisotropic etching), wherein a remaining portion of the first dielectric layer material forms the first dielectric layer (a remaining portion of 310 forms 310430), a remaining portion of the second dielectric layer material forms the second dielectric layer (a remaining portion of the first film of 505 forms a first portion of dielectric spacer 510 (505F), FIG. 6B, [0033]), and a remaining portion of the third dielectric layer material forms the third dielectric layer (a remaining portion of the second film of 505 forms a second portion of dielectric spacer 510 (505S)).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Lo to obtain and achieve the manufacturing method further comprising: removing a portion of the first dielectric layer material, a portion of the second dielectric layer material and a portion of the third dielectric layer material, wherein a remaining portion of the first dielectric layer material forms the first dielectric layer, a remaining portion of the second dielectric layer material forms the second dielectric layer, and a remaining portion of the third dielectric layer material forms the third dielectric layer as claimed, because selective etching removes portions of dielectric materials while leaving remaining portions in desired locations to define dielectric structures [0031, 0034].
Regarding claim 26, Liaw in view of Lin and Lo teaches the manufacturing method as claimed in claim 25, Liaw in view of Lin does not teach the manufacturing method further comprising: forming a recess in the third dielectric layer; and wherein in forming the plug structure of the isolation component within the isolation hole, the plug structure is formed within the recess.
Lo teaches the manufacturing method further comprising: forming a recess in the third dielectric layer (anisotropically etching dielectric material layer 505 to leave a central opening bounded by opposing portions of the second film 505S, FIG. 6B, [0033]); and wherein in forming the plug structure of the isolation component within the isolation hole, the plug structure is formed within the recess (520 is formed within the recess of 505S, FIG. 7).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Lo to obtain and achieve the manufacturing method further comprising: forming a recess in the third dielectric layer; and wherein in forming the plug structure of the isolation component within the isolation hole, the plug structure is formed within the recess as claimed, because a recess defined by dielectric layers provides a self-aligned opening for subsequent formation of the plug structure while maintaining electrical insulation from adjacent conductive features [0036].
Regarding claim 27, Liaw in view of Lin and Lo teaches the manufacturing method as claimed in claim 26, Liaw in view of Lin does not teach the manufacturing method wherein forming the plug structure of the isolation component comprises: forming a second high-k layer and a second metal in the recess, wherein the second high- k layer and the second metal form the plug structure.
Lo teaches the manufacturing method wherein forming the plug structure of the isolation component comprises: forming a second high-k layer (a glue layer includes TiN and TaN, [0035]) and a second metal (515, FIG. 7, [0035]) in the recess (the recess of 505S), wherein the second high- k layer and the second metal form the plug structure (the plug structure 520 including a glue layer and second metal 515).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Lo to obtain and achieve wherein forming the plug structure of the isolation component comprises: forming a second high-k layer and a second metal in the recess, wherein the second high- k layer and the second metal form the plug structure as claimed, because forming an adhesive (or glue) layer in the recess improves adhesion of the subsequently deposited metal and facilitates reliable formation of the plug structure within the recess [0035].
Regarding claim 30, Liaw in view of Lin teaches the manufacturing method as claimed in claim 28,
wherein in forming the metal gate (Liaw: MG, Fig. 35A) on the corresponding active component of the active components (202 and 204, Fig. 19A), the metal gate comprises a first high-k layer (185 includes a high-k dielectric layer such as HfO2, HfSiO, HfTaO, HfTiO, HfZrO, Al2O3, [0079]) and a first metal (186 includes TaN and 188 includes TiN, [0081, 0082]);
in forming the plug structure of the isolation component within the isolation hole (394312), the plug structure comprises a second high-k layer (394312 includes a high-k layer such as HfO2, HfSiO, HfTaO, HfTiO, HfZrO, Al2O3, [0100]).
Liaw does not explicitly teach that the first high-k layer is formed of a material the same as that of the second high-k layer.
Liaw, however, teaches that both the first high-k layer 185 of the metal gate MG and the second high-k layer of the plug structure 394312 share overlapping material selections, including HfO2, HfSiO, HfTaO, HfTiO, HfZrO, and Al2O3, [0079, 0100].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method wherein the first high-k layer is formed of a material the same as that of the second high-k layer as claimed, because material commonality between the plug structure and the metal gate permits use of a common high-k integration scheme, thereby facilitating process integration, reducing manufacturing complexity, and improving material compatibility within the replacement-gate structure [0079, 0100]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Liaw in view of Lin does not teach the manufacturing method wherein the plug structure comprises a second metal and the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure.
Lo teaches a manufacturing method (100, FIG. 1, [0012]) wherein the plug structure comprises a second metal (the plug structure 520 including a glue layer and second metal 515, [0035]) and first metal of the metal gate (the metal gates 230A and 230B include a first metal such as W and Al, FIG. 7, [0018]) and the second metal of the plug structure (520 including the second metal 515 with Al and W, [0035]).
Lo does not explicitly teach that the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure.
Lo, however, teaches that both the first metal of the metal gates 230A/230B and the second metal of the plug structure 520 share overlapping metal selections, including W and Al, [0018, 0035].
As taught by Lo, one of ordinary skill in the art would utilize and modify the above teaching into Liaw in view of Lin to obtain and achieve the manufacturing method wherein the plug structure comprises a second metal and the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure as claimed, because employing a common conductive material for multiple conductive feature simplifies fabrication and reduces manufacturing complexity, consistent with the fabrication simplicity and cost reduction [0026]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lo in combination with Liaw in view of Lin due to above reason.
Regarding claim 35, Liaw in view of Lin teaches the manufacturing method as claimed in claim 33,
wherein in forming the metal gate (Liaw: MG, Fig. 35A) on the corresponding active component of the active components (202 and 204, Fig. 19A), the metal gate comprises a first high-k layer (185 includes a high-k dielectric layer such as HfO2, HfSiO, HfTaO, HfTiO, HfZrO, Al2O3, [0079]) and a first metal (186 includes TaN and 188 includes TiN, [0081, 0082]);
in forming the plug structure of the isolation component within the isolation hole (394312), the plug structure comprises a second high-k layer (394312 includes a high-k layer such as HfO2, HfSiO, HfTaO, HfTiO, HfZrO, Al2O3, [0100]).
Liaw does not explicitly teach that the first high-k layer is formed of a material the same as that of the second high-k layer.
Liaw, however, teaches that both the first high-k layer 185 of the metal gate MG and the second high-k layer of the plug structure 394312 share overlapping material selections, including HfO2, HfSiO, HfTaO, HfTiO, HfZrO, and Al2O3, [0079, 0100].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Liaw to obtain and achieve the manufacturing method wherein the first high-k layer is formed of a material the same as that of the second high-k layer as claimed, because material commonality between the plug structure and the metal gate permits use of a common high-k integration scheme, thereby facilitating process integration, reducing manufacturing complexity, and improving material compatibility within the replacement-gate structure [0079, 0100]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Liaw in view of Lin does not teach the manufacturing method wherein the plug structure comprises a second metal and the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure.
Lo teaches a manufacturing method (100, FIG. 1, [0012]) wherein the plug structure comprises a second metal (the plug structure 520 including a glue layer and second metal 515, [0035]) and first metal of the metal gate (the metal gates 230A and 230B include a first metal such as W and Al, FIG. 7, [0018]) and the second metal of the plug structure (520 including the second metal 515 with Al and W, [0035]).
Lo does not explicitly teach that the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure.
Lo, however, teaches that both the first metal of the metal gates 230A/230B and the second metal of the plug structure 520 share overlapping metal selections, including W and Al, [0018, 0035].
As taught by Lo, one of ordinary skill in the art would utilize and modify the above teaching into Liaw in view of Lin to obtain and achieve the manufacturing method wherein the plug structure comprises a second metal and the first metal of the metal gate is formed of a material the same as that of the second metal of the plug structure as claimed, because employing a common conductive material for multiple conductive feature simplifies fabrication and reduces manufacturing complexity, consistent with the fabrication simplicity and cost reduction [0026]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lo in combination with Liaw in view of Lin due to above reason.
Conclusion
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/JIYOUNG OH/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 6/29/26
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