DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 11/15/23. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In claim 1, it is unclear whether the underfill is over the a top surface of the second dielectric layer or the third dielectric layer. Specifically, the third dielectric layer is over the second dielectric layer it is unclear how the underfill is on the top surface if the third dielectric layer is over the second dielectric layer.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. (US PGPub 2019/0006194, hereinafter after referred to as “Lin”).
Lin discloses the semiconductor device as claimed. See figures 1-28 and corresponding text, where Lin teaches, in claim 1,a structure comprising:
an encapsulant (1301); (figure 15; [0035])
a device die (801) in the encapsulant (1301); (figure 15; [0036])
a first dielectric layer (1503(1)) over the device die (801) and the encapsulant (1301);
a plurality of redistribution lines (1501) electrically coupling to the device die (801), wherein the plurality of redistribution lines (1501) comprise via portions in the first dielectric layer (1503);
an alignment mark (1607) over and contacting the first dielectric layer (1503), wherein the alignment mark comprises an elongate strip, and the elongated strip is electrically floating;
a second dielectric layer (1503(2)) over the first dielectric layer (1503(1)), wherein the second dielectric layer (1503(2)) contacts a top surface and sidewalls of the alignment mark;
a third dielectric layer (1503(3)) over the second dielectric layer; and
an underfill (1905) comprising a portion contacting a top surface of the second dielectric layer and a first sidewall of the third dielectric layer.
Lin teaches, in claim 2, wherein the portion of the underfill overlaps the alignment mark (figure 19A; [0048]).
Lin teaches, in claim 3, further comprising a fourth dielectric layer over the third dielectric layer (figure 19; [0048]).
Lin teaches, in claim 4, wherein the portion of the underfill further contacts a second sidewall of the fourth dielectric layer (figure 19; [0048]).
Lin teaches, in claim 5, wherein the second sidewall is laterally recessed from the first sidewall of the third dielectric layer toward a center line of the device die (figure 19; [0048]).
Lin teaches, in claim 6, wherein the elongated strip has a width and a length greater than the width (figure 19A; [0048]).
Lin teaches, in claim 7, further comprising a package component over and contacting the underfill (figure 19;[0048]).
Lin teaches, in claim 8, wherein the alignment mark comprises a same metal as the plurality of redistribution lines. (figure 17; [0045])
Lin teaches, in claim 9, wherein the alignment mark comprises a plurality of elongated strips parallel to each other, with a void being located in the plurality of elongated strips. (figure 17; [0045])
Lin teaches, in claim 10, wherein the alignment mark comprises a plurality of elongated strips that are physically connected to form a full ring (figure 17; [0045]).
Lin teaches, in claim 11, a structure comprising:
a package comprising: (figure 15; [0036])
a through-via;
a device die (801);
an encapsulant (1301) encapsulating the device die and the through-via therein;
an alignment mark (1607) over the encapsulant and electrically decoupled from the device die, wherein the alignment mark comprises a plurality of elongated strips parallel to each other; and
a first dielectric layer (1503) over and contacting the alignment mark; and
an underfill (1905) over the first dielectric layer, wherein the underfill is spaced apart from the alignment mark by the first dielectric layer.
Lin teaches, in claim 12, further comprising a second dielectric layer under the first dielectric layer, wherein the second dielectric layer is over and contacts the device die, the through-via, and the encapsulant. (figure 15; [0036])
Lin teaches, in claim 13, wherein the alignment mark comprises a bottom surface contacting a top surface of the second dielectric layer.
Lin teaches, in claim 14, further comprising a second dielectric layer over the first dielectric layer, wherein the underfill contacts a first sidewall of the second dielectric layer to form a vertical interface. (figure 15; [0036])
Lin teaches, in claim 15, further comprising a third dielectric layer over the second dielectric layer, wherein the underfill further contacts a second sidewall of the third dielectric layer. (figure 15; [0036])
Lin teaches, in claim 16, wherein the alignment mark is overlapped by a part of the underfill, with the part of the underfill comprising an additional sidewall contacting the first sidewall of the second dielectric layer. (figure 15; [0036])
Lin teaches, in claim 17, wherein all of the plurality of elongated strips of the alignment mark are electrically floating. (figure 17; [0045])
Lin teaches, in claim 18, a structure comprising: See figure 15; ([0036])
a device die;
an encapsulant encapsulating the device die therein;
a first dielectric layer over and contacting the device die and the encapsulant;
an alignment mark over and contacting a top surface of a part of the first dielectric layer, wherein the alignment mark comprises an elongated strip, and the elongated strip is electrically floating (figure 17; [0045]); and
a plurality of second dielectric layers over the first dielectric layer and comprising edges, wherein the edges of upper ones of the plurality of second dielectric layers are laterally recessed more than the edges of respective lower ones of the plurality of second dielectric layers, and wherein the part of the first dielectric layer extends beyond the edges of the second dielectric layers.
Lin teaches, in claim 19, wherein the alignment mark comprises a plurality of elongated strips that are electrically floating. (figure 17; [0045])
Lin teaches, in claim 20, further comprising an underfill contacting the edges of the plurality of second dielectric layers.
Conclusion
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/STANETTA D ISAAC/Examiner, Art Unit 2898 December 13, 2025