DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election with traverse of Group I, Species I (Fig. 4B), (claims 1-6, 8-16, and 20-27) in the reply filed on August 5, 2026 is acknowledged.
Claims 2, 7, 12-13, 15-19, and 28-33 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention and species, there being no allowable generic or linking claim.
Note. Claim 2 is withdrawn since it is not directed to Species I-Fig. 4B where the DC Signal is on during the first and second states. . Claim 12-13, 15-16 are withdrawn since it is not directed to Species I-Fig. 4B where the period of first, second, third, and fourth states are equal.
The traversal is on the ground(s) that the search and examination of the entire application would not place a serious burden on the Examiner. This is not found persuasive because the search and examination of the entire application would place a serious burden on the Examiner since the search required for the features of the elected invention is not co-extensive with the search required for the features of the non-elected invention. Furthermore, there are additional classes required for the non-elected invention. The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3-6, 8-11, 14, and 20-27 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Matsumoto et al. (U.S. 2007/0029194).
Referring to Figure 1 below and paragraphs [0068]-[0088], Matsumoto et al. disclose a plasma processing apparatus comprising: a chamber 10 (par.[0068]); a substrate support 16 disposed in the chamber and including a lower electrode (par.[0080]); an upper electrode 34 disposed above the substrate support (par.[0073]); a first RF power supply 48 electrically connected to the upper electrode and configured to generate a first RF signal (par.[0076]), the first RF signal having a first power level during a first state within a repeating period and a zero power level during a second state, a third state, and a fourth state within the repeating period (Note. The apparatus of Matsumoto et al. has a structure of a first RF power supply controller 49 and a controller 95 that controls the first RF power supply 48 (pars.[0076],[0085]-[0088]). Therefore, first RF power supply controller 49 and controller 95 are capable of and can be operated such that the first RF signal having a first power level during a first state within a repeating period and a zero power level during a second state, a third state, and a fourth state within the repeating period); a second RF power supply 90 electrically connected to the lower electrode and configured to generate a second RF signal (par.[0080]), the second RF signal having a zero power level during the first and second states, a second power level during the third state, and a third power level during the fourth state (Note. The apparatus of Matsumoto et al. has a structure of a second RF power supply controller 91 and a controller 95 that controls the second RF power supply 90 (pars.[0080],[0085]-[0088]). Therefore, second RF power supply controller 91 and controller 95 are capable of and can be operated such that the second RF signal having a zero power level during the first and second states, a second power level during the third state, and a third power level during the fourth state); and a DC power supply 50 electrically connected to the upper electrode and configured to generate a DC signal (par.[0077]).
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With respect to claim 3, the plasma processing apparatus of Matsumoto et al. further includes wherein the DC signal has a first voltage level with a negative polarity during the first and second states and a second voltage level during the third and fourth states, and an absolute value of the second voltage level is smaller than an absolute value of the first voltage level (Note. The apparatus of Matsumoto et al. has a structure of a DC power supply controller 51 and a controller 95 that controls the DC power supply 50 (pars.[0077],[0085]-[0088]). Therefore, DC power supply controller 51 and controller 95 are capable of and can be operated such that the DC signal has a first voltage level with a negative polarity during the first and second states and a second voltage level during the third and fourth states, and an absolute value of the second voltage level is smaller than an absolute value of the first voltage level).
With respect to claim 4, the plasma processing apparatus of Matsumoto et al. further includes wherein the second voltage level has a zero voltage level (i.e. off, par.[0077]).
With respect to claim 5, the plasma processing apparatus of Matsumoto et al. further includes wherein the first voltage level has a sequence of negative DC pulses having a pulse frequency in a range of 1 kHz to 100 kHz (As stated above, the apparatus of Matsumoto et al. has a structure of a DC power supply controller 51 and a controller 95 that controls the DC power supply 50 (pars.[0077],[0085]-[0088]). Therefore, DC power supply controller 51 and controller 95 are capable of and can be operated such that the first voltage level has a sequence of negative DC pulses having a pulse frequency in a range of 1 kHz to 100 kHz).
With respect to claim 6, the plasma processing apparatus of Matsumoto et al. further includes wherein the second power level is higher than the third power level (A stated above, the apparatus of Matsumoto et al. has a structure of a second RF power supply controller 91 and a controller 95 that controls the second RF power supply 90 (pars.[0080],[0085]-[0088]). Therefore, second RF power supply controller 91 and controller 95 are capable of and can be operated such that wherein the second power level is higher than the third power level).
With respect to claim 8, the plasma processing apparatus of Matsumoto et al. further includes wherein the repeating period is equal to or shorter than 100 milliseconds (As stated above, the apparatus of Matsumoto et al. has a structure of a first RF power supply controller 49 and a controller 95 that controls the timing of the first RF power supply 48 (pars.[0076],[0085]). Therefore, first RF power supply controller 49 and controller 95 are capable of and can be operated such that the repeating period is equal to or shorter than 100 milliseconds).
With respect to claim 9, the plasma processing apparatus of Matsumoto et al. further includes wherein the repeating period has a repeating frequency in a range of 10 Hz to 100 kHz (As stated above, the apparatus of Matsumoto et al. has a structure of a first RF power supply controller 49 and a controller 95 that controls the timing of the first RF power supply 48 (pars.[0076],[0085]). Therefore, first RF power supply controller 49 and controller 95 are capable of and can be operated such that the repeating period has a repeating frequency in a range of 10 Hz to 100 kHz).
With respect to claim 10, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the second state is equal to or shorter than 50 % of the repeating period (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the second state is equal to or shorter than 50 % of the repeating period).
With respect to claim 11, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the first state is equal to a period of the second state (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the first state is equal to a period of the second state).
With respect to claim 14, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the third state is equal to a period of the fourth state (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the first state is equal to a period of the second state).
With respect to claim 20, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the first state is in a range of 0.5 microseconds to 90 milliseconds (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the first state is in a range of 0.5 microseconds to 90 milliseconds).
With respect to claim 21, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the second state is in a range of 0.5 microseconds to 90 milliseconds (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the second state is in a range of 0.5 microseconds to 90 milliseconds).
With respect to claim 22, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the third state is in a range of 0.5 microseconds to 90 milliseconds (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the third state is in a range of 0.5 microseconds to 90 milliseconds).
With respect to claim 23, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the fourth state is in a range of 0.5 microseconds to 90 milliseconds (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the fourth state is in a range of 0.5 microseconds to 90 milliseconds).
With respect to claim 24, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the first state is in a range of 5 % to 90 % of the repeating period (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the first state is in a range of 5 % to 90 % of the repeating period).
With respect to claim 25, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the second state is in a range of 5 % to 90 % of the repeating period (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the second state is in a range of 5 % to 90 % of the repeating period).
With respect to claim 26, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the third state is in a range of 5 % to 90 % of the repeating period (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the third state is in a range of 5 % to 90 % of the repeating period).
With respect to claim 27, the plasma processing apparatus of Matsumoto et al. further includes wherein a period of the fourth state is in a range of 5 % to 90 % of the repeating period (As stated above, the apparatus of Matsumoto et al. has a structure of a controller 95 that controls the timing of the first RF power supply 48, the second RF power supply 90, and the DC power supply 50 (par.[0085]). Therefore, the controller 95 is capable of and can be operated such that a period of the fourth state is in a range of 5 % to 90 % of the repeating period).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Shimizu et al.’373, Tanaka’661, Iwasa et al.’003, Kim et al.’716, Koshimizu’745, Yoon et al.’124, Park’694, Hirano et al.’037, Nakagawa’305, Hirano et al.’842, Yamada et al.’905, Nishimura et al.’511, Tokashiki’689, Koguchi et al.’489, Mochiki et al.’162, Yatsuda et al.’350, Son et al.’965, and Koshiishi et al.’859 teach a chamber, a substrate support, an upper electrode, a first RF power supply, a second RF power supply, and a DC power supply. Kim et al.’717 teach a second RF power supply with different power levels.
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/Michelle CROWELL/Examiner, Art Unit 1716
/SYLVIA MACARTHUR/Primary Examiner, Art Unit 1716
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