Prosecution Insights
Last updated: April 19, 2026
Application No. 18/513,873

SEMICONDUCTOR DEVICES INCLUDING CIRCUITS UNDER INDUCTOR (CUL)

Non-Final OA §103§DP
Filed
Nov 20, 2023
Examiner
CAMPBELL, SHAUN M
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
81%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
742 granted / 1025 resolved
+4.4% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
47 currently pending
Career history
1072
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
53.2%
+13.2% vs TC avg
§102
26.5%
-13.5% vs TC avg
§112
14.3%
-25.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1025 resolved cases

Office Action

§103 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Election/Restrictions Applicant's election with traverse of Species A in the reply filed on 2/23/2026 is acknowledged. The traversal is on the ground(s) that there is no burden to examine Species A (where the filter is not located above the spiral inductor) and Species B (where the filter is located above the spiral inductor). Examiner agrees. The restriction requirement is hereby withdrawn. Specifically, the restriction requirement of Species A and Species B is withdrawn. In view of the above noted withdrawal of the restriction requirement, applicant is advised that if any claim presented in a divisional application is anticipated by, or includes all the limitations of, a claim that is allowable in the present application, such claim may be subject to provisional statutory and/or nonstatutory double patenting rejections over the claims of the instant application. Once a restriction requirement is withdrawn, the provisions of 35 U.S.C. 121 are no longer applicable. See In re Ziegler, 443 F.2d 1211, 1215, 170 USPQ 129, 131-32 (CCPA 1971). See also MPEP § 804.01. Claims 1-20 are presented for examination. Claim Objections Claim 16 is objected to because of the following informalities: The first recitation of RDL in the claims should recite the acronym. Specifically, redistribution layer (RDL). Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 3-5, 7-12, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US Pub. No. 2019/0164886 A1), hereafter referred to as Chen, in view of Smith et al. (US Pub. No. 2022/0173058 A1), hereafter referred to as Smith. As to claim 1, Chen discloses a semiconductor device (fig 1, 100; [0019]) comprising: a spiral inductor (102); a patterned ground shield (104) electrically coupled with the spiral inductor (102); and a circuit (106; [0019]) vertically spaced from the spiral inductor (102), the PGS (104) disposed between the circuit (106) and the spiral inductor (102; [0019]). Chen does not disclose a filter electrically coupled with the PGS. Nonetheless, Smith discloses a filter electrically coupled with a ground structure (fig 2A [0065]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to couple a filter to the PGS of Chen as taught by Smith since this will selectively filter out interfering frequencies. As to claim 3, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Chen further discloses wherein at least a portion of the circuit (106) is disposed in a layer (top layer) vertically adjacent to the PGS (104, [0019]). As to claim 4, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Chen further discloses wherein the spiral inductor (102) has a first terminal (1022) and a second terminal (1024), the first terminal extending over the PGS (104) along a same layer as a coil of the spiral inductor (1022), and the second terminal extending over the PGS along a layer disposed between the spiral inductor and the PGS (second terminal 1024 including the bridge region shown between coil metals 1032 and PGS metal 1048a). As to claim 5, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Smith further discloses wherein the filter comprises a second inductor in series with a resistor (fig 2A, L1 and R3), and it would have been obvious to one of ordinary skill in the art for the center frequency of the filter to correspond to an operating frequency of the spiral inductor since this will improve the shielding of the semiconductor circuits from the central frequency of the inductor. As to claim 7, Chen in view of Smith discloses the semiconductor device of claim 5 (paragraphs above). Smith further discloses wherein the second inductor is laterally spaced from the PGS (fig 3, [0069]). As to claim 8, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Chen further discloses wherein at least a portion of the circuit is disposed under a center region of the spiral inductor (106 under 102; [0019]). As to claim 9, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Chen further discloses wherein at least a portion of the circuit is disposed under a winding of the spiral inductor (106 under 102; [0019]). As to claim 10, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Smith further discloses wherein the filter is a notch filter (fig 2A; [0065]) and it would have been obvious to one of ordinary skill in the art for a center frequency to corresponding to an operating frequency of the circuit since this will improve the shielding of the semiconductor circuits from the central frequency of the inductor.. As to claim 11, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Smith further discloses wherein the filter is a notch filter (fig 2A; [0065]) having a center frequency corresponding to a component of a signal passing through the spiral inductor since this will improve the shielding of the semiconductor circuits from the central frequency of the inductor.. As to claim 12, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Smith further discloses wherein the filter is a notch filter having a center frequency exceeding about one GHz ([0071]). As to claim 19, Chen discloses a method for fabricating a semiconductor device (fig 1, 100; [0019]), comprising: forming a metallization layer over an active surface of a semiconductor substrate (fig 1, [0019]), the metallization layer comprising a first terminal of a patterned ground shield (104); and forming an inductor (102) over the metallization layer (104), the inductor (102) electrically coupled with the PGS (104). Chen does not disclose the first terminal connected to a shunt resistor of a filter having a center frequency exceeding one GHz. Nonetheless, Smith discloses a filter electrically coupled with a first terminal connected to a shunt resistor (R3) having a center frequency exceeding one GHz (fig 2A [0065]; [0071]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to couple a filter to the PGS of Chen as taught by Smith since this will selectively filter out interfering frequencies. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Smith and further in view of Chien et al. (US Pub. No. 2021/0296258 A1), hereafter referred to as Chien. As to claim 2, Chen in view of Smith discloses the semiconductor device of claim 1 (paragraphs above). Chen further discloses wherein the spiral inductor includes a redistribution layer ([0019]), however, fails to teach that the redistribution layer is copper. Nonetheless, Chien discloses a redistribution layer that is copper ([0036]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to make the metal layers of the spiral inductor of Chen from copper as taught by Chien since this will provide a low loss electrical connection. Allowable Subject Matter Claims 13-18 are allowed. Claims 6 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails to teach or suggest all of the limitations of claim 6, specifically, wherein the spiral inductor: is a multi-tap spiral inductor; and comprises taps for the second inductor, as recited in claim 6; wherein the capacitor and the second inductor operatively form an LC cavity, the LC cavity configured to resonate at the frequency, as recited in claim 13; or wherein the filter comprises: an aggregate capacitance of the PGS; the inductor; and the series resistor, the filter having an LC cavity at the center frequency, as recited in claim 20. Claims 14-18 are allowable because of their dependence from allowable claim 13. Pertinent Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US2023/0069734A1; US2019/0393148A1; and US2012/0242446A1. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAUN M CAMPBELL whose telephone number is (571)270-3830. The examiner can normally be reached on MWFS: 7:30-6pm Thurs 1-2pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Purvis, Sue can be reached at (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 3/5/2026
Read full office action

Prosecution Timeline

Nov 20, 2023
Application Filed
Mar 05, 2026
Non-Final Rejection — §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
81%
With Interview (+8.3%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 1025 resolved cases by this examiner. Grant probability derived from career allow rate.

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