DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on August 27, 2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 6, and 8-14 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2022/0165736 A1 to Ryu et al. (“Ryu”) in view of U.S. Patent Application Publication No. 2003/0124818 A1 to Luo et al. (“Luo”) and U.S. Patent Application Publication No. 2009/0160059 A1 to Ruan et al. (“Ruan”).
As to claim 1, although Ryu discloses a method of manufacturing a semiconductor device, comprising: providing a substrate (100); forming a bit line (295) on the substrate (100); forming an isolation spacer (305, 335, 355) on a side of the bit line (295), wherein the isolation spacer (305, 335, 355) comprises an air gap (335); forming a landing pad (425) over the bit line (295); and performing a deposition process to form an air gap protection structure (440, 450) to cover the landing pad (425) and the air gap (335); wherein the air gap protection structure (440, 450) is formed by: forming an upper portion (top thicker) horizontally disposed on and in contact with a top surface of the landing pad (425), wherein an upper surface of the upper portion (top thicker) is positioned above the top surface of the landing pad (425); forming a lower portion (side thinner) vertically disposed on and in contact with a lateral surface (left 425) of the landing pad (425) and to enclose the air gap (335); and forming a hole (at 430) by the upper portion (top thicker) and the lower portion (side thinner), wherein a width of a top opening of the hole (at 430) at the upper portion (top thicker) is less than a width of the hole (at 430) at the lower portion (side thinner); wherein a thickness of the upper portion (top thicker) is larger than a thickness of the lower portion (side thinner); wherein the thickness of the lower portion (side thinner) is a distance between a lateral surface of the upper portion (top thicker) and the lateral surface (left 425) of the landing pad (425); wherein the thickness of the upper portion (top thicker) is a distance between the upper surface of the upper portion (top thicker) and the top surface of the landing pad (425) (See Fig. 10, Fig. 11, Fig. 17, Fig. 19, ¶ 0026, ¶ 0047, ¶ 0069, ¶ 0072, ¶ 0074, ¶ 0081, ¶ 0095-¶ 0108) (Notes: the hole exists before forming 460 in the particular step), Ryu does not further disclose wherein a temperature during the deposition process ranges between about 530°C and about 570°C. However, Ryu does disclose the air gap protection structure (440, 450) includes silicon nitride and silicon carbonitride (See ¶ 0047). Luo further discloses wherein a temperature during the deposition process of silicon nitride ranges between about 530°C and about 570°C (See ¶ 0024, ¶ 0070, ¶ 0071, ¶ 0085) and Ruan discloses forming SiN by discontinuing the flow of the carbon-containing gas used to form the SiCN (See ¶ 0022). In view of the teachings of Ryu, Luo, and Ruan, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Ryu to have wherein a temperature during the deposition process ranges between about 530°C and about 570°C because the deposition processes of silicon nitride and silicon carbonitride are well-known in the art with suitable parameters such as with or without the carbon-containing gas and between about 530°C and about 570°C, where the parameters of at least temperature and gas mix are relatively controlled to determine the deposition rate and uniformity (See Luo ¶ 0024 and Ruan ¶ 0022). As to claim 2, Ryu in view of Luo and Ruan further discloses wherein gases used in the deposition process comprise SiH4, NH3, tetramethylsilane, and N2 (See Luo ¶ 0024, ¶ 0070, ¶ 0071, ¶ 0085). As to claim 3, Ryu in view of Luo and Ruan further discloses wherein He is not used during the deposition process (See Luo ¶ 0070, ¶ 0071, ¶ 0085). As to claim 6, Ryu in view of Luo and Ruan further discloses wherein a flow rate of NH3 during the deposition process is equal to or greater than 600 sccm (See Luo ¶ 0071). As to claim 8, Ryu in view of Luo and Ruan further discloses wherein a flow rate of N2 during the deposition process is less than 10000 sccm (See Luo ¶ 0071). As to claim 9, Ryu in view of Luo and Ruan further discloses wherein a deposition rate of the air gap protection structure (440, 450) is less than 15 Å/sec (See Luo ¶ 0085). As to claim 10, Ryu further discloses wherein a ratio between the thickness of the lower portion (side thinner) and the thickness of the upper portion (top thicker) is greater than 0.66 (See Fig. 17) (Notes: the limitation “portion” is defined as a part of any whole, either separated from or integrated with it by Dictionary.com). As to claim 11, Ryu discloses further comprising: forming a first dielectric layer (285) on the bit line (295); wherein the first dielectric layer (285) is made of high-k material; wherein the lower portion (side thinner) of the air gap protection structure (440, 450) is in direct contact with the first dielectric layer (285) (See Fig. 17, ¶ 0026) (Note: silicon nitride having a higher dielectric constant than silicon oxide meets the limitation “high-k material”). As to claim 12, Ryu further discloses wherein the isolation spacer (305, 335, 355) is formed on a side of the first dielectric layer (285); wherein the isolation spacer (305, 335, 355) comprises a second dielectric layer (305) formed on a sidewall of the bit line (295) and a sidewall of the first dielectric layer (285), and a third dielectric layer (395) disposed on the second dielectric layer (305); wherein the air gap (335) formed between the second dielectric layer (305) and the third dielectric layer (395) (See Fig. 17, ¶ 0095). As to claim 13, Ryu further discloses wherein the lower portion (side thinner) of the air gap protection structure (440, 450) is extended to cover a top surface of the second dielectric layer (305) and a top surface of the third dielectric layer (395) (See Fig. 19). As to claim 14, Ryu further discloses wherein the upper surface of the upper portion (top thicker) horizontally covers the top surface of the landing pad (425) and the lateral surface of the lower portion (side thinner) vertically covers the lateral surface (left 425) of the landing pad (425), wherein the width of the top opening of the hole (at 430) is defined at the upper surface of the air gap protection structure (440, 450) while the width of the hole (at 430) at the lower portion (side thinner) is defined at the lateral surface of the air gap protection structure (440, 450) (See Fig. 17).
Claim(s) 1-2, 4-5, 7, and 11-14 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2022/0165736 A1 to Ryu et al. (“Ryu”) in view of U.S. Patent No. 7,476,621 B1 to Nguyen et al. (“Nguyen”). As to claim 1, although Ryu discloses a method of manufacturing a semiconductor device, comprising: providing a substrate (100); forming a bit line (295) on the substrate (100); forming an isolation spacer (305, 335, 355) on a side of the bit line (295), wherein the isolation spacer (305, 335, 355) comprises an air gap (335); forming a landing pad (425) over the bit line (295); and performing a deposition process to form an air gap protection structure (440, 450) to cover the landing pad (425) and the air gap (335); wherein the air gap protection structure (440, 450) is formed by: forming an upper portion (top thicker) horizontally disposed on and in contact with a top surface of the landing pad (425), wherein an upper surface of the upper portion (top thicker) is positioned above the top surface of the landing pad (425); forming a lower portion (side thinner) vertically disposed on and in contact with a lateral surface (left 425) of the landing pad (425) and to enclose the air gap (335); and forming a hole (at 430) by the upper portion (top thicker) and the lower portion (side thinner), wherein a width of a top opening of the hole (at 430) at the upper portion (top thicker) is less than a width of the hole (at 430) at the lower portion (side thinner); wherein a thickness of the upper portion (top thicker) is larger than a thickness of the lower portion (side thinner); wherein the thickness of the lower portion (side thinner) is a distance between a lateral surface of the upper portion (top thicker) and the lateral surface (left 425) of the landing pad (425); wherein the thickness of the upper portion (top thicker) is a distance between the upper surface of the upper portion (top thicker) and the top surface of the landing pad (425) (See Fig. 10, Fig. 11, Fig. 17, Fig. 19, ¶ 0026, ¶ 0047, ¶ 0069, ¶ 0072, ¶ 0074, ¶ 0081, ¶ 0095-¶ 0108) (Notes: the hole exists before forming 460 in the particular step), Ryu does not further disclose wherein a temperature during the deposition process ranges between about 530°C and about 570°C), Ryu does not further disclose wherein a temperature during the deposition process ranges between about 530°C and about 570°C. However, Ryu does disclose the air gap protection structure (440, 450) includes silicon nitride and silicon carbonitride (See ¶ 0047). Nguyen further discloses wherein a temperature during the deposition process of silicon nitride ranges between about 530°C and about 570°C (See Column 4, lines 3-67, Column 5, lines 1-29, Column 10, lines 9-21) and Ruan discloses forming SiN by discontinuing the flow of the carbon-containing gas used to form the SiCN (See ¶ 0022). In view of the teachings of Ryu, Nguyen, and Ruan, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Song to have wherein a temperature during the deposition process ranges between about 530°C and about 570°C because the deposition processes of silicon nitride and silicon carbonitride are well-known in the art with suitable parameters such as with or without the carbon-containing gas and between about 530°C and about 570°C, where the parameters temperatures, precursors, and flow rates are adjusted to obtain efficient deposition reaction (See Nguyen Column 5, lines 4-29, Column 10, lines 9-21, and Ruan ¶ 0022). As to claim 2, Ryu in view of Nguyen and Ruan further discloses wherein gases used in the deposition process comprise SiH4, NH3, tetramethylsilane, and N2 (See Nguyen Column 4, lines 23-42). As to claim 4, Ryu in view of Nguyen and Ruan further discloses wherein a pressure of the deposition process is less than 3 torr (See Nguyen Column 4, lines 19-22, Column 5, lines 4-14). As to claim 5, Ryu in view of Nguyen and Ruan further discloses wherein a flow rate of SiH4 during the deposition process is equal to or greater than 200 sccm (See Nguyen Column 4, line 59). As to claim 7, Ryu in view of Nguyen and Ruan further discloses wherein a flow rate of tetramethylsilane during the deposition process is equal to or greater than 45 sccm (See Nguyen Column 5, lines 4-7). As to claim 11, Ryu discloses further comprising: forming a first dielectric layer (285) on the bit line (295); wherein the first dielectric layer (285) is made of high-k material; wherein the lower portion (side thinner) of the air gap protection structure (440, 450) is in direct contact with the first dielectric layer (285) (See Fig. 17, ¶ 0026) (Note: silicon nitride having a higher dielectric constant than silicon oxide meets the limitation “high-k material”). As to claim 12, Ryu further discloses wherein the isolation spacer (305, 335, 355) is formed on a side of the first dielectric layer (285); wherein the isolation spacer (305, 335, 355) comprises a second dielectric layer (305) formed on a sidewall of the bit line (295) and a sidewall of the first dielectric layer (285), and a third dielectric layer (395) disposed on the second dielectric layer (305); wherein the air gap (335) formed between the second dielectric layer (305) and the third dielectric layer (395) (See Fig. 17, ¶ 0095). As to claim 13, Ryu further discloses wherein the lower portion (side thinner) of the air gap protection structure (440, 450) is extended to cover a top surface of the second dielectric layer (305) and a top surface of the third dielectric layer (395) (See Fig. 19). As to claim 14, Ryu further discloses wherein the upper surface of the upper portion (top thicker) horizontally covers the top surface of the landing pad (425) and the lateral surface of the lower portion (side thinner) vertically covers the lateral surface (left 425) of the landing pad (425), wherein the width of the top opening of the hole (at 430) is defined at the upper surface of the air gap protection structure (440, 450) while the width of the hole (at 430) at the lower portion (side thinner) is defined at the lateral surface of the air gap protection structure (440, 450) (See Fig. 17). Further, the applicant also has not established the critical nature of the “pressure, flow rate, deposition rate, and ratio”. “The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims….In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range.” In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir.1990). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention was made to have various ranges. It would also have been obvious to one of ordinary skill in the art at the time the invention was made to discover the optimum or workable ranges by routine experimentations to adjust pressure, flow rate, deposition rate, and ratio to obtain the desired air gap protection structure. See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996) (claimed ranges of a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious).
Response to Arguments
Applicant's arguments with respect to claim 1 have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
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/DAVID CHEN/Primary Examiner, Art Unit 2815
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