DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention of Group I, Claims 1-8, in the reply filed on 03/05/2026 is acknowledged.
Claims 9-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 03/05/2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1 is/are rejected under 35 U.S.C. 103 as being obvious over Seo et al. (US 2023/0106004).
The applied reference has a common joint inventor with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Seo et al. discloses, as shown in Figures 3, 6-13, and 18-28, a display device comprising:
a light-emitting device (LE);
a first transistor (T1) that outputs a driving current applied to the light-emitting device;
a second transistor (T2) that transmits a data voltage to a first electrode of the first transistor; and
a third transistor (T3) electrically connected to a second electrode and a gate electrode of the first transistor, wherein
a first semiconductor layer (100) of the first transistor,
a third semiconductor layer (100) of the third transistor includes a third lower doping layer (DPA1, FP) and a third upper doping layer (DPA2, SP) sequentially disposed,
a concentration of phosphorus ions of the third lower doping layer is greater than a concentration of phosphorus ions of the third upper doping layer (see Figure 11), and
a concentration of boron ions of the third upper doping layer is greater than a concentration of boron ions of the third lower doping layer (see Figure 11).
Seo et al. does not disclose first semiconductor layer of the first transistor includes fluorine ions. However, it is well-known in the semiconductor art that, by doping the first semiconductor layer of the first transistor with fluorine ions, it would increase the conductivity of the semiconductor layer. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the first semiconductor layer of the first transistor of Seo et al. including fluorine ions in order to further improve the conductivity of the first semiconductor layer. Yamazaki et al. (CN 104508549 A) is cited to support the well-known position.
Regarding claim 2, Seo et al. discloses a maximum point of a concentration of phosphorus ions of the third semiconductor layer is disposed on the third lower doping layer (see Figure 11).
Regarding claim 3, Seo et al. discloses the device further comprising: a fourth transistor (T4) that transmits an initialization voltage to a gate electrode of the first transistor, wherein a fourth semiconductor layer of the fourth transistor includes a fourth lower doping layer and a fourth upper doping layer sequentially disposed, a concentration of phosphorus ions of the fourth lower doping layer is greater than a concentration of phosphorus ions of the fourth upper doping layer, and a concentration of boron ions of the fourth upper doping layer is greater than a concentration of boron ions of the fourth lower doping layer (see Figures 3 and 11, [0121]-[0123]).
Regarding claim 4, Seo et al. and Yamazaki et al. disclose a maximum point of the concentration of phosphorus ions of the fourth semiconductor layer is disposed on the fourth lower doping layer (see Figure 11).
Regarding claim 5, Seo et al. discloses the device further comprising: a fifth transistor (T5) that transmits a driving voltage to a first electrode of the first transistor; a sixth transistor (T6) that transmits the driving voltage to the light-emitting device from the fifth transistor; and a seventh transistor (T7) that electrically connects a first electrode of the fourth transistor to a first electrode of the sixth transistor (see Figures 3 and 11, [0121]-[0123]).
Regarding claim 6, Seo et al. discloses a fifth semiconductor layer of the fifth transistor includes a fifth lower doping layer and a fifth upper doping layer sequentially disposed, a concentration of phosphorus ions of the fifth lower doping layer is greater than a concentration of phosphorus ions of the fifth upper doping layer, a concentration of boron ions of the fifth upper doping layer is greater than a concentration of boron ions of the fifth lower doping layer, a sixth semiconductor layer of the sixth transistor includes a sixth lower doping layer and a sixth upper doping layer sequentially disposed, a concentration of phosphorus ions of the sixth lower doping layer is greater than a concentration of phosphorus ions of the sixth upper doping layer, a concentration of boron ions of the sixth upper doping layer is greater than a concentration of boron ions of the sixth lower doping layer, a seventh semiconductor layer of the seventh transistor includes a seventh lower doping layer and a seventh upper doping layer sequentially disposed, a concentration of phosphorus ions of the seventh lower doping layer is greater than a concentration of phosphorus ions of the seventh upper doping layer, and a concentration of boron ions of the seventh upper doping layer is greater than a concentration of boron ions of the seventh lower doping layer (see Figures 3 and 11, [0121]-[0123]).
Regarding claim 7, Seo et al. discloses a fifth semiconductor layer of the fifth transistor includes boron ions, a sixth semiconductor layer of the sixth transistor includes boron ions, and a seventh semiconductor layer of the seventh transistor includes boron ions (see Figures 3 and 11, [0121]-[0123]).
Regarding claim 8, it is conventional that the third transistor and the fourth transistor of Seo et al. are driven at a low frequency substantially equal to or less than about 60 Hz to reduce the power consumption.
Conclusion
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/HUNG K VU/ Primary Examiner, Art Unit 2897
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