DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of species III, claims 1-20, in the reply filed on March 5, 2024 is acknowledged.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on November 21, 2023 and March 3, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “dummy gate structure including a dummy gate stack and gate spacers on sidewalls of the dummy gate stack” and “the top source and the top drain being interposed by the dummy gate stack” (claim 16) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 3-7 and 17-20 are objected to because of the following informalities: a colon (:) should be used after “includes” (claims 3-5, 17 and 18); “chemical” should be removed after “radical” (claims 6 and 19); and “the” should be removed before “each” (claim 17). Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-10, 15 and 16-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There appears to be no adequate description in the specification for the claim limitations of “forming a bottom gate dielectric layer over and wrapping around bottom channels in the top channel region; performing a thermal annealing process to the bottom gate dielectric at a first temperature; forming a top gate dielectric layer over and wrapping around top channels in the top channel region; performing a radical treatment on the top dielectric layer in a supercritical fluid with a second temperature less than the first temperature”, as recited in claim 1 (note: the disclosure, i.e. paragraphs [0045]-[0054] and Fig. 2C (blocks 556-560) discloses that forming the second gate dielectric layer around each of the second channels in the second channel regions, next performing a superctrical fluid treatment to the second gate dielectric layer, then forming a second gate electrode over the second gate dielectric layer); “forming a bottom source and a bottom drain in the bottom substrate”, as recited in claims 8 and 15 (note: Fig. 1 shows a bottom source and a bottom drain are formed on the bottom substrate); “performing a thermal annealing process to the bottom gate structure at a (first) temperature”, as recited in claims 8, 15 and 16 (note: paragraphs [0018]-[0019] disclose that “each gate structure includes a gate dielectric layer …, and a gate electrode …”; paragraphs [0018] and [0032] and Fig. 2B disclose that the thermal annealing process is performed to the gate dielectric layer only).
Claims 16-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. There is no support in the specification for the claim limitations of “a second temperature less than the second temperature”, as recited in claim 16 because the disclosure does not enable an artisan to have a second temperature to be compared and less than itself.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claimed limitation of "a … channel region", as recited in claims 1, 11, and 16, is unclear as to whether said limitation is a conventional conductive channel region or merely a general region applicant refers.
The claimed limitations of "a bottom gate dielectric layer over and wrapping around bottom channels in the top channel region", as recited in claim 1, are unclear 1) as to which element is in the top channel region; and 2) as to whether a bottom gate dielectric layer over and wrapping around each or entirety of bottom channels applicant refers.
The claimed limitations of "a top gate dielectric layer over and wrapping around top channels in the top channel region", as recited in claim 1, are unclear 1) as to which element is in the top channel region; and 2) as to whether a top gate dielectric layer over and wrapping around each or entirety of top channels applicant refers.
Claim 1 recites the limitation "the top dielectric layer" in line 10. There is insufficient antecedent basis for this limitation in the claim. Also, it is unclear as to whether said limitation is the same as “a top gate dielectric layer”, as recited in claim 1, line 8.
The claimed limitation of "a supercritical fluid", as recited in claims 2, 3, 5 and 18, is unclear as to whether said limitation is the same as or different from "a supercritical fluid", as recited in claims 1 and 16, respectively.
Claims 2, 3, 5, 16 (lines 24 and 26) and 18 recite the limitation "the dielectric layer". There is insufficient antecedent basis for this limitation in the claims. Also, it is unclear as to whether said limitation is the same as “a bottom gate dielectric layer” and/or “a top gate dielectric layer”, as recited in claim 1, and “a bottom gate structure” and/or “a gate dielectric layer”, as recited in claim 16, lines 6 and 22, respectively.
The claimed limitation of "a temperature", as recited in claims 2, 8 and 15, is unclear as to whether said limitation is the same as or different from “a temperature”, as recited in claims 1 and 11.
Claim 3 recite the limitation "the gate dielectric layer". There is insufficient antecedent basis for this limitation in the claims. Also, it is unclear as to whether said limitation is the same as or different from "a bottom gate dielectric layer" and/or “a top gate dielectric layer”, as recited in claim 1.
The claimed limitation of "top channels", as recited in claim 4, is unclear as to whether said limitation is the same as or different from "top channels", as recited in claim 1.
The claimed limitation of "a high-k dielectric material layer", as recited in claims 5 and 18, lines 5 and 8, is unclear as to whether said limitation is the same as or different from "a high-k dielectric material layer", as recited in claims 4 and 17, respectively.
Claim 5 recites the limitation "the plurality of top channels" in line 6. There is insufficient antecedent basis for this limitation in the claim. Also, it is unclear as to whether said limitation is the same as or different from "top channels", as recited in claims 1 and/or 4.
The claimed limitation of "the top channels", as recited in claim 5, line 9, is unclear as to whether said limitation is the same as or different from "top channels", as recited in claims 1 and/or 4, and/or “the plurality of top channels”, as recited in claim 5, line 6.
The claimed limitation of "the high-k dielectric material layer", as recited in claims 5 and 18, line 11, is unclear as to whether said limitation is the same as or different from "a high-k dielectric material layer", as recited in claims 4 and/or 5, lines 5 and 8; and claims 17 and/or 18, lines 5 and 8, respectively.
The claimed limitation of "hydrogen radical", as recited in claims 7 and 20, is unclear as to whether said limitation is the same as or different from "hydrogen radical", as recited in claims 6 and 19, respectively.
The claimed limitation of "oxygen radical", as recited in claims 7 and 20, is unclear as to whether said limitation is the same as or different from "hydrogen radical", as recited in claims 6 and 19, respectively.
The claimed limitation of "a bottom channel region", as recited in claims 8-10 and 15, is unclear as to whether said limitation is the same as or different from "a bottom channel region", as recited in claims 1 and 11, respectively.
The claimed limitation of "a top channel region", as recited in claims 8-10 and 15, is unclear as to whether said limitation is the same as or different from "a top channel region", as recited in claims 1 and 11, respectively.
The claimed limitation of "a thermal annealing process", as recited in claims 8 and 15, is unclear as to whether said limitation is the same as or different from "a thermal annealing process", as recited in claim 1 and “a thermal treatment”, as recited in claim 11, respectively.
The claimed limitations of "a semiconductor stack of first semiconductor layers and second semiconductor layer alternatively stacked on a top substrate", as recited in claims 9 and 16, are unclear 1) as to whether “second semiconductor layer” is in a plurality form or in a single form; and 2) as to whether first semiconductor layer and second semiconductor are in a repeating alternating sequence or in some other arrangement applicant refers.
The claimed limitations of "a bottom gate dielectric layer wrapping around bottom channels in the bottom channel region", as recited in claim 11, are unclear 1) as to which element is in the bottom channel region; and 2) as to whether a bottom gate dielectric layer wrapping around each or entirety of bottom channels applicant refers.
The claimed limitations of "an interfacial dielectric layer wrapping around top channels in the top channel region", as recited in claim 11, are unclear 1) as to which element is in the top channel region; and 2) as to whether an interfacial dielectric layer wrapping around each or entirety of bottom channels applicant refers.
The claimed limitations of "a high-k dielectric layer … wrapping around the top channels in the top channel region", as recited in claim 11, are unclear 1) as to which element is in the top channel region; and 2) as to whether a high-k dielectric layer wrapping around each or entirety of the top channels applicant refers.
The claimed limitation of "a first temperature", as recited in claim 12, is unclear as to whether said limitation is the same as or different from “a first temperature”, as recited in claim 11.
The claimed limitation of "a first supercritical fluid", as recited in claim 13, is unclear as to whether said limitation is the same as or different from "a first supercritical fluid", as recited in claim 11.
The claimed limitation of "a second supercritical fluid", as recited in claim 13, is unclear as to whether said limitation is the same as or different from "a second supercritical fluid", as recited in claim 11.
Claim 13 recites the limitation "the second supercritical carbon dioxide fluid" in lines 7-8. There is insufficient antecedent basis for this limitation in the claim.
The claimed limitation of "a combination thereof", as recited in claim 14, line 5, is unclear as to whether said limitation is the same as or different from "a combination thereof", as recited in claim 14, line 3.
The claimed limitation of "bottom channels", as recited in claim 15, is unclear as to whether said limitation is the same as or different from "bottom channels", as recited in claim 11.
The claimed limitation of "a bottom gate dielectric layer in the bottom channel region", as recited in claim 15, is unclear as to how a bottom gate dielectric layer can be formed in the bottom channel region, which is a portion of a semiconductor channel body that lies between a source region and a drain region and completely surrounded by a gate structure.
The claimed limitation of "a semiconductor stack of first semiconductor layers and second semiconductor layers alternatively stacked on a top substrate", as recited in claim 15, is unclear as to whether first semiconductor layer and second semiconductor are in a repeating alternating sequence or in some other arrangement applicant refers.
The claimed limitation of "a dummy gate structure over the active region in the top channel region", as recited in claim 16, is unclear as to which element is in the top channel region.
The claimed limitations of "gate spacers on sidewalls of the dummy gate stack", as recited in claim 16, are unclear as to whether said limitations are in one-to-one or multiple-to-one relationship between the gate spacer and the sidewall applicant refers.
The claimed limitation of "the dummy gate stack and the first semiconductor layers in the top channel region", as recited in claim 16, is unclear as to which element is in the top channel region applicant refers.
Claim 16 recites the limitation "the second semiconductor layers" in line 21. There is insufficient antecedent basis for this limitation in the claim. Also, it is unclear as to whether said limitation is the same as or different from “second semiconductor layer”, as recited in claim 16, lines 10-11.
The claimed limitations of "a gate dielectric layer over and wrapping around the top channels in the top channel region", as recited in claim 16, are unclear 1) as to which element is in the top channel region; and 2) as to whether a gate dielectric layer over and wrapping around each or entirety of the top channels applicant refers.
The claimed limitation of "a second temperature less than the second temperature", as recited in claim 16, line 26, is unclear as to how a second temperature can be less than itself.
The claimed limitation of "a bottom gate electrode", as recited in claim 16, line 26, is unclear as to whether said limitation is the same as or different from "a bottom gate structure", as recited in claim 16, line 6 (note: a bottom gate structure inherently includes a bottom gate electrode).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-4 and 8, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (2023/0420460) in view of Wang et al. (2008/0242071).
As for claims 1-3, Huang et al. show in Figs. 1C, 2, 3A, 3B, 3C1, 3C2, 3D, 3E1-3G1, 3E2-3G2 and related text a method, comprising:
providing a semiconductor structure having a bottom channel region 103b and a top channel region 103a over the bottom channel region;
forming a bottom gate dielectric layer 120 over and wrapping around bottom channels channels in the top channel region;
performing a thermal annealing process to the bottom gate dielectric layer at a first temperature ([0070]);
forming a top gate dielectric layer 120 over and wrapping around top channels in the top region; and
forming a top metal gate electrode 127 on the top gate dielectric layer.
Huang et al. do not disclose performing a radical treatment on the top dielectric layer in a supercritical fluid with a second temperature less than the first temperature (claim 1); wherein the supercritical fluid is a supercritical carbon dioxide fluid; and the performing of the radical treatment on the top gate dielectric layer in a supercritical fluid includes performing the radical treatment on the dielectric layer in the supercritical carbon dioxide fluid at a temperature less than 100 °C (claim 2); and wherein the performing of the radical treatment on the dielectric layer in a supercritical fluid further includes dissolving a radical source gas in the supercritical carbon dioxide fluid; and thereafter, applying the supercritical carbon dioxide fluid dissolved with a radical chemical to the gate dielectric layer (claim 3).
Wang et al. teach in Fig. 4 and related text:
As for claim 1, performing a radical treatment on the top dielectric layer in a supercritical fluid with a second temperature ([0029]).
As for claim 2, the supercritical fluid is a supercritical carbon dioxide fluid; and the performing of the radical treatment on the top gate dielectric layer in a supercritical fluid includes performing the radical treatment on the dielectric layer in the supercritical carbon dioxide fluid at a temperature less than 100 °C ([0029]).
As for claim 3, the performing of the radical treatment on the dielectric layer in a supercritical fluid further includes
dissolving a radical source gas in the supercritical carbon dioxide fluid; and
thereafter, applying the supercritical carbon dioxide fluid dissolved with a radical chemical to the gate dielectric layer at a temperature less than 100 °C ([0029]).
Huang et al. and Wang et al. are analogous art because they are directed to a method of forming a gate structure and one of ordinary skill in the art would have had a reasonable expectation of success to modify Huang et al. with the specified feature(s) of Wang et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to perform a radical treatment on the top dielectric layer in a supercritical fluid with a second temperature less than the first temperature; wherein the supercritical fluid being a supercritical carbon dioxide fluid; and perform the radical treatment on the dielectric layer in the supercritical carbon dioxide fluid at a temperature less than 100 °C; dissolve a radical source gas in the supercritical carbon dioxide fluid; and thereafter, apply the supercritical carbon dioxide fluid dissolved with a radical chemical to the gate dielectric layer, as taught by Wang et al., the second temperature less than the first temperature, in Huang et al.'s device, in order to reduce threshold voltage and improve the performance and reliability of the device.
Generally, differences in temperature do not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such temperature is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233, 235 (CCPA 1955). See also In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Laboratories Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989), and In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990).
As for claim 4, the combined device shows the top channels in the top channel region includes the top channels vertically stacked and spaced away from each other; and
the forming of the top gate dielectric layer over and wrapping around top channels in the top channel region further includes
forming an interfacial dielectric layer to wrap around each of the top channels, and
forming a high-k dielectric material layer on the interfacial dielectric layer to wrap around each of the top channels (Huang: [0070]).
As for claim 8, Huang et al. and Wang et al. disclosed substantially the entire claimed invention, as applied to claim 1 above, including the providing of the semiconductor structure having a bottom channel region and a top channel region further includes:
forming bottom channels 103b vertically stacked in the bottom channel region on a bottom substrate 144 (Fig. 3A);
forming a bottom source 105c and a bottom drain 105d in the bottom substrate, the bottom source and the bottom drain being interposed by the bottom channel region (Fig. 3C1);
forming a bottom gate structure 172 on the bottom channel region and wrapping around each of the bottom channels (Fig. 3C1); and
performing a thermal annealing process to the bottom gate structure at a temperature ([0070]).
Huang et al. and Wang et al. do not disclose the temperature is greater than 900 °C.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the temperature be greater than 900 °C, in order to improve the performance of the device.
Generally, differences in temperature do not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such temperature is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233, 235 (CCPA 1955). See also In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Laboratories Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989), and In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990).
Claim(s) 9 and 10, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (2023/0420460, hereinafter Huang’460) and Wang et al. (2008/0242071) in view of Huang et al. (2023/0178435, hereinafter Huang’435).
As for claims 9 and 10, Huang’460 and Wang et al. disclosed substantially the entire claimed invention, as applied to claim 1 above, except the providing of the semiconductor structure having a bottom channel region and a top channel region further includes: forming a semiconductor stack of first semiconductor layers and second semiconductor layer alternatively stacked on a top substrate; bonding the semiconductor stack formed on the top substrate to the bottom substrate; and thinning down the top substrate such that the semiconductor stack is exposed (claim 9) and patterning the semiconductor stack to form an active region; and forming a top source and a top drain in the active region, the top source and the top drain being interposed by the top channels (claim 10).
Huang’435 teaches in Figs. 2A-2Y, 3A-3J and related text:
As for claim 9, forming a semiconductor stack of first semiconductor layers 218 and second semiconductor layer 216 alternatively stacked on a top substrate 202 (Fig. 3A);
bonding the semiconductor stack formed on the top substrate to the bottom substrate (Fig. 3B); and
thinning down the top substrate such that the semiconductor stack is exposed (Fig. 3C).
As for claim 10, patterning the semiconductor stack to form an active region (Fig. 3E; and
forming a top source 210 and a top drain 210 in the active region, the top source and the top drain being interposed by the top channels 206 (Fig. 3I).
Huang’460, Wang et al. and Huang’435 are analogous art because they are directed to a method of forming a gate structure and one of ordinary skill in the art would have had a reasonable expectation of success to modify Huang’460 and Wang et al. with the specified feature(s) of Huang’435 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to form a semiconductor stack of first semiconductor layers and second semiconductor layer alternatively stacked on a top substrate; bond the semiconductor stack formed on the top substrate to the bottom substrate; thin down the top substrate such that the semiconductor stack is exposed; pattern the semiconductor stack to form an active region; and form a top source and a top drain in the active region, the top source and the top drain being interposed by the top channels, as taught by Huang’435, in Huang’460 and Wang et al.'s device, in order to minimize the system operational speed restriction, reduce the cost and the size of the device.
Allowable Subject Matter
Claims 5-7, 11-15 and 18-20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record does not teach or suggest, singularly or in combination, at least the limitations of "the performing the radical treatment on the top gate dielectric layer in the supercritical fluid further includes: dissolving a first radical source gas in a first supercritical carbon dioxide fluid; applying the first supercritical carbon dioxide fluid dissolved with a first radical chemical to the interfacial dielectric layer, prior to the forming the high-k dielectric material layer on the interfacial dielectric layer to wrap around each of the top channels; dissolving a second radical source gas in a second supercritical carbon dioxide fluid after the forming the high-k dielectric material layer on the interfacial dielectric layer to wrap around each of the top channels; and applying the second supercritical carbon dioxide fluid dissolved with a second radical chemical to the high-k dielectric material layer", as recited in claims 5 and 18; "performing a first radical treatment to the interfacial dielectric layer in a first supercritical carbon dioxide fluid having a first radical chemical dissolved therein; performing a second radical treatment to the high-k dielectric layer in a second supercritical carbon dioxide fluid having a second radical chemical dissolved therein", as recited in claim 11.
Claims 5-7 and 18-20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claims 11-15 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Conclusion
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/MEIYA LI/Primary Examiner, Art Unit 2811
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