Prosecution Insights
Last updated: April 19, 2026
Application No. 18/516,707

METHOD OF MANUFACTURING SUBSTRATES FOR SEMICONDUCTOR DEVICES, CORRESPONDING PRODUCT AND SEMICONDUCTOR DEVICE

Non-Final OA §102§103
Filed
Nov 21, 2023
Examiner
KEAGY, ROSE ALYSSA
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
STMicroelectronics
OA Round
1 (Non-Final)
96%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allow Rate
24 granted / 25 resolved
+28.0% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
24 currently pending
Career history
49
Total Applications
across all art units

Statute-Specific Performance

§103
54.1%
+14.1% vs TC avg
§102
29.5%
-10.5% vs TC avg
§112
16.4%
-23.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 25 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings Figures 1-6 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated (¶ 0031, 0050, 0062). See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3 and 5-8 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Komatsu et al. (“Komatsu”), US 2018/0122731 (cited in the IDS). Regarding Claim 1, Komatsu discloses a method (300; Fig. 3; ¶ 0019), comprising: molding electrically insulating material (220; Figs. 2, 5-10; ¶ 0026) onto a sculptured, electrically conductive leadframe structure (¶ 0019 “an array of lead frames is provided. The lead frames each include a die attach pad and a plurality of unplated conductive lead structures surrounding the die attach pad.”, 0026 “providing the array of lead frames”) comprising a pattern of electrically conductive formations (404, 406; Figs. 4-9; ¶ 0025 “die attach pad 404 and a plurality of conductive lead structures 406”), wherein electrically insulating material penetrates into spaces between electrically conductive formations in the pattern of electrically conductive formations (¶ 0020 “molded structure generally occupies the interstitial regions between the die pads, conductive lead structures and/or any other components of the lead frames”, 0026 “220 occupies regions between the die attach pads (DAPA) 404 and conductive lead structure 406”) to provide a pre-molded leadframe structure (402; Figs. 4-9; ¶ 0025) configured to have at least one semiconductor die arranged thereon (¶ 0023 “IC dies are…mounted (coupled) to the die attach pads”, 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404”), the pre-molded leadframe structure having opposed first (510; Fig. 5; ¶ 0026 “top (first) side 510”) and second (512; Fig. 5; ¶ 0026 “bottom (second) side 512”) surfaces and a pre-molded leadframe thickness between the first surface and the second surface (¶ 0026 “402 has a generally planar top (first) side 510 and bottom (second) side 512” in this instance the thickness between 510 and 512), wherein the sculptured, electrically conductive leadframe structure comprises at least one connection formation (420, 422; Fig. 4; ¶ 0025 “conductive lead structures 406 between adjacent lead frames are initially joined together and arranged along parting lines 420 and 422”) connected with electrically conductive formations in the pattern of electrically conductive formations (Fig. 4; ¶ 0025 “conductive lead structures 406 between adjacent lead frames are initially joined together and arranged along parting lines 420 and 422”), the at least one connection formation having a first thickness equal to said thickness between the first surface and the second surface (Figs. 4-5; ¶ 0025-0026 in this instance the cross-sectional view of Fig. 5 shows the thickness of connection formation 420 equal to the thickness of conductive lead structure 406); and reducing the thickness of the at least one connection formation (Fig. 7; ¶ 0027 “The trench 704 in the example embodiment extends entirely across the width (e.g., direction normal to page in FIGS. 6 and 7) of the conductive lead structure 406 along a respective parting line 422 or 424.”) from the first thickness to a second, reduced thickness (Fig. 7) with exposed wettable flanks (804; Fig. 8; ¶ 0028 “plating layer 804…that enhances solder wettability”) formed in the electrically conductive formations (Fig. 2; ¶ 0025 “conductive lead structures 406 become respective conductive leads 112 of respective IC chip packages after singulation”) in the pattern of electrically conductive formations facing the at least one connection formation with reduced thickness (Fig. 8). Regarding Claim 2, Komatsu discloses wherein reducing the thickness of the at least one connection formation from the first thickness to the second thickness comprises partially removing material from the second surface of the pre-molded leadframe structure (Figs. 6-7; ¶ 0027). Regarding Claim 3, Komatsu discloses wherein removing material from the second surface of the pre-molded leadframe structure may be accomplished via photo-etching (¶ 0027). Regarding Claim 5, Komatsu discloses arranging at least one semiconductor die (904; Fig. 9; ¶ 0029) on said pre-molded leadframe structure (Fig. 9; ¶ 0023, 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404 (see process step 320) and electrically coupled to conductive lead structures 406 via wirebonds 908”). Regarding Claim 6, Komatsu discloses cutting the pre-molded leadframe structure at the at least one connection formation (Figs. 4, 10; ¶ 0024, 0030 “singulated using saw 1004 (or other separating device) along parting lines 420 and 422”) removing the at least one connection formation with reduced thickness (Figs. 4, 10; ¶ 0025 “conductive lead structures 406 become respective conductive leads 112 of respective IC chip packages after singulation” therefore the at least one connection formation with reduced thickness is removed, 0030). Regarding Claim 7, Komatsu discloses arranging at least one semiconductor die (904; Fig. 9; ¶ 0029) on said pre-molded leadframe structure (Fig. 9; ¶ 0023, 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404 (see process step 320) and electrically coupled to conductive lead structures 406 via wirebonds 908”), and cutting at the at least one connection formation (Figs. 4, 10; ¶ 0030 “singulated using saw 1004 (or other separating device) along parting lines 420 and 422”) the pre-molded leadframe structure having at least one semiconductor die arranged thereon (Figs. 9-10; ¶ 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404”). Regarding Claim 8, Komatsu discloses wherein the pre-molded leadframe structure (402; Fig. 4; ¶ 0025) comprises a plurality of leadframe sections (410, 412, 414, 416; Fig. 4; ¶ 0025) separated by connection formations extending therebetween (420, 422; Fig. 4; ¶ 0025 “conductive lead structures 406 between adjacent lead frames are initially joined together and arranged along parting lines 420 and 422”), the plurality of leadframe sections comprising patterns of electrically conductive formations (404, 406; Figs. 4-9; ¶ 0025 “die attach pad 404 and a plurality of conductive lead structures 406”) configured to have respective semiconductor dice arranged thereon (¶ 0023 “IC dies are…mounted (coupled) to the die attach pads”, 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404”), wherein the method comprises: arranging respective semiconductor dice (904; Figs. 9-10; ¶ 0029) at the patterns of electrically conductive formations (404; Figs. 4, 9-10) in said plurality of leadframe sections (410, 412, 414, 416; Fig. 4; ¶ 0025) in said pre-molded leadframe structure (402; Fig. 4; ¶ 0025), and cutting the pre-molded leadframe structure (Fig. 10; ¶ 0024, 0030 “singulated using saw 1004 (or other separating device)”) having at respective semiconductor dice arranged at the patterns of electrically conductive formations (Figs. 9-10; ¶ 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404 (see process step 320) and electrically coupled to conductive lead structures 406”) at said connection formations extending therebetween (Figs. 4, 10; ¶ 0030 “singulated…along parting lines 420 and 422”) to provide singulated semiconductor devices (100; Fig. 10; ¶ 0030 “individual IC chip packages 100”). Claims 9-10 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Shibuya et al. (“Shibuya”), US 2019/0206768. Regarding Claim 9, Shibuya discloses a product (Figs. 11-15; ¶ 0044-0052), comprising: electrically insulating material (1300; Figs. 13-14; ¶ 0048) molded onto a sculptured, electrically conductive leadframe structure (1100; Figs. 11-14; ¶ 0044) comprising a pattern of electrically conductive formations (1108, 1110; Figs. 11-14; ¶ 0044), wherein electrically insulating material penetrates into spaces between electrically conductive formations in the pattern of electrically conductive formations (¶ 0047 “a pre-molding process in which the gaps between the die pads 1108 and the leads 1110 are filled with a molding compound”, ¶ 0048 “a molding compound 1300 has been applied to fill the gaps between the die pads 1108 and the leads 1110”) and provides a pre-molded leadframe structure (Figs. 13-14; ¶ 0047-0048) configured to have at least one semiconductor die arranged thereon (¶ 0051 “dies may be attached and electrically connected”), the pre-molded leadframe structure having opposed first and second surfaces (Figs. 12, 14) and a pre-molded leadframe thickness (1122; Fig. 12; ¶ 0046 “first thickness 1122”) between the first surface and the second surface, wherein the sculptured, electrically conductive leadframe structure comprises at least one connection formation (1114 of 1132; Figs. 11-14; ¶ 0044 “Ribs 1114 interconnect the separate die pads 1108 and leads 1110”, 0052 “a singulation path 1132”) connected with electrically conductive formations in the pattern of electrically conductive formations (Figs. 11-14; ¶ 0044, 0052), wherein the at least one connection formation has a reduced uniform thickness (1124; Fig. 12; ¶ 0046 “second thickness 1124”) smaller than (Fig. 12; ¶ 0046 “second thickness 1124 that is less than the first thickness 1122”) the pre-molded leadframe thickness between the first surface and the second surface (Fig. 12; ¶ 0046 “thickness 1122”) and exposed wettable flanks (1504; Figs. 12, 15; ¶ 0052 “solderable metal 1504 on the lateral facing surface 1116 (as well as on the inner surface 1128 of the lead 1110 extending (into the drawing of FIG. 15) between the lateral facing surface 1116 and the exposed copper 1502) provides a wettable flank”) formed in the electrically conductive formations in the pattern of electrically conductive formations facing the at least one connection formation with said second reduced thickness (Figs. 12, 14, 15). Regarding Claim 10, Shibuya discloses wherein the reduced uniform thickness is approximately half (¶ 0046 “the second thickness 1124…is approximately half the first thickness 1122”) said pre-molded leadframe thickness between the first surface and the second surface. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4 and 11-20 are rejected under 35 U.S.C. 103 as being unpatentable over Komatsu et al. (“Komatsu”), US 2018/0122731 (cited in the IDS), in view of Shibuya et al. (“Shibuya”), US 2019/0206768. Regarding Claim 4, Komatsu does not disclose wherein the reduced second thickness is approximately half said first thickness. Shibuya discloses wherein the reduced second thickness is approximately half said first thickness (¶ 0046 “the second thickness 1124…is approximately half the first thickness 1122”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Komatsu to have wherein the reduced second thickness is approximately half said first thickness, as taught by Shibuya, because the reduced second thickness being approximately half of the first thickness (Shibuya ¶ 0046) “provides for greater wettability and, thus, better solder joints” (Shibuya ¶ 0052). Regarding Claim 11, Komatsu discloses a method (300; Fig. 3; ¶ 0019), comprising: forming a molding compound (220; Figs. 2, 5-10; ¶ 0020, 0026) including: covering first sidewalls (Figs. 4-5; ¶ 0020 “molded structure generally occupies the interstitial regions between the die pads, conductive lead structures and/or any other components of the lead frames”, 0026 “220 occupies regions between the die attach pads (DAPA) 404 and conductive lead structure 406”) of a one or more lead portions (Figs. 4-5: ¶ 0025, 0026 “conductive lead structure 406”) of a leadframe structure (¶ 0019 “an array of lead frames is provided. The lead frames each include a die attach pad and a plurality of unplated conductive lead structures surrounding the die attach pad”, 0026 “providing the array of lead frames”), and leaving first surfaces (512; Figs. 4-5: ¶ 0025, 0026 “bottom (second) side 512”) of the one or more lead portions transverse to the first sidewalls exposed from the molding compound (Figs. 4-5; ¶ 0026 “220 is flush with the die attach pads 404 and conductive lead structure 406 such that the premolded lead frame assembly 402 has a generally planar top (first) side 510 and bottom (second) side 512”); covering second sidewalls (Figs. 4-5; ¶ 0020 “molded structure generally occupies the interstitial regions between the die pads, conductive lead structures and/or any other components of the lead frames”, 0026 “220 occupies regions between the die attach pads (DAPA) 404 and conductive lead structure 406”) of a connecting bar (420, 422; Fig. 4; ¶ 0025 in this instance, the portions of “conductive lead structures 406 between adjacent lead frames” that cause lead structures 406 to be “initially joined together”) of the leadframe structure, the connecting bar being coupled to the one or more lead portions of the leadframe structure (Fig. 4), and leaving a second surface (512; Fig. 5: ¶ 0026 “bottom (second) side 512”) of the connecting bar transverse to the second sidewalls exposed from the molding compound (Figs. 4-5; ¶ 0026 “220 is flush with the die attach pads 404 and conductive lead structure 406 such that the premolded lead frame assembly 402 has a generally planar top (first) side 510 and bottom (second) side 512”); etching the leadframe structure (¶ 0021 “a trench is formed in the plurality of conductive lead structures of each lead frame along a parting line between adjacent lead frames” “the trench can be formed in any suitable manner, including by laser cutting, sawing or an etching process”, 0027) including: removing first portions of the one or more lead portions and a second portion of the connecting bar (Figs. 2, 7; ¶ 0027 “etching process is then performed to remove material from the conductive lead structure 406 thereby creating a trench 704 (see process step 312). The trench 704 in the example embodiment extends entirely across the width (e.g., direction normal to page in FIGS. 6 and 7) of the conductive lead structure 406 along a respective parting line 422 or 424”, ¶ 0025 “conductive lead structures 406 become respective conductive leads 112 of respective IC chip packages after singulation”). Komatsu does not disclose etching the leadframe structure including: forming a flat continuous surface recessed from the first surfaces of the one or more lead portions and extending along the one or more lead portions and the connecting bar. Shibuya discloses a flat continuous surface (1128; Fig. 12; ¶ 0045, 0046 in this instance having “thickness 1124…corresponds to the thickness of the ribs 1114”) recessed from (Fig. 12; ¶ 0046 “second thickness 1124 that is less than the first thickness 1122”) the first surfaces of the one or more lead portions (Fig. 12; ¶ 0046 “thickness 1122”) and extending along the one or more lead portions (Fig. 12; ¶ 0046 “distal ends 1118 of the leads have a second thickness 1124”) and the connecting bar (1114 of 1132; Figs. 11-14; ¶ 0044 “Ribs 1114 interconnect the separate die pads 1108 and leads 1110”, 0052 “a singulation path 1132”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Komatsu to have a flat continuous surface recessed from the first surfaces of the one or more lead portions and extending along the one or more lead portions and the connecting bar, as taught by Shibuya, because the recessed flat continuous surface (Shibuya ¶ 0044-0046) “provides for greater wettability and, thus, better solder joints” (Shibuya ¶ 0052). Komatsu as modified by Shibuya does not disclose etching the leadframe structure to form a flat continuous surface recessed from the first surfaces of the one or more lead portions and extending along the one or more lead portions and the connecting bar. Komatsu further discloses “the trench 704 has a concave profile, but other profiles are possible” (¶ 0027). Furthermore, Komatsu discloses that leadframes can be recessed by etching (¶ 0027 “An etching process is then performed to remove material from the conductive lead structure 406 thereby creating a trench 704 (see process step 312).”, 0021). There are only a few ways to form a recessed leadframe surface, such as etching, stamping, and building up to form a thicker portion. Therefore, it would be obvious at the time of the invention for a person of ordinary skill in the art to decide that etching is a reasonable method to form the recessed leadframe structure of Shibuya because it is a known, effective, and reliable process for forming a flat continuous surface recessed from the first surfaces of the one or more lead portions and extending along the one or more lead portions and the connecting bar. Regarding Claim 12, Komatsu discloses wherein forming the molding compound further includes covering third sidewalls (Figs. 4-5; ¶ 0020 “molded structure generally occupies the interstitial regions between the die pads, conductive lead structures and/or any other components of the lead frames”, 0026 “220 occupies regions between the die attach pads (DAPA) 404 and conductive lead structure 406”) of a die pad (404; Figs. 4-5; ¶ 0025-0026) of the leadframe structure (Figs. 4-5), the die pad being coupled to the connecting bar of the leadframe structure (Fig. 4), and leaving a third surface (510; Figs. 4-5; ¶ 0026) of the die pad transverse to the third sidewalls exposed from the molding compound (Fig. 5). Regarding Claim 13, Komatsu does not disclose wherein forming the continuous surface further includes removing a third portion of the leadframe structure that couples the die pad to the connecting bar. Shibuya discloses wherein forming the continuous surface further includes removing a third portion (1116; Fig. 12; ¶ 0045 “the lateral facing surface 1116 may be of any suitable shape (e.g., convex, concave, etc.)”) of the leadframe structure that couples the die pad to the connecting bar. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Komatsu to have wherein forming the continuous surface further includes removing a third portion of the leadframe structure that couples the die pad to the connecting bar, as taught by Shibuya, because removing surface 1116 to form a concave or zigzag surface would increase the amount of solderable metal to provide “for greater wettability and, thus, better solder joints” (Shibuya ¶ 0052). Regarding Claim 14, Komatsu discloses further comprising singulating along the connecting bar (Fig. 10; ¶ 0024 “singulated…along parting lines”, ¶ 0030 “singulated…along parting lines 420 and 422”). Regarding Claim 15, Komatsu discloses wherein the singulating along the connecting bar includes sawing along the connecting bar (Fig. 10; ¶ 0030 “singulated using saw 1004…along parting lines 420 and 422”). Regarding Claim 16, Komatsu discloses further comprising coupling a die (904; Figs. 9-10; ¶ 0029) to the die pad before singulating along the connecting bar (Figs. 3, 9-10; ¶ 0019, 0023-0024, 0029-0030). Regarding Claim 17, Komatsu discloses wherein singulating along the connecting bar includes singulating along the flat continuous surface reducing or preventing forming an irregular wettable flank of a lead (¶ 0031 “less likely to capture burrs and other debris during singulation”). Regarding Claim 18, Komatsu discloses further comprising coupling a die (904; Figs. 9-10; ¶ 0029) to the die pad (Figs. 3, 9; ¶ 0019, 0023 “IC dies are then mounted (coupled) to the die attach pads in process step 320 and then wirebonded to the conductive lead structures in process step 324”, 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404 (see process step 320) and electrically coupled to conductive lead structures 406 via wirebonds 908 (see process step 324)”). Regarding Claim 19, Komatsu discloses further comprising forming a plurality of wires (908; Figs. 9-10; ¶ 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404 (see process step 320) and electrically coupled to conductive lead structures 406 via wirebonds 908 (see process step 324)”) coupled to the die (Figs. 9-10; ¶ 0029 “IC dies 904 are mounted (coupled) to the plated die attach pads 404 (see process step 320) and electrically coupled to conductive lead structures 406 via wirebonds 908 (see process step 324)”). Regarding Claim 20, Komatsu discloses wherein the first portions of the lead portions and the second portion of the connecting bar are continuous with each other (Fig. 4; ¶ 0025 “lead structures 406 between adjacent lead frames are initially joined together and arranged along parting lines 420 and 422”). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cadag et al., US 2018/0358286, discloses a pre-molded leadframe having a connection formation and exposed wettable flanks. Foster et al., US 8,551,820, discloses a pre-molded headframe having a pattern of electrically conductive formations. Cadag et al., US 2020/0135623, discloses a pre-molded leadframe having a connection formation and wettable flanks. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Rose Keagy whose telephone number is (571) 270-3455. The examiner can normally be reached Mon-Fri. 8am-5pm (CT). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /R.K./Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Nov 21, 2023
Application Filed
Feb 05, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604510
CONTACT JUMPER FOR NON-SELF ALIGNED CONTACT DEVICES
2y 5m to grant Granted Apr 14, 2026
Patent 12604521
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Apr 14, 2026
Patent 12598980
FRONT END OF LINE PROCESSING COMPATIBLE THERMALLY STABLE BURIED POWER RAILS
2y 5m to grant Granted Apr 07, 2026
Patent 12599041
COMMUNICATION DEVICE AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12593525
OFFSET VERTICAL INTERCONNECT AND COMPRESSION POST FOR 3D-INTEGRATED ELECTRICAL DEVICE
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
96%
Grant Probability
99%
With Interview (+7.1%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 25 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month