Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgement is made to claim of priority to Korean Patent Application No. 10-2023-0035846 under 35 U.S.C. § 119, filed on March 20, 2023, in the Korean Intellectual Property Office
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on November 22, 2023 is being considered by the examiner.
Claim Objections
Claims 1-15 are objected to because of the following informalities:
In claim 1, “respecively” should read “respectively”.
Appropriate correction is required.
Dependent claims 2-15 are objected to at least on the same basis as the claims from which they depend.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, 5, 16, 20, and 22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takata (US 2011/0140100 A1).
With respect to claim 1, Takata teaches in Figs. 3A and 17:
A method for fabricating a display device,
the method comprising:
providing a substrate (substrate 11) into a chamber (para. 37 “the film formation step includes forming the first area under a first value of oxygen partial pressure/argon partial pressure in a film formation chamber”);
forming an active material layer (12, comprising first, second, and third areas A1, A2, and A3) on the substrate (11) by a plurality of deposition processes in the chamber (para. 37);
forming an active layer by patterning the active material layer (para. 124, “the oxide semiconductor layer 12 is patterned”): forming a transistor including a gate electrode overlapping the active layer (gate electrode 16);
and forming a pixel electrode (pixel electrode 55) on the transistor,
wherein at least two deposition processes among the plurality of deposition processes are performed by applying different magnitudes of power, respectively (para. 136 “The film formation of the first area may be achieved, for example, by once stopping the film formation after the third area has been formed and changing the oxygen partial pressure in the film formation chamber and the electric power applied to the target, and then, restarting the film formation, or by rapidly or slowly changing the oxygen partial pressure in the film formation chamber and the electric power applied to the target without stopping the film formation”).
With respect to claim 3, Takata further teaches:wherein the active layer (12) includes:
a first sub-active layer (A3) disposed in a first sub-active area adjacent to the substrate;
a second sub-active layer (A1) disposed in a second sub-active area on the first sub-active area;
and a third sub-active layer (A2) disposed in a third sub-active area on the second sub-active area.
With respect to claim 5, Takata further teaches:
wherein a first interface is formed between the first sub-active layer and the second sub-active layer, and a second interface is formed between the second sub-active layer and the third sub-active layer. (para. 53 “Since the first to third areas of the oxide semiconductor layer are made of the same type of materials, defect density at the interface is smaller than a case where the first area forming the channel layer is in contact with a different material”).
With respect to claim 16, Takata teaches in Fig. 3A and 17:
A display device comprising: a substrate (substrate 11);
an active layer on the substrate (oxide semiconductor layer 12);
a transistor including a gate electrode (gate electrode 16) overlapping the active layer (12);
and a pixel electrode (pixel electrode 55) on the transistor, wherein the active layer includes:
a first sub-active layer (A-3) adjacent to the substrate,
a second sub-active layer (A1) disposed on the first sub-active layer,
and a third sub-active layer (A2) disposed on the second sub-active layer,
the second sub-active layer is disposed between the first sub-active layer and the third sub-active layer (see Fig. 3A),
and the second sub-active layer has an amount of oxygen vacancies smaller than those of the first sub-active layer and/or the third sub-active layer (para. 84 “at least the oxygen concentration of the third area A3 is lower than the oxygen concentration at the first area A1.”).
With respect to claim 20, Takata further teaches:
wherein the at least two of the first, second, and third sub-active layers have different densities. (para. 102-110 teaches that the relative concentrations of In, Ga, and Zn is different between the layers A1, A2, and A3 which leads to different densities as the elements have different atomic weights and sizes. Alternatively, if density is interpreted to mean carrier density the carrier densities of the different areas are different due to their different number of oxygen vacancies)
With respect to claim 22, Takata further teaches:
wherein a first interface is formed between the first sub-active layer and the second sub-active layer, and a second interface is formed between the second sub-active layer and the third sub-active layer (para. 53 “Since the first to third areas of the oxide semiconductor layer are made of the same type of materials, defect density at the interface is smaller than a case where the first area forming the channel layer is in contact with a different material”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) as applied to claims 1 and 16 above in view of Lee (Compound Semiconductor Week 2016)
With respect to claim 2, Takata teaches all limitations of claim 1 upon which claim 2 depends. Takata fails to teach:
wherein the at least two deposition processes are performed by applying different flow rates of oxygen gas, respectively.
Lee teaches that it is known that a method of decreasing vacancies to increase the flow rate of O2 gas: see Fig. 6, OII corresponds to oxygen vacancies which decrease monotonically as flow rate increases from 1 sccm to 5 sccm.
It would be obvious to make the layers of Takata with different numbers of oxygen vacancies by using the method of changing the flow rate of oxygen gas between deposition processes, therefore Takata modified by Lee teaches:
wherein the at least two deposition processes are performed by applying different flow rates of oxygen gas, respectively.
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the method of Takata to deposit the different layers of oxide semiconductor with different oxygen flow rates because the known technique of controlling vacancies by altering flow rate of oxygen was recognized as part of ordinary capabilities of one skilled in the art. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
With respect to claim 18, Takata teaches all limitations of claim 16 upon which claim 18 depends. Takata fails to teach:
wherein the second sub-active layer includes an amount of oxygen-metal bonding components larger than those of the first sub-active layer and/or the third sub-active layer.
Lee teaches that it is known that a method of decreasing vacancies to increase the flow rate of O2 gas: see Fig. 6, OII corresponds to oxygen vacancies which decrease monotonically as flow rate increases from 1 sccm to 5 sccm. The M-O bonds are represented by O-I which increases monotonically with the same change.
It would have been obvious to one to one of ordinary skill in the art at the time of the invention to make the layers of Takata that have different numbers of oxygen vacancies using the method of Lee in which the samples with fewer vacancies are grown with a higher flow rate of oxygen gas which leads to more M-O bonds in the layer with less vacancies as taught by Lee, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
With respect to claim 19, Takata teaches all limitations of claim 16 upon which claim 19 depends. Takata fails to teach:
wherein the second sub-active layer includes an amount of metal-OH bonding components smaller than those of the first sub-active layer and/or the third sub-active layer.
Lee teaches that it is known that a method of decreasing vacancies to increase the flow rate of O2 gas: see Fig. 6, OII corresponds to oxygen vacancies which decrease monotonically as flow rate increases from 1 sccm to 5 sccm. The M-OH bonds are represented by O-III which decreases monotonically with the same change.
It would have been obvious to one to one of ordinary skill in the art at the time of the invention to make the layers of Takata that have different numbers of oxygen vacancies using the method of Lee in which the samples with fewer vacancies are grown with a higher flow rate of oxygen gas which leads to fewer M-OH bonds in the layer with less vacancies as taught by Lee, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Claims 4 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) as applied to claims 3 and 16 above and further in view of Kurata (US 2014/0291674 A1)
With respect to claim 4, Takata teaches all limitations of claim 2 upon which claim 4 depends. Takata fails to teach:
wherein the first sub-active layer, the second sub-active layer, and the third sub-active layer are integral with each other without an interface therebetween.
Kurata teaches:
wherein the first sub-active layer, the second sub-active layer, and the third sub-active layer are integral with each other without an interface therebetween. (para. 75 “there is a mixed region of the oxide semiconductor layer 106a and the oxide semiconductor layer 106b between the oxide semiconductor layer 106a and the oxide semiconductor layer 106b. Furthermore, in some cases, there is a mixed region of the oxide semiconductor layer 106b and the oxide semiconductor layer 106c between the oxide semiconductor layer 106b and the oxide semiconductor layer 106c. The mixed region has a low interface state density. For that reason, the stack of the oxide semiconductor layer 106a, the oxide semiconductor layer 106b, and the oxide semiconductor layer 106c has a band structure where energy at each interface and in the vicinity of the interface is changed continuously (continuous junction).”)
Takata discloses the claimed invention except for the sub-layers being integral. Kurata discloses that it is known in the art to make metal oxide sublayers with different compositions that include mixed regions between the sublayers such that the layers are integral to each other. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the layers of Takata with mixed regions between them as taught by Kurata for the purpose of minimizing defects formed at the interface of the layers. See MPEP 2144.
With respect to claim 21, Takata teaches all limitations of claim 16 upon which claim 21 depends. Takata fails to teach:
wherein the first sub-active layer, the second sub-active layer, and the third sub-active layer are integral with each other without an interface.
Kurata teaches:
wherein the first sub-active layer, the second sub-active layer, and the third sub-active layer are integral with each other without an interface. (para. 75 “there is a mixed region of the oxide semiconductor layer 106a and the oxide semiconductor layer 106b between the oxide semiconductor layer 106a and the oxide semiconductor layer 106b. Furthermore, in some cases, there is a mixed region of the oxide semiconductor layer 106b and the oxide semiconductor layer 106c between the oxide semiconductor layer 106b and the oxide semiconductor layer 106c. The mixed region has a low interface state density. For that reason, the stack of the oxide semiconductor layer 106a, the oxide semiconductor layer 106b, and the oxide semiconductor layer 106c has a band structure where energy at each interface and in the vicinity of the interface is changed continuously (continuous junction).”)
Takata discloses the claimed invention except for the sub-layers being integral. Kurata discloses that it is known in the art to make metal oxide sublayers with different compositions that include mixed regions between the sublayers such that the layers are integral to each other. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the layers of Takata with mixed regions between them as taught by Kurata for the purpose of minimizing defects formed at the interface of the layers. See MPEP 2144.
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) as applied to claim 3 above in view of Sohn (US 2021/0408292 A1).
With respect to claim 6, Takata teaches all limitations of claim 3 upon which claim 6 depends. Takata further teaches:
and forming a gate insulating film (gate insulating film 15) between the gate electrode (16) and the active layer (12),
the third sub-active area (A2) is disposed adjacent to the gate insulating film (15),
and the second sub-active area (A1) is disposed between the first sub-active area (A-3) and the third sub-active area (A2).
Takata fails to teach:
forming a buffer film between the substrate and the active layer;
wherein the first sub-active area is disposed adjacent to the buffer film
Sohn teaches:
forming a buffer film (buffer film 111) between the substrate (substrate 100) and the active layer (active layer A);
wherein the first sub-active area (first semiconductor material layer SCL1) is disposed adjacent to the buffer film (111)
Takata discloses the claimed invention except for a buffer layer between the substrate and the active layer. Sohn teaches that it is known to include a substrate between a substrate and the active layer in a transistor. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Takata to include a buffer layer as taught by Sohn since Sohn states in para. 68 that such a modification would “reduce or block the penetration of foreign matter, moisture, and/or external air from a lower portion of the substrate”. See MPEP 2144.
With respect to claim 7, Takata modified by Sohn to include a buffer layer between the active layer and substrate teaches:
wherein the first sub-active layer (A3 of Takata, in a similar location to SCL1 of Sohn) in the first sub-active area is in contact with the buffer film (111 of Sohn), and the third sub-active layer (A2 of Takata) in the third sub-active area is in contact with the gate insulating film (115 of Takata).
Claim 8-11 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) as applied to claim 3 above in view of Hardy (Semicore, Features of In-Line Sputtering Systems, 2013).
With respect to claim 8, Takata teaches all limitations of claim 3 upon which claim 8 depends. Takata does not specify if the sub-active material layers are deposited in different areas and therefore fails to teach:
wherein the chamber includes:
a first deposition area for depositing a first sub-active material layer in the first sub-active area on the substrate;
a second deposition area for depositing a second sub-active material layer in the second sub-active area on the substrate;
and a third deposition area for depositing a third sub-active material layer in the third sub-active area on the substrate.
Hardy teaches that is it known to deposit different layers in different areas of a deposition chamber:
“An “In-Line” PVD Sputtering System is one in which substrates pass linearly beneath one or more Sputter cathodes to acquire their Thin-Film deposition coating.”
Modifying the method of Takata in which three thin film layers are deposited with the method of Hardy in which different film layers are deposited in different areas of the chamber by linearly passing the substrate renders obvious:
wherein the chamber includes:
a first deposition area for depositing a first sub-active material layer in the first sub-active area on the substrate;
a second deposition area for depositing a second sub-active material layer in the second sub-active area on the substrate;
and a third deposition area for depositing a third sub-active material layer in the third sub-active area on the substrate.
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the method of Takata with the in-line sputtering system taught by Hardy. The claim would have been obvious because the technique of sputtering different thin film layers by linearly moving the substrate was part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement as taught by Hardy. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
With respect to claim 9, Takata/Hardy further teaches:
providing the substrate to the first deposition area;
providing the substrate to the second deposition area;
and providing the substrate to the third deposition area (“substrates pass linearly beneath one or more Sputter cathodes to acquire their Thin-Film deposition coating”).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Takata in view of Hardy as explained above.
With respect to claim 10, Takata further teaches:
wherein the plurality of deposition processes include:
forming the first sub-active material layer (third area A3) in the first sub-active area on the substrate by applying a first power to the first deposition area;
forming a second sub-active material layer (first area A1) in the second sub-active area on the substrate by applying a second power to the second deposition area;
and forming the third sub-active material layer (second area A2--) in the third sub-active area on the substrate by applying a third power to the third deposition area,
and at least two of the first, second, and third powers have different magnitudes. (para. 136 “The film formation of the first area may be achieved, for example, by once stopping the film formation after the third area has been formed and changing the oxygen partial pressure in the film formation chamber and the electric power applied to the target, and then, restarting the film formation, or by rapidly or slowly changing the oxygen partial pressure in the film formation chamber and the electric power applied to the target without stopping the film formation”).
With respect to claim 11, Takata further teaches:
wherein the first power has a magnitude different from a magnitude of the second power (para. 136),
and the third power has a magnitude different from the magnitude of the second power. (para. 140).
With respect to claim 13 Takata further teaches:
wherein a first interface is formed between the first sub-active material layer and the second sub-active material layer,
and a second interface is formed between the second sub-active material layer and the third sub-active material layer. (para. 53 “Since the first to third areas of the oxide semiconductor layer are made of the same type of materials, defect density at the interface is smaller than a case where the first area forming the channel layer is in contact with a different material. Thus, a thin-film transistor which also has good uniformity, stability and reliability is provided.” Takata also teaches that the sublayers A1 to A3) are made by similar processes and therefore it would be obvious for an interface to be formed between each of the layers in contact with each other)
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) in view of Hardy (Semicore, Features of In-Line Sputtering Systems, 2013) as applied to claim 10 above and further in view of Kurata (US 2014/0291674 A1).
With respect to claim 12, Takata/Hardy teaches all limitations of claim 10 upon which claim 12 depends. Takata/Hardy fails to teach:
the second sub-active material layer,
and the third sub-active material layer are integral with each other without an interface.
Kurata teaches:
the second sub-active material layer,
and the third sub-active material layer are integral with each other without an interface. (para. 75 “there is a mixed region of the oxide semiconductor layer 106a and the oxide semiconductor layer 106b between the oxide semiconductor layer 106a and the oxide semiconductor layer 106b. Furthermore, in some cases, there is a mixed region of the oxide semiconductor layer 106b and the oxide semiconductor layer 106c between the oxide semiconductor layer 106b and the oxide semiconductor layer 106c. The mixed region has a low interface state density. For that reason, the stack of the oxide semiconductor layer 106a, the oxide semiconductor layer 106b, and the oxide semiconductor layer 106c has a band structure where energy at each interface and in the vicinity of the interface is changed continuously (continuous junction).”)
Takata/Hardy discloses the claimed invention except for the sub-layers being integral. Kurata discloses that it is known in the art to make metal oxide sublayers with different compositions that include mixed regions between the sublayers such that the layers are integral to each other. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the layers of Takata/Hardy with mixed regions between them as taught by Kurata for the purpose of minimizing defects formed at the interface of the layers. See MPEP 2144.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) in view of Hardy (Semicore, Features of In-Line Sputtering Systems, 2013) as applied to claim 10 above and further in view of Lee (Compound Semiconductor Week 2016).
With respect to claim 14, Takata/Hardy teaches all limitations of claim 10 upon which claim 14 depends. Takata teaches changing a partial pressure of oxygen but does not specify flow rates. Therefore, Takata/Hardy fails to teach:
wherein the forming of the first sub-active material layer is performed by applying oxygen gas of a first flow rate to the first deposition area,
the forming of the second sub-active material layer is performed by applying oxygen gas of a second flow rate to the second deposition area,
the forming of the third sub-active material layer is performed by applying oxygen gas of a third flow rate to the third deposition area,
and at least two of the first, second, and third flow rates have different magnitudes.
Lee teaches that it is known that a method of decreasing vacancies to increase the flow rate of O2 gas: see Fig. 6, OII corresponds to oxygen vacancies which decrease monotonically as flow rate increases from 1 sccm to 5 sccm.
It would be obvious to make the layers of Takata with different numbers of oxygen vacancies by using the method of changing the flow rate of oxygen gas between deposition processes, therefore Takata modified by Lee teaches:
wherein the forming of the first sub-active material layer is performed by applying oxygen gas of a first flow rate to the first deposition area,
the forming of the second sub-active material layer is performed by applying oxygen gas of a second flow rate to the second deposition area,
the forming of the third sub-active material layer is performed by applying oxygen gas of a third flow rate to the third deposition area,
and at least two of the first, second, and third flow rates have different magnitudes.
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the method of Takata/Hardy to deposit the different layers of oxide semiconductor with different oxygen flow rates because the known technique of controlling vacancies by altering flow rate of oxygen was recognized as part of ordinary capabilities of one skilled in the art. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) in view of Hardy (Semicore, Features of In-Line Sputtering Systems, 2013) and Lee (Compound Semiconductor Week 2016) and further in view of Shi (Journal of Semiconductors, 2013).
With respect to claim 15, Lee teaches that increasing flow rate decreases the concentration of oxygen vacancies. Therefore, in order to make a device in which the second-sub active material has fewer vacancies such as the device of Takata requires using a greater flow rate for the second sub-active area which teaches:
wherein the second flow rate is greater than the first flow rate and/or the third flow rate
Takata teaches that power is adjusted to change the composition of the films but does not specify which powers are used. Takata/Hardy/Lee therefore fails to teach:
and the second power is smaller than the first power and/or the third power.
Shi teaches that it is known that a method of decreasing vacancies is to slow the deposition rate which can be done by reducing RF power:
“Therefore, we can directly draw the conclusion that the decrease in resistivity with increasing RF power mainly results from the increase in carrier concentration. With higher RF power, sputtered-target-atoms with higher kinetic energy arrive at the substrate, leading to increased local bonding order and less dangling bonds in the de posited filmsŒ14. Consequently, it could be inferred that sputtered a-IGZO films with higher RF power might also have a more ordered microstructure and less defects, thus resulting in a higher carrier concentration and lower resistivity of a-IGZO thin films” (page 084003-2)
Therefore, in order to create the film of Takata in which the second sub-active layer has fewer vacancies, Shi teaches that it would be obvious to have a lower power in the sub-active layer, rendering obvious:
and the second power is smaller than the first power and/or the third power.
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the method of Takata/Hardy/Lee to deposit the different layers of oxide semiconductor with less power in the middle layer because the known technique of controlling vacancies by altering power was recognized as part of ordinary capabilities of one skilled in the art. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Takata (US 2011/0140100 A1) as applied to claim 16 above and further in view of Shi (Journal of Semiconductors, 2013) as evidenced by Miyase (ECS Journal of Solid State Science and Technology, 2014).
With respect to claim 17, Takata teaches all limitations of claim 16 upon which claim 17 depends. Takata fails to teach:
wherein the second sub-active layer includes an amount of hydrogen larger than those of the first sub-active layer and/or the third sub-active layer.
Shi teaches that it is known that a method of decreasing vacancies is to slow the deposition rate which can be done by reducing RF power:
“Therefore, we can directly draw the conclusion that the decrease in resistivity with increasing RF power mainly results from the increase in carrier concentration. With higher RF power, sputtered-target-atoms with higher kinetic energy arrive at the substrate, leading to increased local bonding order and less dangling bonds in the de posited filmsŒ14. Consequently, it could be inferred that sputtered a-IGZO films with higher RF power might also have a more ordered microstructure and less defects, thus resulting in a higher carrier concentration and lower resistivity of a-IGZO thin films” (page 084003-2)
Miyase teaches that is known that reducing the RF frequency leads to more hydrogen in a layer:
“We, therefore, increased the film deposition rate by increasing the RF power, which varied the deposition rate from ∼3(70W) to∼16 (150 W), and to ∼19nm/min(200W). As seen in the violet (150W) and green squares (200 W) in Fig. 1b, the hydrogen content decreased to almost the background level of the SIMS measurement chamber (∼1019 cm−3 in this case).”
It would have been obvious to one to one of ordinary skill in the art at the time of the invention to make the layers of Takata that have different numbers of oxygen vacancies using the method of Shi in which the samples with more vacancies are grown with more RF power which leads to more hydrogen in the layer with less vacancies as taught by Miyase, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 16 is provisionally rejected on the ground of an obvious type nonstatutory double patenting as being unpatentable over claims 1, 3, and 4 of copending Application No. 19/060,904 (reference application, published as US 2026/0032963 A1) in view of Takata (US 2011/0140100 A1). Although the claims at issue are not identical, they are not patentably distinct from each other because the claim similar subject matter.
Claims 1, 3, and 4 of the copending application teach all limitations of claim 16 of the instant application except that the transistor is part of “a display device” with “a pixel electrode on the transistor.”
Takata teaches that a transistor with a multilayer active layer is used in a display device and includes a pixel electrode It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of the copending application to use the transistor in a display device with a pixel electrode for the purpose of controlling a pixel of a display device.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Conclusion
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/A.M.W./Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897