DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 16 objected to because of the following informalities:
While the scope of the claim can be interpreted, the Examiner finds confusing and not immediately clear the limitation “the second layer has a same crystalline structure as a second layer of the anode pattern in the heat treating of the preliminary anode pattern.”
The Examiner suggests the following would be more readily clear: “the second layer of the preliminary anode pattern has a same crystalline structure as a second layer of the anode pattern in the heat treating of the preliminary anode pattern.”
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 11 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 11, depending upon claim 1, wherein an anode comprises a three-layer protective layer, recites “wherein the second layer comprises a hole injection layer.” This limitation appears to conflict with the specification (¶ [00195]) which indicates the third protective layer PL3 may be in contact with the intermediate layer EP and may include the hole injection layer. Due to this, the scope of the claim is unclear, and the claim will not be examined in regards to prior art.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 6-7, 10, 12-14 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chen; Chung-Chia et al. (US 2023/0389343; hereinafter Chen).
Regarding claim 1, Chen discloses a display panel comprising:
a base layer (102; Fig 1A; ¶ [0029]);
a pixel definition layer (126; Fig 1A; ¶ [0030]) disposed on the base layer and including a light emitting opening (between each portion of 126, comprising OLED material 112; Fig 1A; ¶ [0031,0035]) defined therethrough;
a barrier wall (110, comprising 110A,110B; Fig 1A; ¶ [0032-34]) disposed on the pixel definition layer, having a conductivity (at least the first, second, and/or fourth configuration; ¶ [0032]), and including a barrier wall opening (as shown in Fig 1A, and associated description) defined therethrough to correspond to the light emitting opening; and
a light emitting element disposed in the light emitting opening and comprising an anode (104; Fig 1A; ¶ [0029-30]), an intermediate layer (112; Fig 1A; ¶ [0035]) disposed on the anode, and a cathode (114; Fig 1A; ¶ [0035]) disposed on the intermediate layer and connected to the barrier wall (¶ [0035]),
the anode comprising:
a conductive layer (404; Fig 4C; ¶ [0046-48]); and
a protective layer (410,406,408; Fig 4C; ¶ [0046-54]) comprising a first layer (410), a second layer (406), and a third layer (408) disposed on the conductive layer and sequentially stacked, wherein the second layer has an amorphous structure (406; ¶ [0050]), and the third layer (408; ¶ [0051]) has a polycrystalline structure.
Regarding claim 2, Chen discloses the display panel of claim 1, wherein the second layer (406; Fig 4C) comprises zinc indium tin oxide (ITZO; ¶ [0049]).
Regarding claim 3, Chen discloses the display panel of claim 1, wherein the second layer (406; Fig 4C) comprises at least one of indium zinc oxide (IZO; ¶ [0049]) or indium gallium zinc oxide (IGZO; ¶ [0049]).
Regarding claim 4, Chen discloses the display panel of claim 1, wherein the anode further comprises a lower protective layer (402; Fig 4C; ¶ [0047]) that is in contact with a rear surface of the conductive layer (404; Fig 4C), wherein the conductive layer comprises silver (Ag) (¶ [0048]), and wherein the lower protective layer comprises indium tin oxide (ITO) (¶ [0047]).
Regarding claim 6, Chen discloses the display panel of claim 1, wherein the first layer (410; Fig 4C) has the polycrystalline structure (¶ [0053]).
Regarding claim 7, Chen discloses the display panel of claim 6, wherein the first layer (410; Fig 4C) and the third layer (408; Fig 4C) comprise indium tin oxide (ITO) (¶ [0051-52]).
Regarding claim 10, Chen discloses the display panel of claim 1, wherein the second layer (406 {which comprises 104 of the anode; ¶ [0046]}; Figs 4C, {1A}) is in contact with the intermediate layer (112; Fig 1A). (The anode, comprising the second layer 406 is at least in electrical contact with the OLED material layer 112 in order for the device to function as intended; ¶ [0043]).
Regarding claim 12, Chen discloses the display panel of claim 1, wherein the barrier wall (110, comprising 110A,110B; Fig 1A) has an undercut shape when viewed in a cross-section (as shown in Figs 1A,6A, 110A is undercut beneath an overhanging portion of 110B), and wherein the cathode (114; Fig 1A) is in contact with the barrier wall (Fig 2; ¶ [0042,0044]).
Regarding claim 13, Chen discloses a display panel comprising:
a base layer (102; Fig 1A; ¶ [0029]);
a pixel definition layer (126; Fig 1A; ¶ [0030]) disposed on the base layer and including a light emitting opening (between each portion of 126, comprising OLED material 112; Fig 1A; ¶ [0031,0035]) defined therethrough;
a barrier wall (110, comprising 110A,110B; Fig 1A; ¶ [0032-34]) disposed on the pixel definition layer, the barrier wall having a conductivity (at least the first, second, and/or fourth configuration; ¶ [0032]), and including a barrier wall opening defined therethrough to overlap the light emitting opening (as shown in Fig 1A, and associated description), and having an undercut shape (as shown in Figs 1A,6A, 110A is undercut beneath an overhanging portion of 110B); and
a light emitting element comprising an anode (104; Fig 1A; ¶ [0029-30]) disposed in the barrier wall opening (as shown in Figs 1A,2, anode 112 is disposed in the barrier wall opening {112 may additionally or alternatively be disposed on a portion of the sidewall 111; Fig 2; ¶ [0035]}), at least a portion of the anode being covered by the pixel definition layer (as shown in Figs 1A,6A, 126 covers portions of 104 on either side of the light emitting opening), a cathode (114; Fig 1A; ¶ [0035]) disposed above the anode and connected to the barrier wall (¶ [0035]), and an intermediate layer (112; Fig 1A; ¶ [0035]) disposed between the anode and the cathode and comprising a light emitting layer (¶ [0031]),
the anode comprising:
a conductive layer (404; Fig 4C; ¶ [0046-48]); and
a first protective layer (410; Fig 4C; ¶ [0046-54]) disposed on the conductive layer and having an amorphous structure (¶ [0053]); and
a second protective layer (406; Fig 4C; ¶ [0046-54]) disposed on the first protective layer and having a polycrystalline structure (¶ [0050]); and
Regarding claim 14, Chen discloses the display panel of claim 13, wherein the first protective layer 410; Fig 4C) comprises indium tin oxide (ITO) (¶ [0052])., and the second protective layer (406; Fig 4C) comprises zinc indium tin oxide (ZITO) (ITZO; ¶ [0049]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Chen; Chung-Chia et al. (US 2023/0389343; hereinafter Chen) in view of Choi; Jong-Hyun et al. (US 2013/0288413; hereinafter Choi).
Regarding claim 5, Chen discloses the display panel of claim 1, but does not disclose further comprising a sacrificial pattern disposed on the protective layer and including a sacrificial opening defined therethrough to correspond to the light emitting opening.
In the same field of endeavor, Choi discloses a pixel electrode of a display panel comprising a sacrificial pattern (130; Figs 13; ¶ [0047]) disposed on a pixel electrode (120; Fig 13; ¶ and including a sacrificial opening defined therethrough (between left and right portions of 130, as shown in Fig 13) to correspond to a light emitting opening (comprising light emitting layer 152; Fig 13; ¶ [0039]). Accordingly, it would have been obvious to a person having ordinary skill in the art to have disposed a similar sacrificial pattern on the protective layer of Chen. One would have been motivated to do this in order to protect the protective layer of Chen while forming the pixel definition layer, in the same manner that Choi uses the sacrificial pattern 130 to protect the pixel electrode 120 during formation of PDL 140 (Choi; ¶ [0053]). One would have had a reasonable expectation of success due to the similar structure of the pixel definition layer on a lower electrode of a display device.
Claims 8-9, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Chen; Chung-Chia et al. (US 2023/0389343; hereinafter Chen).
Regarding claim 8, Chen discloses the display panel of claim 6, but does not disclose wherein the first layer (410; Fig 4C) has a thickness smaller than a thickness of the third layer (408; Fig 4C).
However, Chen discloses that metal oxides (such as 410,408; ¶ [0051-52]) overlying a metal material of the anode structure may allow etchants used in the manufacturing process to pass through and interact with metal material of the anode structure, and that to prevent this, thicker metal oxides have sometimes been used, but there is a trade-off that the thicker metal oxides absorb more light and reduce efficiency (¶ [0025]). Further, an amorphous protective material (406; Fig 4C), lacking grain boundaries, may be formed to reduce or prevent etchants from reaching the metal material (¶ [0026]).
In view of this, it would have been obvious to a person having ordinary skill in the art that the first layer, being protected from etchants by the second layer (due it being amorphous), need not further protect a metal layer of the anode structure from interaction with etchants, since this protection is provided by the second layer; that is, the first layer need not be as thick as the third layer in consideration of this factor. Accordingly, one my have arrived at the limitation of claim 8 in consideration of various other factors influencing a thickness of each layer including device performance and manufacturing process integration. One would have had a reasonable expectation of success because it is routine to consider a number of potentially conflicting factors and/or to utilize routine experimentation to arrive at a combination of layer thicknesses.
Regarding claim 9, Chen discloses the display panel of claim 6, but does not disclose wherein a thickness of the first layer (410; Fig 4C) is between about 70 angstroms and about 115 angstroms, the second layer (406; Fig 4C) has a thickness which is between about 100 angstroms and about 500 angstroms, and the third layer (408; Fig 4C) has a thickness which is between about 100 angstroms and about 700 angstroms.
However, Chen does disclose a thickness of the first layer is less than 50 nm (500 angstroms) or less; ¶ [0053]), the second layer has a thickness which is less than 50 nm or less; ¶ [0049]), and the third layer has a thickness which is less than 50 nm or less; ¶ [0051]), which overlaps the claimed range of each layer and accordingly constitutes a prima facie case of obviousness (see MPEP 2144.05.I.).
Regarding claim 15, Chen discloses the display panel of claim 13, but does not disclose wherein the first protective layer (410; Fig 4C) has a thickness which is between about 100 angstroms and about 500 angstroms, and the second protective layer (406; Fig 4C) has a thickness which is between about 100 angstroms and about 700 angstroms.
However, Chen discloses the first protective layer has a thickness which is less than 500 angstroms (less than 50 nm or less; ¶ [0053]), and the second protective layer has a thickness which is less than 500 angstroms (less than 50 nm or less; ¶ [0051]), which overlaps the claimed range of each layer and accordingly constitutes a prima facie case of obviousness (see MPEP 2144.05.I.).
Claims 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over Chen; Chung-Chia et al. (US 2023/0389343; hereinafter Chen) in view of Nagayama; Kensuke et al. (US 2015/0372027; hereinafter Nagayama).
Regarding claim 16, Chen discloses a method of manufacturing a display panel, comprising:
forming an anode pattern layer (104 {Figs 1A,6A; ¶ [0029-30]}; 404,410,406,408 {Fig 4C; ¶ [0046-54]}) comprising a conductive layer (404) and a protective layer comprising a first anode pattern layer (410, which has a crystalline structure and may comprise indium tin oxide (ITO) {¶ [0052-53]}), a second anode pattern layer (406, which is amorphous ¶ [0049]), and a third anode pattern layer (408, which has a crystalline structure and may comprise indium tin oxide (ITO) {¶ [0051]}) sequentially disposed on the conductive layer and having an amorphous structure (at least ;
forming a pixel definition layer, comprising: an insulating material, (126; Figs 1A,6A; ¶ [0030]), and a plurality of light emitting openings (between each portion of 126; Figs 1A,6A; ¶ [0031,0035]), the light emitting openings exposing at least a portion of the anode pattern (as shown in Fig 6A);
forming a conductive layer (depositing a lower portion layer and an upper portion layer; Fig 6A; ¶ [0058]) on the pixel definition layer; and
forming a barrier wall opening (110, comprising 110A,110B; Figs 1A,6A; ¶ [0032-34, 0058]) corresponding (¶ [0058]) to the light emitting opening through the conductive layer to form a barrier wall having an undercut shape (as shown in Figs 1A,6A, 110A is undercut beneath an overhanging portion of 110B),
wherein the second layer has a same crystalline structure as a second layer of the anode pattern in a heat treating of the preliminary anode pattern (406 does not change crystalline structure during subsequent processing, such as at elevated temperature {e.g., greater than or about 300 C} ; ¶ [0049]).
Chen does not disclose (1) heat treating a preliminary anode pattern to form the anode pattern having the first anode pattern layer, the second anode pattern layer and the third anode pattern layer; and (2) forming an insulating layer and patterning the insulating layer to form the pixel definition layer through which the plurality of light emitting openings is formed to expose at least a portion of the anode pattern.
Regarding (2), it would have been obvious to a person having ordinary skill in the art that the forming a pixel definition layer, comprising: an insulating material, and a plurality of light emitting openings was done through forming an insulating layer and patterning the insulating layer. One would have been motivated to come to this conclusion, with a reasonable expectation of success, because this is well-known and routinely done in the art.
Regarding (1), in the same field of endeavor, Nagayama discloses forming an ITO film in an amorphous state (¶ [0124]), and heating the amorphous ITO film to a temperature of 200 degrees Celsius to crystallize the amorphous ITO film into a polycrystalline ITO film. Accordingly, this crystallization change with temperature would have been known to a person having ordinary skill in the art, and it would have been obvious to the person to perform heat treating of a preliminary anode pattern form the anode pattern having the first anode pattern layer, the second anode pattern layer and the third anode pattern layer. One would have been motivated to do this because Chen does not disclose a detailed formation method, and Nagayama provides one. One would have had a reasonable expectation of success because of similar materials involved in the similar endeavors.
Regarding claim 17, Chen in view of Nagayama discloses the method of manufacturing claim 16, wherein the heat treating of the preliminary anode pattern is carried out within a temperature range between about 200 degrees Celsius and about 260 degrees Celsius (200, as applied to claim 16).
Regarding claim 18, Chen in view of Nagayama discloses the method of manufacturing claim 16, wherein the first anode pattern layer and the anode pattern third layer have a polycrystalline structure (as applied to claim 16; Nagayama, polycrystalline ITO film).
Regarding claim 19, Chen in view of Nagayama discloses the method of manufacturing claim 16, wherein a gas containing argon (Ar) and hydrogen (H2) is used in the forming of the third layer (Nagayama; ¶ [0124]).
Claims 20-22 are rejected under 35 U.S.C. 103 as being unpatentable over Chen; Chung-Chia et al. (US 2023/0389343; hereinafter Chen) in view of Nagayama; Kensuke et al. (US 2015/0372027; hereinafter Nagayama), and further in view of Choung; Ji-young et al. (US 2022/0077251; hereinafter Choung).
Regarding claim 20, Chen in view of Nagayama discloses the method of manufacturing claim 16, wherein the forming of the barrier wall comprises:
forming a first conductive layer (Chen; 110A; ¶ [0058]) on the pixel definition layer;
forming a second conductive layer (Chen; 110A; ¶ [0058]) on the first conductive layer;
Chen in view of Nagayama does not disclose first etching the first and second conductive layers to form a first pattern; and second etching the first pattern to form an undercut shape in the first pattern.
In the same field of endeavor, Choung, discloses forming similar barrier wall (110; Figs 1A,4C; ¶ [0030, 0047]) comprising first etching the first and second conductive layers to form a first pattern; and second etching the first pattern to form an undercut shape in the first pattern (¶ [0047]). Accordingly, it would have been obvious to a person having ordinary skill in the art to have completed the forming the barrier wall by the first etching and the second etching of Choung. One would have been motivated to do this, with a reasonable expectation of success, because Chen in view of Nagayama does not provide further detail, while Choung provides the detail for a similar structure in a similar endeavor.
Regarding claim 21, Chen in view of Nagayama and further in view of Choung discloses the method of manufacturing claim 20, wherein a first etchant (Choung; dry etch; ¶ [0047]) used in the first etching is different from a second etchant (Choung; wet etch; ¶ [0047]) used in the second etching.
Regarding claim 22, Chen in view of Nagayama and further in view of Choung discloses the method of manufacturing claim 20, further comprising forming an intermediate layer (Chen; 112; Fig 1A; ¶ [0034-35]) comprising a light emitting material and a cathode (Chen; 114; Fig 1A; ¶ [0034-35]) that is in contact with the barrier wall in the barrier wall opening.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Lee; Jungmin et al. (US 20230269969; the prior art discloses a conductive barrier wall for an OLED display, and having an undercut shape.
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/B.A.K./Examiner, Art Unit 2817
/RATISHA MEHTA/Primary Examiner, Art Unit 2817