DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action responds to the Application filed on 11/27/2023 and IDS filed on 11/27/2023 and 11/19/2024. Claims 1-16 are pending.
Claim Objections
Claims 1-16 are objected to because of the following informalities:
As per claims 1, 15, 16, --the dimension and the parasitics information—should be inserted after “both” (last line, claims 1,15 and 16) to clearly indicate what “both” refer to.
As per claims 2-14¸the claims are also objected to for incorporating the above errors into the respective claims by claim dependency.
Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-16 are rejected under 35 U.S.C. 101 because
the claimed invention lacks patentable utility. The claims merely “provides” data (i.e., representation of a first layout, collection of design information) to a client, without performing any calculations or analysis (i.e., when interpreting that the collection of design information was already calculated—that is, no calculation occurred as part of this process).
Applicant may want to positively insert the steps/operations of calculating or generating or extracting at least a collection of design information comprising the dimension extracted from the first layout, parasitics information related to the dimension, margin information related to a ground rule applicable to the dimension, or both the [dimension and the parasitics information]. However, Applicant should note that even with this modification, the claims would still be rejected under 35 USC 101 as discussed below.
Claims 1-16 are also rejected under 35 U.S.C. 101 because the claimed invention is directed to judicial exception of abstract ideas involving mathematical calculations without significantly more (when interpreting the claims implicitly involve the process of calculating the collection of design information or upon Applicant’s amendment to explicitly recite this step/operation). That is, using the flow chart for subject matter eligibility test for product and processes (MPEP 2106), the claims would be directed to statutory categories (i.e., process, machine and product/article of manufacture, respectively), under Step 1, Prong One. The claim(s) implicitly recite(s) the judicial exception of the step/operation of calculating the collection of design information, prior to providing it to the client, under step 2A. This judicial exception is not integrated into a practical application (step 2B) because it is NOT being recited as part of the circuit design and analysis of the circuit design (that is, there is no recitation of a step/operation of designing and/or analyzing the layout design based on the provided collection of design information, or modifying the layout design using the provided collection of design information or locating errors on the layout design using the provided collection of design information). The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception (Prong Two) because the steps/operations of providing are merely generic computer inputs/outputs.
Allowable Subject Matter
Claims 1-16 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 101, and if rewritten or amended to overcome the minor informalities objections, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
As per claims 1-16, the independent claims 1, 15 and 16, from which the respective claims depend, recite the method/system/non-transient computer readable media, comprising a combination of inventive steps/operations comprising calculating a collection of design information calculated according to the first layout to the client, the collection of design information including a dimension extracted from the first layout, and further including parasitics information related to the dimension, margin information related to a ground rule applicable to the dimension, or both the dimension and the parastics information, as claimed, which the prior arts made of record failed to teach or suggest. In particular, Brink et al. (US Patent Application Publication No. 20130326445 A1) teaches providing the collection of information, in a server/client system (Fig. 1, paragraphs [0044]), which includes dimension extract from the layout (see paragraph [0031]) and design rule violations relating to the dimension or spacing information (see paragraph [0031]); Koizumi (US Patent Application Publication No. 20110119645 A1) teaches categorizing and displaying of design rule errors, using design rule checking or ground rule checking, more than one violations of a design rule withing a design layout, that includes dimensions related information (see paragraphs [0002], [0021]-[0023]); St. John et al. (US Patent Application Publication No. 20090265672 A1) teaches a parasitic constraint analyzer as part of the design of an anlog integratred circuit to determine a layout complies with parasitic constraints (see abstract). However, the prior arts made of record failed to teach or suggest the combination of collection of design information that includes the a dimension extracted from the first layout, and parasitics information related to the dimension, margin information related to a ground rule applicable to the dimension, or both the dimension and the parastics information, as claimed.
Conclusion
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/PHALLAKA KIK/Primary Examiner, Art Unit 2851 October 3, 2026
