Prosecution Insights
Last updated: October 26, 2026

Phallaka Kik, USPTO Patent Examiner

Listed by the USPTO as KIK, PHALLAKA

Tech Center 2800 • Art Units: 2825 2851

This examiner grants 91% of resolved cases

Analysis

This examiner handles work in Tech Center 2800 and Art Unit 2825, with 965 resolved cases. The allowance rate is 90.8%, and the median time to allowance is 790 days. The extensive record and high allowance rate indicate a prosecution environment in which successful outcomes are common, while the median timeline provides a useful planning reference for applicants.

The interview lift is 1.6%, showing little measured association between interviews and allowance outcomes. Practitioners may therefore place greater emphasis on claim drafting, written responses, and targeted amendment strategy than on interviews alone. The leading companies are Samsung Electronics Co., Ltd., Intel Corporation, and Canon Inc. The leading firms are AMPACC Law Group, Bookoff McAndrews, and FOUNTAINHEAD LAW GROUP.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

90.8%
Allow Rate
+22.8% vs TC avg
979
Total Applications
+1.6%
Interview Lift
790
Avg Prosecution Days
Based on 965 resolved cases, 2023–2026

Rejection Statute Breakdown

32.5%
§101 Eligibility
26.5%
§102 Novelty
16.3%
§103 Obviousness
9.1%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18617946 ELECTRONIC DEVICE SUPPORTING MANUFACTURE OF SEMICONDUCTOR DEVICE AND OPERATING METHOD OF ELECTRONIC DEVICE Non-Final OA Samsung Electronics Co., Ltd.
18518551 METHOD, APPARATUS, AND SYSTEM WITH RESIST IMAGE ESTIMATION Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18454957 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, STORAGE MEDIUM, EXPOSURE APPARATUS, EXPOSURE METHOD, AND ARTICLE MANUFACTURING METHOD Non-Final OA CANON KABUSHIKI KAISHA
18211165 PRE-SILICON POWER ANALYSIS Non-Final OA Intel Corporation
18209434 THERMAL CONDUCTIVITY IN INTEGRATED CIRCUITS Non-Final OA Intel Corporation
18483126 HIGH FIDELITY READOUT WITH TWO QUBITS Non-Final OA International Business Machines Corporation
18527383 INSPECTION METHOD AND RELATED INSPECTION DEVICE FOR OUT-OF-ORDER EXECUTION CENTRAL PROCESSING UNIT CIRCUIT Non-Final OA Realtek Semiconductor Corp.
18478469 RUNTIME OPTIMIZATION OF ACTIVE INTERPOSER DIES FROM DIFFERENCE PROCESS BINS Non-Final OA Advanced Micro Devices, Inc.

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Who Appears Before This Examiner

Top companies before this examiner

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Frequently Asked Questions

What is examiner Phallaka Kik's allowance rate?

90.8% of resolved applications examined by Phallaka Kik were allowed (965 resolved cases), compared with 81.3% across Art Unit 2825 over the last five years.

Does an interview help with examiner Phallaka Kik?

This examiner's interview lift is +1.6 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Phallaka Kik take to allow a patent?

Applications allowed by Phallaka Kik took 790 days on average from filing to allowance.

Which art unit does examiner Phallaka Kik work in?

Phallaka Kik examines applications in Art Unit 2825 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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