Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Attorney Docket Number: 22AG0252US01/50650-01593
Filling Date: 11/28/2023
Priority Date: 11/30/22
Inventor: Lago et al
Examiner: Bilkis Jahan
DETAILED ACTION
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 7-10 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al (US 2016/0163583 A1) in view of Booth et al (US 2013/0147007 A1).
Regarding claim 1, Liu discloses a semiconductor device (Fig. 1a), comprising: a body of semiconductor material 102, 104, 106 (Paras. 12, 14) having a surface; an active area 106 (portion between 153) in the body 102, 104, 106; an operational region 106 (portion between 153) in the active area; a first deep insulation structure 151 (Para. 34) extending in the active area from the surface of the body 102, 104, 106 in a first trench (Fig. 1a) and comprising insulation walls 151 surrounding a conductive filling portion 154 (Para. 53), the first deep insulation region151 having a first width and a first depth (Fig. 1a); and a second deep insulation structure 153 (Para. 33) extending in the active area 106 from the surface of the body 102, 104, 106 in a second trench (Fig. 1a) and surrounding the operational region 106, the second deep insulation structure 153 comprising a solid insulating region filling the second trench (Fig. 1a), the second deep insulation structure 153 having a second width and a second depth (Fig. 1a).
Liu does not explicitly disclose the second width being smaller than the first width and the second depth being smaller than the first depth.
However, Booth discloses the second width 41, 242B, 44B (Fig. 19, Paras. 45, 66, 79) being smaller than the first width 40, 42A, 44A (Paras. 55, 65-66) and the second depth 41, 242B, 44B being smaller than the first depth 40, 42A, 44A.
Booth teaches the above modification is used to improve isolation capability of the device (Abstract). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute Liu first and second deep insulation structure shape with Booth first and second deep insulation structure shape as suggested above to improve isolation capability of the device (Abstract).
Regarding claim 2, Liu further discloses the semiconductor device according to claim 1, wherein the first deep insulation structure 151 (Para. 340 has a closed shape and surrounds the second deep insulation structure 153.
Regarding claim 3, Liu further discloses the semiconductor device according to claim 1, wherein the second deep insulation structure 153 has a closed shape and the first deep insulation structure 151 is external to the second deep insulation structure 153.
Regarding claim 4, Liu further discloses the semiconductor device according to claim 1, wherein the second deep insulation structure 153 is contiguous to the operational region 106 (portion between 153).
Regarding claim 5, Liu further discloses the semiconductor device according to claim 1: wherein the insulation walls 151 of the first deep insulation structure each have a first portion (top portion) that is slanted and overlies a second portion (Fig. 1a, bottom portion), the first portions of the insulation walls surrounding a superficial portion of the conductive filling portion 154, and the second portions of the insulation walls surrounding a deep portion of the trench filling portion (Fig. 1a); wherein the second deep insulation structure 153 has a surface portion overlying the solid insulating region 153.
Booth further discloses the surface portion of the second deep insulation structure 41, 242B, 44B delimiting a superficial cavity accommodating a top filling portion of conductive material 46 (Para. 64).
Regarding claim 7, Booth further discloses the semiconductor device according to claim 5, wherein the surface portion of the second deep insulation structure 41, 242B has two facing sides and each first portion of the insulation walls has approximately a same profile as one of the facing sides of surface portion of the second deep insulation structure (Fig. 19).
Regarding claim 8, Liu further discloses a process for manufacturing a semiconductor device (Fig. 2), comprising: simultaneously forming a first trench 251 (Para. 47) and a second trench 253 (Para. 48) in a body 102, 104, 106 (Paras. 12, 14) of semiconductor material, the first 251 and second 253 trenches extending from a surface of the body of semiconductor material 102, 104, 106, simultaneously forming insulation walls 152 (Para. 32) on sidewalls of the first trench and a solid insulating region in the second trench 153 (Para. 33), the insulation walls defining an empty space (Fig. 2D) therebetween and the solid insulating region 153 filling the second trench 153; and filling the empty space in the first trench with a conductive filling material 154 (Para. 53); wherein the insulation walls 152 and conductive filling material 154 in the first trench form a first insulation structure; wherein the solid insulating region in the second trench form a second insulation structure 153.
Liu does not explicitly disclose the first trench having a greater depth and a greater width than the second trench.
However, Booth discloses the first trench having a greater depth 40, 42A, 44A (Paras. 55, 65-66) and a greater width than the second trench 41, 242B, 44B (Fig. 19, Paras. 45, 66, 79).
Booth teaches the above modification is used to improve isolation capability of the device (Abstract). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute Liu first and second deep insulation structure shape with Booth first and second deep insulation structure shape as suggested above to improve isolation capability of the device (Abstract).
Regarding claim 9, Liu further discloses the process according to claim 8, wherein simultaneously forming the first trench 151 and the second trench 153 comprises covering the surface of the body with a mask 212 (Para. 46) and etching the body 106 using the mask 212.
Regarding claim 10, Liu further discloses the process according to claim 8, wherein simultaneously forming the insulation walls 151 on sidewalls of the first trench 151 and the solid insulating region in the second trench 153 comprises thermally oxidizing the first and second trenches to form a lateral wall covering the sidewalls and the bottom of the first trench and to form the solid insulating region (Para. 51).
Regarding claim 14, Liu in view of Booth does not explicitly disclose the process according to claim 8, wherein the width of the second insulation structure is equal or smaller than twice a thickness of the insulation walls.
However, Liu discloses a particular width of the second insulation structure 153 and the insulation walls 151 thickness. Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to obtain the width of the second insulation structure is equal or smaller than twice a thickness of the insulation walls for intended purposes.
the applicants have not established the criticality (see next paragraph below) of the thickness and width.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed shape or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Allowable Subject Matter
Claims 6, 11-12 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BILKIS JAHAN whose telephone number is (571)270-5022. The examiner can normally be reached Monday-Friday, 8:00 am-5 Pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon T Fletcher can be reached at (571)272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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BILKIS . JAHAN
Primary Examiner
Art Unit 2817
/BILKIS JAHAN/Primary Examiner, Art Unit 2817