Prosecution Insights
Last updated: April 18, 2026
Application No. 18/521,701

SEMICONDUCTOR DEVICE HAVING CONTACT FEATURE AND METHOD OF FABRICATING THE SAME

Non-Final OA §102§103
Filed
Nov 28, 2023
Examiner
ASSOUMAN, HERVE-LOUIS Y
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
95%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
590 granted / 648 resolved
+23.0% vs TC avg
Minimal +4% lift
Without
With
+4.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
42 currently pending
Career history
690
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
54.3%
+14.3% vs TC avg
§102
21.2%
-18.8% vs TC avg
§112
9.2%
-30.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 648 resolved cases

Office Action

§102 §103
Notice of AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: “Source Drain interconnect Structure Including A Liner and An Adhesive Layer Contacting U-Shaped Silicide Layers”. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim s 1- 2, 4 , 7-8 , 10 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by LI ( US 2018 / 0366555 A1 ). Regarding independent claim 1 : LI teaches (e.g., Figs. 1-9) a semiconductor device, comprising: a fin element ([0018]-[0020]: 102) extending above a substrate ([0020]: 100) ; a gate structure ( [0025]-[0027]: 140) and [0029]: 14 0 ) disposed over the fin element; an insulating layer ([0026] -[0027] : 130) adjacent the gate structure and over the fin element; a contact element ( [0059]-[0060], [0076] and [0078] : 171 /152/151 ) extending through the insulating layer, wherein the contact element includes: a silicide region ([0063]: 160) having a substantially U-shape (Fig. 8 [0063]: silicide region 160 has a U-shape) in cross-section; a liner layer ( [0059]-[0060]: layer 15 1 lines the trench 150; thus functions as a liner ) disposed along a sidewall of a metal contact layer ([0076] and [0078]: 171) and interfacing a top surface of the U-shaped silicide region (160) , the liner layer (152) having a sidewall collinear with a sidewall of the U-shaped silicide region (160) ; and the metal contact layer (171) over the U-shaped silicide region (160) and within the U-shape (Fig. 8) . Regarding claim 2 : LI teaches the claim limitation of the semiconductor device of claim 1, on which this claim depends, wherein the silicide region is TiSi ([0064]) . Regarding claim 4 : LI teaches the claim limitation of the semiconductor device of claim 1, on which this claim depends, wherein the cross-section is taken through a source feature ([0026]-[0027]: 110) , the gate structure ([0025]-[0027] and [0029]: 140) and a drain feature ([0026]-[0027]: 110) . Regarding independent claim 7: LI teaches (e.g., Figs. 1-9) a semiconductor device, comprising: a contact element ([0059]-[0060], [0076] and [0078]: 171/152/151) interfacing an epitaxial region ([0040]: 110) formed on a substrate ([0059]-[0060], [0076] and [0078]: 171/152/151), wherein the contact element includes: a silicide region ([0063]: 160); a first portion of a liner layer ([0059]-[0060]: left side layer 151 lines the trench 150; thus functions as a liner) over a first end of the silicide region (left side portion of silicide region 160) and a second portion of the liner layer ([0059]-[0060]: right side portion of layer 151 lines the trench 150; thus functions as a liner) over a second end of the silicide region (right side portion of silicide region 160); a metal contact layer ([0076] and [0078]: 171) over the silicide region and between the first portion of the liner layer and the second portion of the liner layer (as shown in Fig. 8); and a dielectric layer ([0026]: 130) over the substrate, wherein a sidewall of the first portion of the liner layer (left side portion of 152) interfaces the dielectric layer (130). Regarding claim 8: LI teaches the claim limitation of the semiconductor device of claim 7, on which this claim depends, wherein the silicide region (160) is a U-shape including the first end and the second end (Fig. 8; [0063]-[0066]). Regarding claim 10: LI teaches the claim limitation of the semiconductor device of claim 7, on which this claim depends, wherein the epitaxial region is silicon germanium ([0036]: 110 comprises SiGe , which is silicon germanium). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim s 5 -6 are rejected under 35 U.S.C. 103 as being unpatentable over LI ( US 2018 / 0366555 A1 ) in view of Sung et al. ( US 2015 / 0021696 A1 ). Regarding claim 5 : LI teaches the claim limitation of the semiconductor device of claim 1, on which this claim depends, Li does not expressly teach that a top surface of an epitaxial material disposed on the fin element is higher than a bottom surface of the silicide region having the substantially U-shape in cross-section. Sung teaches (e.g., Figs. 1-10) a semiconductor device comprising a top surface of an epitaxial material ([0022]: 42/44) disposed on a substrate element ([0009]: 20) is higher than a bottom surface of a silicide region ([0025]: 52) having the substantially U-shape in cross-section (Fig. 9; [0025]: 52) . Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention , to include in the device of LI, the top surface of the epitaxial material disposed on the substrate element being higher than a bottom surface of the silicide region having the substantially U-shape in cross-section, as taught by Sung, for the benefits of reducing the contact resistance further and thus increasing signal speed during operation. Regarding claim 6 : Li and Sung teach the claim limitation of the semiconductor device of claim 5, on which this claim depends, wherein the top surface of the epitaxial material (Sung [0022]: 42/44) is lower than a top surface of the U-shaped silicide region (Sung: Fig. 9; [0025]: 52) . Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over LI ( US 2018 / 0366555 A1 ) in view of Kye et al. ( US 2017 / 0069726 A1 ). Regarding claim 9 : LI teaches the claim limitation of the semiconductor device of claim 7, on which this claim depends, LI does not expressly teach that the dielectric layer is silicon nitride . Kye teaches ( e.g., Figs. 8A-8M ) a semiconductor device comprising an i nterlayer dielectric layer comprising a dielectric layer being silicon nitride ([0169]: dielectric layer 60P is silicon nitride). Note that silicon nitride is an art recognized material suitable for a dielectric layer. Applicant is reminded that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (Claims to a printing ink comprising a solvent having the vapor pressure characteristics of butyl carbitol so that the ink would not dry at room temperature but would dry quickly upon heating were held invalid over a reference teaching a printing ink made with a different solvent that was nonvolatile at room temperature but highly volatile when heated in view of an article which taught the desired boiling point and vapor pressure characteristics of a solvent for printing inks and a catalog teaching the boiling point and vapor pressure characteristics of butyl carbitol . "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention , to include in the device of LI, the dielectric layer being a silicon nitride, as taught by Kye, for the benefits of protecting the underlayer material and controlling the trench etching process due to etch selectivity. MPEP 2144.07 . Claim s 3 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over LI ( US 2018 / 0366555 A1 ) in view of Hung et al. ( US 2016 / 0336412 A1 ). Regarding claim 3: LI teaches the claim limitation of the semiconductor device of claim 1, on which this claim depends, wherein the liner layer (151) is silicon nitride ([0060]). LI does not expressly teach that the liner layer is silicon nitride. Hung teaches (e.g., Figs. 1-15) a semiconductor device comprising a liner ([0034]: 190); Hung further teaches that the liner layer is a silicon nitride layer ([0034]: 190). It is noted that silicon nitride layer is an art recognized material suitable for a liner layer. Applicant is reminded that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (Claims to a printing ink comprising a solvent having the vapor pressure characteristics of butyl carbitol so that the ink would not dry at room temperature but would dry quickly upon heating were held invalid over a reference teaching a printing ink made with a different solvent that was nonvolatile at room temperature but highly volatile when heated in view of an article which taught the desired boiling point and vapor pressure characteristics of a solvent for printing inks and a catalog teaching the boiling point and vapor pressure characteristics of butyl carbitol . "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.); MPEP 2144.07. Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of LI, the liner layer being silicon nitride layer, as taught by Hung for the benefits of improving the interconnecting structure by ensuring that the conductive layer is formed without interruption in the trench; this in turn improve signal reliability. Regarding claim 11 : LI teaches the claim limitation of the semiconductor device of claim 10, on which this claim depends . LI does not expressly teach that the liner layer is silicon nitride. Hung teaches ( e.g., Figs. 1-15 ) a semiconductor device comprising a liner ([0034]: 190); Hung further teaches that the liner layer is a silicon nitride layer ([0034]: 190) . It is noted that silicon nitride layer is an art recognized material suitable for a liner layer. Applicant is reminded that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (Claims to a printing ink comprising a solvent having the vapor pressure characteristics of butyl carbitol so that the ink would not dry at room temperature but would dry quickly upon heating were held invalid over a reference teaching a printing ink made with a different solvent that was nonvolatile at room temperature but highly volatile when heated in view of an article which taught the desired boiling point and vapor pressure characteristics of a solvent for printing inks and a catalog teaching the boiling point and vapor pressure characteristics of butyl carbitol . "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.); MPEP 2144.07. Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of LI, the liner layer being silicon nitride layer , as taught by Hung for the benefits of improving the interconnecting structure by ensuring that the conductive layer is formed without interruption in the trench; this in turn improve signal reliability. Claim s 12 -13 are rejected under 35 U.S.C. 103 as being unpatentable over LI ( US 2018 / 0366555 A1 ) in view of Lee et al. ( US 2018 / 0166553 A1 ). Regarding claim 12 : LI teaches the claim limitation of the semiconductor device of claim 7, on which this claim depends, LI does not expressly teach that the epitaxial region extends from adjacent a first gate structure to adjacent a second gate structure. Lee teaches (e.g., Figs. 1-9) a semiconductor device comprising an epitaxial region ([0017]-[0018]: 218) extend ing from adjacent a first gate structure (Fig. 9; [0017]-[0018]: left side 208) to adjacent a second gate structure ( Fig. 9; [0017]-[0018]: right side 208). Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of LI, the epitaxial region extends from adjacent a first gate structure to adjacent a second gate structure , for the benefits of increasing device integration while keeping a small device footprint. Regarding claim 13 : LI and Lee teach the claim limitation of the semiconductor device of claim 12 , on which this claim depends, wherein the liner layer (LI: 151) has an uppermost surface higher than an uppermost surface of the first gate structure and the second gate structure (Li: Fig. 8; [0043]; left side 140 and right side 140 respectively) . Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over LI ( US 2018 / 0366555 A1 ) in view of Lu et al. ( US 2018 / 0190653 A1 ). Regarding claim 14 : LI teaches the claim limitation of the semiconductor device of claim 7, on which this claim depends, LI does not expressly teach that the device further compris es an adhesion layer between the metal contact layer and the liner layer . Lu teaches ( e.g., Fig. 1A ) a semiconductor device comprising an adhesion layer ([0041]: 62) between a metal contact layer ([0041]: 64) and the liner layer ([0041]: 61) . Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of LI, the adhesion layer between the metal contact layer and the liner layer , as taught by Lu, for the benefits of increasing the cohesion between the layers of the interconnection structure in the via hole, and thus improving interconnection structure reliability by avoiding delamination of the different layers of the interconnection structure. Claim s 15 -16 , 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over LI ( US 2018 / 0366555 A1 ) in view of Hung et al. ( US 2016 / 0336412 A1 ) and Yin et al. ( US 2011 / 0062502 A1 ). Regarding independent claim 15 : LI teaches (e.g., Figs. 1-9) a semiconductor device, comprising: a contact element ([0059]-[0060], [0076] and [0078]: 171/152/151) extending through an insulating layer ( [0026]-[0027]: 130) over a fin element ([0018]-[0020]: 102) , wherein the contact element includes: a silicide region ([0063]: 160) having a substantially U-shape in cross-section (Fig. 8 [0063]: silicide region 160 has a U-shape) , wherein the substantially U-shaped silicide region includes an upper surface having a first portion (Fig. 8 [0063]: silicide region 160 has a U-shape includes an upper surface having a first portion , left side portion ) , a second portion ( Fig. 8 ; [0063]: silicide region 160 has a U-shape includes a second portion, middle side portion) , and a third portion (Fig. 8 ; [0063]: silicide region 160 has a U-shape includes an upper surface having a first portion, right side portion) , wherein the first portion and the third portion (Fig. 8 [0063]: left side and right side of silicide region 160 ha ving the U-shape) each interface a nitride layer (151) and the second portion interfaces a conductive layer ( [0060], [0076] and [0078]: 171 /152 ) ; the nitride layer (151) disposed directly on and having a same thickness as the first portion ( Fig. 8: left side portion of the U shape silicide region) of the upper surface and the second portion ( Fig. 8; right side portion of the U shape silicide region) of the upper surface; and the conductive layer (171 /152 ) over the silicide region and interfacing sidewalls of the nitride layer (151) ; and a conductive element over the contact element and interfacing each of the conductive layer and the nitride layer. Li does not expressly teach a silicon nitride layer . Hung teaches (e.g., Figs. 1-15) a semiconductor device comprising a liner ([0034]: 190); Hung further teaches that the liner layer is a silicon nitride layer ([0034]: 190). It is noted that silicon nitride layer is an art recognized material suitable for a liner layer. Applicant is reminded that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (Claims to a printing ink comprising a solvent having the vapor pressure characteristics of butyl carbitol so that the ink would not dry at room temperature but would dry quickly upon heating were held invalid over a reference teaching a printing ink made with a different solvent that was nonvolatile at room temperature but highly volatile when heated in view of an article which taught the desired boiling point and vapor pressure characteristics of a solvent for printing inks and a catalog teaching the boiling point and vapor pressure characteristics of butyl carbitol . "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.); MPEP 2144.07. Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of LI, the liner layer being silicon nitride layer, as taught by Hung for the benefits of improving the interconnecting structure by ensuring that the conductive layer is formed without interruption in the trench; this in turn improve signal reliability. Yin teaches (e.g., Fig. 14) a semiconductor device, comprising a conductive element ([0029]: contact in hole 340) over a contact element ([0029]: contact element in hole 2 40 /225 ) and interfacing each of a conductive layer ([0029]: contact element in hole 240) and the nitride layer ([0029]: 225) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention , to include in the device of Li as modified by Hung, the conductive element over the contact element and interfacing each of the conductive layer and the nitride layer , as taught by Yin, for the benefits of reducing the trench aspect ratio and increasing the reliability and integrity of the integrated circuit signal processing. Regarding claim 16 : Li, Hung and Yin teach the claim limitation of the semiconductor device of claim 15, on which this claim depends, wherein the conductive layer is at least one of TiN or TaN ([0060]: conductive layer 171/152 is at least one of TiN ) . Regarding claim 18: LI, Hung and Yin teach the claim limitation of the semiconductor device of claim 15, on which this claim depends, LI as modified by Hung and Yin teaches that the conductive element (LI: [0059]-[0060], [0076] and [0078]: 171/152/151) interfaces an uppermost surface of the conductive layer (LI: [0059]-[0060], [0076] and [0078]: 171/151) and interfaces the conductive layer (LI: [0060], [0076] and [0078]: 171/152) and interfaces the silicon nitride layer (Hung: [0034]: 190). Regarding claim 19: Li, Hung and Yin teach the claim limitation of the semiconductor device of claim 18, on which this claim depends, LI as modified by Hung and Yin teaches that the conductive element (LI: [0059]-[0060], [0076] and [0078]: 171/152/151) interfaces an uppermost surface of the silicon nitride layer (Hung: 190). Regarding claim 20: Li, Hung and Yin teach the claim limitation of the semiconductor device of claim 15, on which this claim depends, LI does not expressly teach that the contact element has tapered sidewalls defined by the silicon nitride layer. Hung teaches (e.g., Figs. 1-15) a semiconductor device comprising a liner ([0034]: 190) and a conductive element ([0045]-[0047]: 190/197/199)\. Hung teaches that a contact element has tapered sidewalls ([0045]-[0047]: 190/197/199) defined by the silicon nitride layer ([0034]: layer 190 comprises a silicon nitride layer). Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of LI, the contact element having tapered sidewalls defined by the silicon nitride layer, as taught by Hung, for the benefits of facilitating the trench conductive fills and ensure integrity of the conductive via to the active thus improving the reliability of the integrated circuit. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over LI ( US 2018 / 0366555 A1 ) in view of Hung et al. ( US 2016 / 0336412 A1 ) and Yin et al. ( US 2011 / 0062502 A1 ) as applied above and further in view of Lu et al. ( US 2018 / 0190653 A1 ) . Regarding claim 17 : Li, Hung and Yin teach the claim limitation of the semiconductor device of claim 15, on which this claim depends, wherein the conductive layer includes a multi-layer structure ( [0060], [0076] and [0078]: 171/152) of a metal fill layer ([0060], [0076] and [0078]: 171) . an adhesive layer and Lu teaches (e.g., Fig. 1A) a semiconductor device comprising an adhesion layer ([0041]: 62) between a metal contact layer ([0041]: 64) and the liner layer ([0041]: 61). Therefore, i t would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of LI, the adhesion layer between the metal contact layer and the liner layer, as taught by Lu, for the benefits of increasing the cohesion between the layers of the interconnection structure in the via hole, and thus improving interconnection structure reliability by avoiding delamination of the different layers of the interconnection structure. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT HERVE-LOUIS Y ASSOUMAN whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-2606 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT M-F: 08:30 AM-5:30 PM . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT DAVIENNE MONBLEAU can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT 571-272-1945 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HERVE-LOUIS Y ASSOUMAN/ Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Nov 28, 2023
Application Filed
Apr 01, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604646
DISPLAY PANEL WITH INORGANIC ENCAPSULATION LAYER HAVING MULTIPLE LAYERS ON INORGANIC ABSORPTION LAYER
2y 5m to grant Granted Apr 14, 2026
Patent 12598773
TRENCH SiC POWER SEMICONDUCTOR DEVICE
2y 5m to grant Granted Apr 07, 2026
Patent 12598967
THROUGH SILICON VIA INTERCONNECTION STRUCTURE AND METHOD OF FORMING SAME, AND QUANTUM COMPUTING DEVICE
2y 5m to grant Granted Apr 07, 2026
Patent 12593502
INTERCONNECTED ARRAY TRANSISTORS INCLUDING SOURCE AND DRAIN BUS BARS AND FINGERS
2y 5m to grant Granted Mar 31, 2026
Patent 12593511
RADIO FREQUENCY INTERFERENCE MITIGATION FOR SILICON-ON-INSULATOR DEVICES
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
95%
With Interview (+4.1%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 648 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month