The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA
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Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-23 are rejected under 35 U.S.C. 103 as being unpatentable over Yamazaki et al. (2011/0032444) in view of Inoue et al. (6,146,906).Regarding claims 2, 7, 12 and 17, Yamazaki et al. teach in figure 1 and related text a display device comprising:
a transistor comprising a channel formation region in a first metal oxide film 131, 134 (see figure 3);
a pixel electrode 110 (see figure 4) electrically connected to one of a source and a drain of the transistor (105b); and
a second metal oxide film 132, 133 positioned in a same layer as the first metal oxide film,
wherein a gate electrode 162 (see figure 2) of the transistor is positioned under the first metal oxide film,
wherein a first insulating film 107 is positioned over the first metal oxide film 131, 134 (now 166, see figure 4),
wherein a second insulating film 191 is positioned over the first insulating film and the second metal oxide film,
wherein the pixel electrode 110 is positioned over the second insulating film (see figures 4 and 5),
wherein a potential is supplied to the second metal oxide film 132, 133 through a wiring 165b positioned in a same layer as the gate electrode 162 (since they are formed in the same step),
wherein the first insulating film 107 is in contact with a top surface of the first metal oxide film 131, 134,
wherein the first insulating film overlaps with the channel formation region,
wherein the second metal oxide film 132, 133 does not overlap with the first insulating film 107 in a first region,
wherein the second insulating film 191 is in contact (at least mechanical contact) with a top surface of the second metal oxide film in the first region,
Yamazaki et al. do not teach that the pixel electrode 110 comprises a region overlapping with the second metal oxide film in the first region.
Yamazaki et al. teach in figure 1 and related text drain electrode 105b comprises a region overlapping with the second metal oxide film in the first region, and wherein pixel electrode 110 is in direct contact with drain electrode 105b. Forming pixel electrode 110 and drain electrode 105b in one step and of the same material would render the pixel electrode comprises a region overlapping with the second metal oxide film in the first region.
It is noted that forming the pixel electrode and the drain electrode in one step and of the same material does not produce a structure which is different from a structure which is formed by using separate two steps. Thus, the formation of the pixel electrode and the drain electrode in two separate steps is a process limitation which would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced.
Note that a “product by process” claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a “product by process” claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product by process” claims or not. Note that the applicant has the burden of proof in such cases, as the above case law makes clear.
Yamazaki et al. also do not teach that in the first region, the pixel electrode and the second metal oxide film are configured to be a pair of electrodes of a capacitor.
That is, Yamazaki et al. do not teach forming the capacitor electrode comprising a metal oxide film.
Inoue et al. teach in figure 5H and related text forming the capacitor electrode comprising a metal oxide film.
Inoue et al. and Yamazaki et al. are analogous art because they are directed to capacitors and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yamazaki et al. because they are from the same field of endeavor.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the capacitor electrode comprising a metal oxide film, as taught by Inoue et al., such that in the first region, the pixel electrode and the second metal oxide film are configured to be a pair of electrodes of a capacitor, in Yamazaki et al.’s device, in order to adjust the capacitor characteristics according to the requirements of the application in hand.
Regarding claims 7 and 17, Yamazaki et al. do not teach that the pixel electrode is configured to be one electrode of an organic EL element.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the pixel electrode to be one electrode of an organic EL element, in prior art’s device in order to expand the device capabilities.
Regarding claims 12 and 17, as discussed in claim 2 above, forming pixel electrode 110 and drain electrode 105b in one step and of the same material would render the pixel electrode comprises a region overlapping with the second metal oxide film in the first region and with the gate electrode.
Regarding claims 3, 8, 13 and 18, Yamazaki et al. do not teach that the second metal oxide film comprises a dopant, and wherein the dopant includes one or more of hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and rare gas elements.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the second metal oxide film comprises a dopant, and wherein the dopant includes one or more of hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and rare gas elements, in prior art’s device in order to improve the contact resistance of the capacitor electrode.
Regarding the claimed limitations of using specific materials, it is noted that substitution of materials is not patentable even when the substitution is new and useful. Safetran Systems Corp. v. Federal Sign & Signal Corp. (DC NIII, 1981) 215 USPQ 979.
It is further held that it is within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claims 4-5, 9-10, 14-15 and 19-20, Yamazaki et al. do not teach that the first and second insulating films comprise a stacked-layer structure of an oxide insulating film and a nitride insulating film.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the first and second insulating films comprise a stacked-layer structure of an oxide insulating film and a nitride insulating film, in prior art’s device in order to provide better protection to the device since it is well-known in the art to form ONO films.
Regarding the claimed limitations of using specific materials, it is noted that substitution of materials is not patentable even when the substitution is new and useful. Safetran Systems Corp. v. Federal Sign & Signal Corp. (DC NIII, 1981) 215 USPQ 979.
It is further held that it is within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claims 6, 11, 16 and 21, Yamazaki et al. teach in figure 1 and related text that the pixel electrode 110 overlaps with the wiring 165b, and wherein the first insulating film comprises a region in contact with the second insulating film over the first metal oxide film.
Regarding claims 22 and 23, Yamazaki et al. teach in figures 1-4 and related text, as asserted with respect to claim 2, a display device comprising:
a first conductive film 161;
a second conductive film 101, 108 positioned in a same layer as the first conductive film;
a first insulating film 102 over the first conductive film and the second conductive film;
a first metal oxide film 130, 131, 132 over the first conductive film with the first insulating film interposed therebetween;
a second metal oxide film 131 positioned in a same layer as the first metal oxide film 132;
a third conductive film 165b in contact with a top surface of the second metal oxide film;
a second insulating film 107 over the first metal oxide film, the second metal oxide film, and the third conductive film; and
a pixel electrode 110 over the second insulating film107,
wherein the first conductive film 161 is configured to be a gate of a transistor,
wherein the first metal oxide film comprises a channel formation region of the transistor,
wherein the pixel electrode 110 is electrically connected to one of a source and a drain of the transistor 165b,
wherein the first region of the pixel electrode is configured to be one electrode of a capacitor,
wherein the second region of the second metal oxide film does not overlap with the second conductive film, and
wherein the second conductive film 101, 108 is electrically connected to the second metal oxide film through the third conductive film (being portion of the second conductive film),
wherein the second conductive film is configured to be a wiring which supplies a potential to the second metal oxide film, and
wherein the third conductive film 165b comprises a third region overlapping with the pixel electrode.
Regarding the claimed limitation of “wherein the pixel electrode comprises a first region overlapping with the second metal oxide film with the second insulating film interposed therebetween, and wherein the second metal oxide film comprises a second region overlapping with the pixel electrode with the second insulating film interposed therebetween, and wherein the second region of the second metal oxide film is configured to be the other electrode of the capacitor”, these limitations where addressed in the rejection of claim 2, and will not be repeated herein.
Regarding claim 23, Yamazaki et al. teach in figure 1 and related text that the first metal oxide film and the second metal oxide film each comprise In, Ga, and Zn, and states that “Indium oxide is a well-known material” and used as a metal oxide film.
Response to Arguments
1 Applicants argue that “Yamazaki, Inoue, nor any proper combination of the two references describes or suggests an arrangement in which "the second metal oxide film does not overlap with the first insulating film in a first region" and "the second insulating film is in contact with a top surface of the second metal oxide film in the first region," as recited in claim 2”, because “oxide semiconductor layers 132 and 133 (the recited "second metal oxide film") actually overlap with the oxide insulating film 107 (the recited "first insulating film")” and “FIG. 1 of Yamazaki depicts that the insulating layer 191 (the recited "second insulating film") is spaced apart from a top surface of the oxide semiconductor layers 132 and 133 (the recited "second metal oxide film")”.
1. Claim 1 recites “the second metal oxide film does not overlap with the first insulating film in a first region” (emphasis added). Figure 1 of Yamazaki depicts that the second metal oxide film does not overlap with the first insulating film in the first region.
Furthermore, as recited in the rejection, the second insulating film is in at least mechanical contact with a top surface of the second metal oxide film in the first region.
2. Applicants argue regarding claim 22 that “neither Yamazaki, Inoue, nor any proper combination of the two references describes or suggests an arrangement in which "the second conductive film is electrically connected to the second metal oxide film through the third conductive film" and "the third conductive film comprises a third region overlapping with the pixel electrode”, because “the gate electrode layer 101 and capacitor wiring 108 (the recited "second conductive film") are not electrically connected to the oxide semiconductor layer 131 (the recited "second metal oxide film") through the drain electrode layer 165b (the recited "third conductive film"), and the drain electrode layer 165b (the recited "third conductive film") excludes a third region overlapping with the pixel electrode 110”.
2. Applicants argue that the gate electrode (the recited "second conductive film") is not electrically connected to the channel region (oxide semiconductor layer 131, the recited "second metal oxide film") through the drain electrode layer 165b (the recited "third conductive film"). Clearly, in a transistor, the gate electrode, the channel region and the drain electrode are all electrically connected to each other.
Furthermore, as recited in the rejection, Yamazaki et al. do not teach that the pixel electrode 110 comprises a region overlapping with the second metal oxide film in the first region. Yamazaki et al. teach in figure 1 and related text drain electrode 105b comprises a region overlapping with the second metal oxide film in the first region, and wherein pixel electrode 110 is in direct contact with drain electrode 105b. Forming pixel electrode 110 and drain electrode 105b in one step and of the same material would render the pixel electrode comprises a region overlapping with the second metal oxide film in the first region. It is noted that forming the pixel electrode and the drain electrode in one step and of the same material does not produce a structure which is different from a structure which is formed by using separate two steps. Thus, the formation of the pixel electrode and the drain electrode in two separate steps is a process limitation which would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced.
3. Applicants argue that “FIG. 5 of Yamazaki depicts that the gate electrode layer 101 and capacitor wiring 108 (the recited "second conductive film") are electrically isolated from the oxide semiconductor layer 131 (the recited "second metal oxide film").
3. All the elements in one semiconductor device are electrically connected to each other. It is unclear as to how the gate electrode layer 101 and capacitor wiring 108 can be electrically isolated from the oxide semiconductor layer 131.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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O.N. /ORI NADAV/
5/11/2026 PRIMARY EXAMINER
TECHNOLOGY CENTER 2800
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