DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Seo et al. (U.S. Patent Application Publication No. 2023/0171985).
Regarding to claim 1, Seo discloses a light-emitting device comprising:
a first electrode (Fig. 2A, element 11; [0100], line 5);
a second electrode facing the first electrode (Fig. 2A, element 12; [0100], line 5); and
an interlayer between the first electrode and the second electrode (Fig. 2A, stack 21/22/40 31/32) and comprising an emission layer (Fig. 2A, element 40; [0100], line 7),
wherein the interlayer further comprises a reverse potential layer (Fig. 2A, layer 21, or 22, or 31, or 32, or stack 31/32, or stack 21/22; [0100], last 4 lines), and
a sign of a giant surface potential slope value of the reverse potential layer and a sign of a giant surface potential slope value of the emission layer ([0115], lines 1-10).
Seo discloses a giant surface potential slope value of the emission layer is desired in which the difference in slope value of the hole reverse potential layer is preferably less than
0 (mV/nm), and the difference in slope value of the electron reverse potential layer is preferably greater than 0 (mV/nm), for obtaining a low driving voltage ([0115], lines 11-14). It is known that values two layers must have opposite signs, to be able to make the difference in values of two layers to be less than zero. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Seo to configure a sign of a giant surface potential slope value of the reverse potential layer to be opposite to a sign of a giant surface potential slope value of the emission layer in order to reduce driving voltage, thus to increase reliability.
Regarding to claim 2, Seo discloses wherein the emission layer has a giant surface potential slope in which negative charges are to be induced in a direction of the first electrode and positive charges are to be induced in a direction of the second electrode (Fig. 5A, [0150], lines 7-10).
Regarding to claim 3, Seo discloses the reverse potential layer has a giant surface potential slope in which positive charges are to be induced in a direction of the first electrode and negative charges are to be induced in a direction of the second electrode (Fig. 5B, [0150], lines 11-13).
Regarding to claim 4, Seo discloses the first electrode is an anode ([0100], line 5).
Regarding to claim 5, Seo discloses the emission layer comprises a phosphorescent dopant ([0211], line 2).
Regarding to claim 6, Seo discloses the emission layer is to emit green light or blue light ([0259], line 6).
Regarding to claim 7, it would have been obvious to one having ordinary skill in the art at the time the invention was filed to configure an absolute value of the giant surface potential slope value of the reverse potential layer to be 20 % or more of the giant surface potential slope value of the emission layer in order to further reduce driving voltage, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955).
Regarding to claim 8, in Fig. 2A, Seo apparently discloses the reverse potential layer has a thickness of a 100 % of a thickness of the emission layer. However, Seo is silent as to the ratio in thickness. Nevertheless, it would have been obvious to one having ordinary skill in the art at the time the invention was filed to configure a thickness of the reverse potential layer to be about 17 % to about 100 % of a thickness of the emission layer in order to further reduce driving voltage, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955).
Regarding to claim 9, Seo discloses a thickness of the reverse potential layer is about 17 A to about 1,000 A ([0015], last 3 lines, 20nm is 200A).
Regarding to claim 10, Seo discloses the reverse potential layer comprises a plurality of layers (Fig. 2A, layers 31 and 32).
Regarding to claim 11, Seo discloses the first electrode is an anode, the second electrode is a cathode, and the interlayer further comprises a hole transport region between the first electrode and the emission layer and comprising a hole injection layer, a hole transport layer, an electron blocking layer, an emission auxiliary layer, or any combination thereof ([0100], lines 5-15).
Regarding to claim 12, Seo discloses the reverse potential layer is in the hole transport region (Fig. 2A, the reverse potential layer is in the hole transport region 21/22).
Regarding to claim 13, Seo discloses the reverse potential layer is between the hole transport layer and the emission layer (Fig. 2A, the reverse potential layer 22 is between the hole transport layer 21 and the emission layer 40).
Regarding to claim 14, Seo discloses the reverse potential layer is in the emission auxiliary layer (Fig. 2A).
Regarding to claim 15, Seo discloses the reverse potential layer is in contact with the emission layer (Fig. 2A, the reverse potential layer 22 is in contact with the emission layer 40).
Regarding to claim 16, Seo discloses the first electrode is an anode, the second electrode is a cathode, and the interlayer further comprises an electron transport region between the second electrode and the emission layer and comprising a hole blocking layer, an electron transport layer, an electron injection layer, or any combination thereof ([0100], lines 5-15).
Regarding to claim 17, Seo discloses capacitance of the light-emitting device ([0177], last 3 lines). Seo is silent as to a range of capacitance, however, it would have been obvious to one having ordinary skill in the art at the time the invention was filed to configure a maximum capacitance of the light-emitting device to be 4.5 nF or less in order to increase efficiency, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955).
Regarding to claim 18, Seo discloses a capping layer (Fig. 24, element 420).
Regarding to claim 19, Seo discloses an electronic apparatus comprising the light-emitting device of claim 1 (Figs. 23-24, light-emitting apparatus comprising the light-emitting device of claim 1).
Regarding to claim 20, Seo discloses a thin-film transistor (Fig. 23, element 320), wherein the thin-film transistor comprises a source electrode and a drain electrode, and the first electrode of the light-emitting device is electrically connected to the source electrode or the drain electrode of the thin-film transistor (Fig. 23).
Pertinent Art
For the benefits of the Applicant, US-12419155-B2, US-20250024741-A1, US-20210376300-A1, are cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. The references fail to disclose a sign of a giant surface potential slope value of the reverse potential layer is opposite to a sign of a giant surface potential slope value of the emission layer.
Conclusion
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/VU A VU/Primary Examiner, Art Unit 2897