Prosecution Insights
Last updated: October 02, 2026
Application No. 18/534,065

SEMICONDUCTOR DEVICES WITH SIDEWALL RECESSES

Final Rejection §102
Filed
Dec 08, 2023
Examiner
HENRY, CALEB E
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Components Industries LLC
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
1093 granted / 1259 resolved
+18.8% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
36 currently pending
Career history
1294
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
55.0%
+15.0% vs TC avg
§102
35.1%
-4.9% vs TC avg
§112
5.9%
-34.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1259 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 6/2/2026 have been fully considered but they are not persuasive. Please see rejection below for explanation. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-6, 21-26 and 28-33 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yeh (20220278015). PNG media_image1.png 690 499 media_image1.png Greyscale PNG media_image2.png 612 869 media_image2.png Greyscale Regarding claim 1, Yeh teaches an semiconductor device (please see the device in fig. 1B and 3A) comprising: a first surface (the topmost surface of 104/304 that surrounds 100 and is directly connected to 106) having a first perimeter (with a width of W1, the perimeter can be seen in fig.1B); a second surface (SL1) opposite the first surface, the second surface having a second perimeter (perimeter of SL1 would be smaller than perimeter of topmost surface of 104/304, since SL1 is more inward), the first perimeter being greater than the second perimeter (since SL1 is more inward that W1, W1 would have a greater perimeter); a sidewall (303a) extending between the first surface and the second surface, the sidewall defining an overhang (307), a width of the overhang extending between the first perimeter and the second perimeter (307 is between SL1 and W1), a thickness of the overhang being less than a thickness of the semiconductor device (as can be seen in fig. 3A, 110 is thicker than 307), the overhang configured to keep epoxy away from the first surface (par. 37 teaches that 102 can be an epoxy; as can be seen in fig. 3A, 307 is between 102 and the topmost surface of 104/304, with width W1, and thus keep 102 away from the topmost surface of 104/304, with width W1). Regarding claim 2, Yeh teaches an semiconductor device of claim 1, wherein the sidewall is curved or rounded (as seen in fig. 3A, 303a is seen to have an angle theta). Regarding claim 3, Yeh teaches an semiconductor device of claim 1, wherein the sidewall is angular (as seen in fig. 3A, 303a is seen to have an angle theta). Regarding claim 4, Yeh teaches an semiconductor device of claim 1, wherein the sidewall includes a bevel (please see 303a). Regarding claim 5, Yeh teaches an semiconductor device of claim 1, but does not explicitly teach the method of manufacturing wherein the sidewall is mechanically cut or laser cut. However, since this limitation is directed towards the process of forming the device structure. It is well settled that “product by process” limitations in claims drawn to structure are directed to the product, per se, no matter how actually made. Case law makes clear that it is the patentability of the final product per se which must be determined in a “product by process” claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product by process” claims or otherwise. The above case law further makes clear that applicant has the burden of showing that the method language necessarily produces a structural difference. As such, the language only requires the device structure, which does not distinguish the invention from prior art, who teaches the structure as claimed. Regarding claim 6, Yeh teaches an semiconductor device of claim 1, wherein a thickness of the semiconductor device is between 50 microns to 150 microns (par. 58 teaches that SH1 is less than 400 um and SH1, as seen in the figures above, is the as thick as 110). Regarding claim 21, Yeh teaches an semiconductor die comprising: a first surface (the topmost surface of 104/304 that surrounds 100 and is directly connected to 106) having a first perimeter (with a width of W1, the perimeter can be seen in fig.1B); a second surface (SL1) opposite the first surface, the second surface having a second perimeter (perimeter of SL1 would be smaller than perimeter of topmost surface of 104/304, since SL1 is more inward), the first perimeter being greater than the second perimeter (since SL1 is more inward that W1, W1 would have a greater perimeter); a sidewall (303a) extending between the first surface and the second surface, the sidewall defining an overhang (307), a width of the overhang extending between the first perimeter and the second perimeter (307 is between SL1 and W1), a thickness of the overhang being less than a thickness of the semiconductor device (as can be seen in fig. 3A, 110 is thicker than 307), the overhang configured to keep epoxy away from the first surface (par. 37 teaches that 102 can be an epoxy; as can be seen in fig. 3A, 307 is between 102 and the topmost surface of 104/304, with width W1, and thus keep 102 away from the topmost surface of 104/304, with width W1) Regarding claim 22, Yeh teaches an semiconductor device of claim 21, wherein the sidewall is curved or rounded (as seen in fig. 3A, 303a is seen to have an angle theta). Regarding claim 23, Yeh teaches an semiconductor device of claim 21, wherein the sidewall is angular (as seen in fig. 3A, 303a is seen to have an angle theta). Regarding claim 24, Yeh teaches an semiconductor device of claim 21, wherein the sidewall includes a bevel (please see 303a). Regarding claim 25, Yeh teaches an semiconductor device of claim 21, but does not explicitly teach the method of manufacturing wherein the sidewall is mechanically cut or laser cut. However, since this limitation is directed towards the process of forming the device structure. It is well settled that “product by process” limitations in claims drawn to structure are directed to the product, per se, no matter how actually made. Case law makes clear that it is the patentability of the final product per se which must be determined in a “product by process” claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product by process” claims or otherwise. The above case law further makes clear that applicant has the burden of showing that the method language necessarily produces a structural difference. As such, the language only requires the device structure, which does not distinguish the invention from prior art, who teaches the structure as claimed. Regarding claim 26, Yeh teaches an semiconductor device of claim 21, wherein a thickness of the semiconductor device is between 50 microns to 150 microns (par. 58 teaches that SH1 is less than 400 um and SH1, as seen in the figures above, is the as thick as 110). Regarding claim 28, Yeh teaches an semiconductor device comprising: a first surface (the topmost surface of 104/304 that surrounds 100 and is directly connected to 106) having a first outer perimeter (with a width of W1, the perimeter can be seen in fig.1B); a second surface (SL1) opposite the first surface, the second surface having a second outer perimeter (perimeter of SL1 would be smaller than perimeter of topmost surface of 104/304, since SL1 is more inward), the first outer perimeter being greater than the second outer perimeter (since SL1 is more inward that W1, W1 would have a greater perimeter); a sidewall (303a) extending between the first surface and the second surface, the sidewall defining an overhang (307), a width of the overhang extending between the first outer perimeter and the second outer perimeter (307 is between SL1 and W1), a thickness of the overhang being less than a thickness of the semiconductor device (as can be seen in fig. 3A, 110 is thicker than 307), the overhang configured to keep epoxy away from the first surface (par. 37 teaches that 102 can be an epoxy; as can be seen in fig. 3A, 307 is between 102 and the topmost surface of 104/304, with width W1, and thus keep 102 away from the topmost surface of 104/304, with width W1). Regarding claim 29, Yeh teaches an semiconductor device of claim 28, wherein the sidewall is curved or rounded (as seen in fig. 3A, 303a is seen to have an angle theta). Regarding claim 30, Yeh teaches an semiconductor device of claim 28, wherein the sidewall is angular (as seen in fig. 3A, 303a is seen to have an angle theta). Regarding claim 31, Yeh teaches an semiconductor device of claim 28, wherein the sidewall includes a bevel (please see 303a). Regarding claim 32, Yeh teaches an semiconductor device of claim 28, but does not explicitly teach the method of manufacturing wherein the sidewall is mechanically cut or laser cut. However, since this limitation is directed towards the process of forming the device structure. It is well settled that “product by process” limitations in claims drawn to structure are directed to the product, per se, no matter how actually made. Case law makes clear that it is the patentability of the final product per se which must be determined in a “product by process” claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product by process” claims or otherwise. The above case law further makes clear that applicant has the burden of showing that the method language necessarily produces a structural difference. As such, the language only requires the device structure, which does not distinguish the invention from prior art, who teaches the structure as claimed. Regarding claim 33, Yeh teaches an semiconductor device of claim 28, wherein a thickness of the semiconductor device is between 50 microns to 150 microns (par. 58 teaches that SH1 is less than 400 um and SH1, as seen in the figures above, is the as thick as 110). Allowable Subject Matter Claim 7 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 27 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CALEB E HENRY/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Dec 08, 2023
Application Filed
Mar 19, 2026
Non-Final Rejection mailed — §102
Jun 02, 2026
Response Filed
Aug 13, 2026
Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12740233
DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
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Patent 12740292
DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
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Patent 12733357
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Patent 12733378
DISPLAY DEVICE, ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE DISPLAY DEVICE
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Patent 12727363
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
93%
With Interview (+6.0%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1259 resolved cases by this examiner. Grant probability derived from career allowance rate.

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