Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
1. Applicant's election, without traverse, of claims 1-11 in the “Response to Restriction Requirement” filed on 03/30/2026 is acknowledged and entered by the Examiner. Cancellation of claims 12-20 in “Claims” filed on 03/30/2026 is acknowledged and entered by the Examiner.
This office action consider claims 1-11 pending for prosecution.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (100; Fig 3A; [0063]) = (element 100; Figure No. 3A; Paragraph No. [0063]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
2. Claims 1-5, 7-9, and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Miccoli et al. (US 20120211748 A1; hereinafter Miccoli).
Regarding claim 1, Miccoli teaches a method of singulating a plurality of die from a substrate (see the entire document, specifically Fig. 1A+; [0001+], and as cited below), the method comprising:
removing a die stack (220; Figs. 3A-3D; [0051-0065]) coupled to a substrate (210; Figs. 3A-3D; [0051-0065]) in a die street (132A; Figs. 3A-3D; [0051-0065]) by etching the die stack (220; Figs. 3A-3D; [0051-0065]) to expose a top surface of a substrate material of the substrate (210; Figs. 3A-3D; [0051-0065]) in the die street (132A; Figs. 3A-3D; [0051-0065]), wherein a first width (see Fig. 3D; see [0063-0065])of the top surface of the substrate material (210; Figs. 3A-3D; [0051-0065]) is exposed; and
forming a plurality of die by singulating (120A, 120B; Figs. 3E-3I; [0066-0078]; see [0070-0072, 0073-0078]), using a kerf width of a second width (see Figs. 3H-3I; [see [0077-0078]), the exposed substrate material of the substrate (210; Figs. 3A-3I; [0066-0077]) in the die street (132A; Figs. 3A-3I; [0066-0077]), wherein the second width (see Figs. 3H-3I in view of Fig. 3D; see [0077-0078]) is smaller than the first width (see Figs. 3H-3I in view of Fig. 3D).
Regarding claim 2, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein removing the die stack (220; Figs. 3A-3D; [0051-0065]) occurs prior to forming the plurality of die (see [0051-0065] in view of [0066-0078]).
Regarding claim 3, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein the etching comprises wet etching or dry etching ([0063]).
Regarding claim 4, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein etching further comprises: forming a patterned layer (310; Figs. 3A-3D; [0061-0065]) over the die stack (220; Figs. 3A-3D; [0051-0065]), the patterned layer (310; Figs. 3A-3D; [0061-0065]) exposing the die stack (220; Figs. 3A-3D; [0051-0065]); etching the die stack (220; Figs. 3A-3D; [0051-0065]); and removing the patterned layer (310; Figs. 3A-3D; [0061-0065]).
Regarding claim 5, Miccoli teaches all of the features of claim 4.
Miccoli further teaches wherein forming the patterned layer (310; Figs. 3A-3D; [0061-0065]) comprises using a photoresist.
Regarding claim 7, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein the die stack (220; Figs. 3A-3D; [0051-0065]) includes two layers (see M5, M4; [0054]).
Regarding claim 8, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein the die stack (220; Figs. 3A-3D; [0051-0065]) includes three layers (see M5, M4, M3; [0054]).
Regarding claim 9, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein the die stack (220; Figs. 3A-3D; [0051-0065]) includes a silicon layer (225; [0063] in view of [0052-0053] of the instant disclosure) and two metal/oxide layers (M5, M4; [0057] in view of [0051] of the instant disclosure).
Regarding claim 11, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein removing the die stack (220; Figs. 3A-3D; [0051-0065]) further comprises removing a silicon layer (225; [0063] in view of [0052-0053] of the instant disclosure) coupled over the die street (132A; Figs. 3A-3D; [0051-0065]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
3. Claim 6 is rejected under 35 U.S.C.103 as being unpatentable over Miccoli et al. (US 20120211748 A1; hereinafter Miccoli), in view of the following statement.
Regarding claim 6, Miccoli teaches all of the features of claim 4.
Miccoli further teaches wherein forming the patterned layer (310; Figs. 3A-3D; [0061-0065]) comprises (see below for “using one of screen printing or stencil printing”).
As noted above, Miccoli does not expressly disclose “wherein forming the patterned layer comprises using one of screen printing or stencil printing”.
However, the Applicant has not presented persuasive evidence that the claimed “wherein forming the patterned layer comprises using one of screen printing or stencil printing” is for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without “wherein forming the patterned layer comprises using one of screen printing or stencil printing”). Also, the applicant has not shown that the claimed “wherein forming the patterned layer comprises using one of screen printing or stencil printing” produces a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. It has been held that is not inventive to discover “forming the patterned layer comprises using one of screen printing or stencil printing” by routine experimentation (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
4. Claim 10 is rejected under 35 U.S.C.103 as being unpatentable over Miccoli et al. (US 20120211748 A1; hereinafter Miccoli), in view Shen et al. (US 20170341933 A1; hereinafter Shen).
Regarding claim 10, Miccoli teaches all of the features of claim 1.
Miccoli further teaches wherein the die stack (220; Figs. 3A-3D; [0051-0065]) (see below for “includes a complementary metal oxide semiconductor (CMOS) image sensor bonded to an application specific integrated circuit (ASIC) device”).
As noted above, Miccoli does not expressly disclose “wherein the die stack includes a complementary metal oxide semiconductor (CMOS) image sensor bonded to an application specific integrated circuit (ASIC) device”.
However, in the analogous art, Shen teaches a method of fabricating a semiconductor structure ([Abstract]), wherein (Fig. 1+; [0004+]) a semiconductor structure comprising of array of dies (106; Fig. 2; [0017]) and comprising of a CMOS wafer (204; Fig. 2; [0017]) that is configured to form an integrated circuit, such as an application-specific integrated circuit (ASIC) ([0017]) such that the MEMS structures of the array of dies (106; Fig. 2; [0017]) on the MEMS wafer are aligned to the integrated circuits of the array of dies (106; Fig. 2; [0017]) on the CMOS wafer (204; Fig. 2; [0017]) .
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Shen’s CMOS wafer that is configured to form an integrated circuit, such as an application-specific integrated circuit (ASIC) into Miccoli’s method, and thereby, modified Miccoli’s (by Shen) method will have wherein the die stack (Miccoli 220; Figs. 3A-3D; [0051-0065] in view of Shen Fig. 2; [0017]) includes a complementary metal oxide semiconductor (CMOS) image sensor bonded to an application specific integrated circuit (ASIC) device (in view of Shen Fig. 2; [0017]).
The ordinary artisan would have been motivated to modify Miccoli in the manner set forth above, at least, because this inclusion provides a CMOS wafer that is configured to form an integrated circuit, such as an application-specific integrated circuit (ASIC) (Shen [0017]), which increases the functionality and application of the device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Omar Mojaddedi whose telephone number is 313-446-6582. The examiner can normally be reached on Monday – Friday, 8:00 a.m. to 4:00 p.m..
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/OMAR F MOJADDEDI/Examiner, Art Unit 2898
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