DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 15 and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In reference to claim 15, the claim requires the temporary substrate has “a thermal expansion coefficient close to that of silicon carbide,” in lines 3-4. However, “close” is not defined in this context such that one of ordinary skill in the art cannot determine the metes and bounds of the claim. How much the thermal expansion coefficient can deviate from that of silicon carbide and still be close is unanswered.
Claim 16 depends on claim 15 and is indefinite due to its dependence on indefinite claim 15.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 8, 9, 11, 12, 15, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619).
In reference to claim 1, Furuichi et al. (WO 2015/093550 A1) hereafter “Furuichi,” a machine translation of which is included herewith and cited herein, disclose a method for manufacturing a semiconductor structure, with reference to Figure 1, comprising:
a) providing a temporary substrate 1;
b) forming an intermediate layer 2 on a front face of the temporary substrate;
c) depositing, onto the intermediate layer, a support layer 3 made of polycrystalline silicon carbide, page 18, line 8-end, the thickness of which ranges between 10 microns and 200 microns (50-1,000 µm, more preferably 100-500 µm) page 16 lines 1-9;
d) transferring a useful layer of monocrystalline silicon carbide 4b onto the support layer, directly or via an additional layer to form a composite structure, the transferring implementing molecular adhesion bonding; and
f) separating, at an interface of the intermediate layer or in the intermediate layer, to obtain, the semiconductor structure including the useful layer and the support layer, and the temporary substrate.
Furuichi does not disclose
the temporary substrate is made of a material with a thermal expansion coefficient ranging between 3.5 x 10-6/°C and 5 x 10-6/°C;
The intermediate layer is made of graphite,
e) forming an active layer on the useful layer
separating, to obtain, the semiconductor structure including the active layer, the useful layer and the support layer.
Lehnert et al. (US 2018/0047619) hereafter “Lehnert,” discloses a method of making a semiconductor device including teaching
a temporary substrate is made of a material (silicon carbide), paragraphs 48 and 70, with a thermal expansion coefficient ranging between 3.5 x 10-6/°C and 5 x 10-6/°C, (a known inherent material property of silicon carbide, see https://accuratus.com/silicar.html. CTE of 4.0 x 10-6/°C for example).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the temporary substrate to be made of a material with a thermal expansion coefficient ranging between 3.5 x 10-6/°C and 5 x 10-6/°C. One would have been motivated to do so in order for the substrate to have a CTE near that of other device layers, paragraph 48.
Lehnert further discloses forming an intermediate layer, 216 in Figure 2A, made of graphite on a front face of the temporary substrate 215, paragraphs 46 and 47.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to form an intermediate layer made of graphite on a front face of the temporary substrate. One would have been motivated to do so in order to provide a separation layer that can be easily cut, paragraph 47.
Lehnert further teaches forming an active layer, 313a in Figure 3F, on the useful layer 317a, paragraphs 100 and 101, and
separating, to obtain, the semiconductor structure including the active layer 313a, and the useful layer, 317a, (collectively 313 in Figure 3H), paragraph 107.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the process of Furuichi to form an active layer on the useful layer and to separate the semiconductor structure including the active layer, the useful layer, and the support layer. One would have been motivated to do so in order to form an epitaxial semiconductor device layer, paragraphs 101-106.
In reference to claim 2, Furuichi discloses a thickness of the intermediate layer ranges between 1 micron and 100 microns, (40 µm) page 18 lines 12-13.
In reference to claim 8, Furuichi discloses transferring of the useful layer onto the support layer comprises:
introducing light species into a donor substrate made of monocrystalline silicon carbide, to form a buried brittle plane defining, with the front face of the donor substrate, the useful layer;
assembling the front face of the donor substrate on the support layer, directly or via an additional layer, by molecular adhesion bonding; and
separating along the buried brittle plane in order to transfer the useful layer onto the support layer, page 19, lines 1-12.
In reference to claim 9, Lehnert discloses the forming of the active layer on the useful layer comprises epitaxial growth of at least one additional layer of doped mono-crystalline silicon carbide on the useful layer, the additional layer forming all or some of the active layer, paragraphs 100-103.
In reference to claim 11, Lehnert discloses producing all or some electronic components on and/or in the active layer, Figure 3G, prior to the separating, Figure 3H, see also paragraphs 105-107.
In reference to claim 12, Lehnert discloses assembling a detachable handle, 320 in Figure 3G, on a free face of the active layer or on a free face of all or some of the electronic components formed on and/or in the active layer, prior to the separating, Figure 3H, paragraph 108.
In reference to claim 15, Furuichi discloses a composite semiconductor structure, with reference to Figure 1, comprising:
a temporary substrate 1;
an intermediate layer 2 at least disposed on a front face of the temporary substrate;
a support layer 3 made of polycrystalline silicon carbide, page 18, line 8-end, the thickness of which ranges between 10 microns and 200 microns (50-1,000 µm, more preferably 100-500 µm) page 16 lines 1-9; and
a useful layer of monocrystalline silicon carbide 4b disposed on the support layer.
Furuichi does not disclose the temporary substrate is made of a material with a thermal expansion coefficient close to that of silicon carbide; or
the intermediate layer is made of graphite.
Lehnert discloses a semiconductor device including teaching
a temporary substrate is made of a material (silicon carbide), paragraphs 48 and 70, with a thermal expansion coefficient close to that of silicon carbide. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the temporary substrate to be made of a material with a thermal expansion coefficient close to that of silicon carbide. One would have been motivated to do so in order for the substrate to have a CTE near that of other device layers, paragraph 48.
Lehnert discloses a semiconductor device including teaching forming an intermediate layer, 216 in Figure 2A, made of graphite on a front face of the temporary substrate 215, paragraphs 46 and 47.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to form an intermediate layer made of graphite on a front face of the temporary substrate. One would have been motivated to do so in order to provide a separation layer that can be easily cut, paragraph 47.
In reference to claim 16, Furuichi does not disclose the temporary substrate comprises monocrystalline or polycrystalline silicon carbide or the thickness of the useful layer ranges between 100 nm and 1,500 nm.
Lehnert discloses the temporary substrate comprises monocrystalline or polycrystalline silicon carbide, paragraphs 48 and 70. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the temporary substrate to comprise monocrystalline or polycrystalline silicon carbide. One would have been motivated to do so in order to use the same material as other layers of the structure to have the same coefficient of thermal expansion (CTE) and thus to reduce thermal stress, paragraph 48.
Lehnert further discloses the thickness of the useful layer ranges between 100 nm and 1,500 nm (200-3,000 nm, e.g. 1 µm or 1,000 nm) paragraph 93. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the thickness of the useful layer to range between 100 nm and 1,500 nm. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting a device layer of one thickness for another.
Claim 3, 4, 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619) as applied to claim 1 above and further in view of Guercio et al. (US 2020/0331816).
In reference to claims 3 and 17, Furuichi in view of Lehnert does not disclose an average grain size of the graphite of the intermediate layer ranges between 1 micron and 50 microns.
Guercio et al. (US 2020/0331816), hereafter “Guercio,” discloses a method of depositing silicon carbide on graphite including teaching an average grain size of the graphite ranges between 1 micron and 50 microns, paragraph 141. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for an average grain size of the graphite of the intermediate layer ranges between 1 micron and 50 microns. One would have been motivated to do so in order to support nucleation and crystallization of deposited silicon carbide, paragraphs 441 and 445.
In reference to claims 4 and 18, Furuichi in view of Lehnert does not disclose a porosity of the graphite of the intermediate layer ranges between 6 and 17%
Guercio discloses a method of depositing silicon carbide on graphite including teaching a porosity of the graphite ranges between 6 and 17%, paragraph 140. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for a porosity of the graphite of the intermediate layer to range between 6 and 17%. One would have been motivated to do so in order to support nucleation and crystallization of deposited silicon carbide, paragraphs 441 and 445.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619) as applied to claim 1 above and further in view of Fujikawa et al. (WO 2020/036167).
In reference to claim 5, Furuichi in view of Lehnert does not disclose the graphite of the intermediate layer has a thermal expansion coefficient ranging between 4 x 10-6/°C and 5 x 10-6/°C.
Fujikawa et al. (WO 2020/036167) a machine translation of which is included herewith and cited herein, discloses a method of depositing silicon carbide on graphite including teaching the graphite of the intermediate layer has a thermal expansion coefficient ranging between 4 x 10-6/°C and 5 x 10-6/°C (4.3 x 10-6/°C and 7.1 x 10-6/°C) paragraph 51, (see paragraph 51 of original document for proper exponents). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the graphite of the intermediate layer to have a thermal expansion coefficient ranging between 4 x 10-6/°C and 5 x 10-6/°C. One would have been motivated to do so in order to prevent silicon carbide grown on the graphite from warping, paragraph 51.
Claims 6, 7, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619) as applied to claim 1 above and further in view of Nagasawa et al. (US 2019/0382918).
In reference to claim 6, Furuichi in view of Lehnert does not disclose forming the intermediate layer on a peripheral edge of the temporary substate and/or forming a second intermediate layer on a rear face of the temporary substrate.
Nagasawa et al. (US 2019/0382918), hereafter “Nagasawa,” discloses a method of making a silicon carbide semiconductor structure including forming an intermediate layer, 1b in Figure 1A, on a peripheral edge of the temporary substate and/or forming a second intermediate layer on a rear face of the temporary substrate 1a, paragraph 65.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to form the intermediate layer on a peripheral edge of the temporary substate and/or forming a second intermediate layer on a rear face of the temporary substrate. One would have been motivated to do so in order to process both surfaces of the temporary substrate to form two silicon carbide substrates by one process, paragraph 105.
In reference to claim 7, Furuichi in view of Lehnert does not disclose depositing the support layer onto an intermediate layer present on a peripheral edge of the temporary substrate and/or directly onto the peripheral edge of the temporary substrate.
Nagasawa discloses a method of making a silicon carbide semiconductor structure including depositing the support layer, 10 in Figure 1B, onto an intermediate layer present on a peripheral edge of the temporary substrate and/or directly onto the peripheral edge of the temporary substrate, paragraphs 89 and 93. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to deposit the support layer onto an intermediate layer present on a peripheral edge of the temporary substrate and/or directly onto the peripheral edge of the temporary substrate.
One would have been motivated to do so in order to process both surfaces of the temporary substrate to form two silicon carbide substrates by one process, paragraph 105.
In reference to claim 14, Furuichi in view of Lehnert discloses depositing the support layer, transferring the useful layer, forming the active layer, and the separating as addressed above in reference to claim 1. Nagasawa teaches processing both sides of the temporary substrate as addressed above in reference to claim 6.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the depositing of the support layer to comprise depositing, onto a second intermediate layer present on a rear face of the temporary substrate, a second support layer made of polycrystalline silicon carbide, the thickness of which ranges between 10 microns and 200 microns; the transferring of the useful layer to further comprise transferring a second useful layer of monocrystalline silicon carbide onto the second support layer, directly or via an additional layer, the transfer implementing molecular adhesion bonding; the forming of the active layer to comprise forming a second active layer on the second useful layer; and the separating to further comprise separating, at an interface of the second intermediate layer or in the second intermediate layer, to obtain another semiconductor structure including the second active layer, the second useful layer, and the second support layer.
One would have been motivated to do so in order to process both surfaces of the temporary substrate to form two silicon carbide substrates by one process, paragraph 105 of Nagasawa.
Claim 10 is are rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619) as applied to claim 1 above and further in view of Zhang et al. (US 9,570,560).
In reference to claim 10, Furuichi in view of Lehnert does not disclose the forming of the active layer on the useful layer further comprises heat treatment at a temperature above or equal to 1,600 °C to activate dopants in the active layer.
Zhang et al. (US 9,570,560) discloses a method of making a silicon carbide semiconductor device including teaching forming of the active layer on the useful layer further comprises heat treatment at a temperature above or equal to 1,600 °C to active dopants in the active layer, col. 9 lines 60-67. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for forming of the active layer on the useful layer further to comprise heat treatment at a temperature above or equal to 1,600 °C to activate dopants in the active layer. One would have been motivated to do so in order to set a desired doping profile, id.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619) as applied to claim 1 above and further in view of Takamura et al. (US 2023/0274698).
In reference to claim 13, Lehnert discloses the separating occurs by cutting the graphite of the intermediate layer using a saw, paragraph 107.
Lehnert does not disclose cutting using a diamond wire saw.
Takamura et al. (US 2023/0274698) discloses a method of making a semiconductor structure including separating a structure by cutting a graphite layer using a diamond wire saw, paragraph 213. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the separating to comprise cutting the graphite of the intermediate layer using a diamond wire saw. To do so would have merely been to apply a known technique to a known method ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619) and Guercio et al. (US 2020/0331816) as applied to claim 18 above and further in view of Fujikawa et al. (WO 2020/036167).
In reference to claim 19, Furuichi in view of Lehnert and Guercio does not disclose the graphite of the intermediate layer has a thermal expansion coefficient ranging between 4 x 10-6/°C and 5 x 10-6/°C.
Fujikawa et al. (WO 2020/036167) a machine translation of which is included herewith and cited herein, discloses a method of depositing silicon carbide on graphite including teaching the graphite of the intermediate layer has a thermal expansion coefficient ranging between 4 x 10-6/°C and 5 x 10-6/°C (4.3 x 10-6/°C and 7.1 x 10-6/°C) paragraph 51, (see paragraph 51 of original document for proper exponents). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the graphite of the intermediate layer to have a thermal expansion coefficient ranging between 4 x 10-6/°C and 5 x 10-6/°C. One would have been motivated to do so in order to prevent silicon carbide grown on the graphite from warping, paragraph 51.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Furuichi et al. (WO 2015/093550 A1) in view of Lehnert et al. (US 2018/0047619), Guercio et al. (US 2020/0331816), and Fujikawa et al. (WO 2020/036167) as applied to claim 19 above and further in view of Nagasawa et al. (US 2019/0382918).
In reference to claim 20, Furuichi in view of Lehnert does not disclose forming the intermediate layer on a peripheral edge of the temporary substate and/or forming a second intermediate layer on a rear face of the temporary substrate.
Nagasawa discloses a method of making a silicon carbide semiconductor structure including forming an intermediate layer, 1b in Figure 1A, on a peripheral edge of the temporary substate and/or forming a second intermediate layer on a rear face of the temporary substrate 1a, paragraph 65.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to form the intermediate layer on a peripheral edge of the temporary substate and/or forming a second intermediate layer on a rear face of the temporary substrate. One would have been motivated to do so in order to process both surfaces of the temporary substrate to form two silicon carbide substrates by one process, paragraph 105.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Myers-Ward et al. (US 2021/0125826) and Kim (US 2018/0197736) disclose related methods with graphene separation layers.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRYAN R. JUNGE whose telephone number is (571)270-5717. The examiner can normally be reached M-F 8:00-4:30 CT.
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/BRYAN R JUNGE/ Primary Examiner, Art Unit 2897