DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/12/2023, 09/04/2025 and 12/23/2025 have considered by the examiner.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1,6-9 and 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Uzoh (US 20220139867; hereinafter Uzoh ‘ 867), and further in view of Tsutomu (WO 2008/004365).
Regarding claim 1, Uzoh ‘867 teaches a method for manufacturing a semiconductor device in figs. 1-3, comprising:
preparing a first semiconductor substrate (18) including a first substrate body (21) and a first insulating film (22) and a first electrode (23), the first insulating film (22) and the first electrode (23) being provided on a surface of the first substrate body (21) (see fig. 2A);
preparing a second semiconductor substrate (20) including a second substrate body (21) and a second insulating film (22) and a plurality of second electrodes (23), the second insulating film (22) and the plurality of second electrodes (23) being provided on a surface of the second substrate body (20);
polishing the second insulating film arranged on the surface side of the second semiconductor substrate (see par. 31 or 57);
acquiring a plurality of semiconductor chips, each of which includes an insulating film portion corresponding to the second insulating film and at least one of the second electrodes, by singulating the second semiconductor substrate (see pars. 22-24);
aligning the second electrode of at least one of the plurality of semiconductor chips with the first electrode of the first semiconductor substrate (see fig. 2D and par. 39);
bonding the first insulating film of the first semiconductor substrate and the insulating film portion of the semiconductor chip to each other (see par. 39 and fig. 2D); and
bonding the first electrode of the first semiconductor substrate and the second electrode of the semiconductor chip to each other (see par. 39 and fig. 2D).
Uzoh ‘867 does not teach wherein, in the acquiring of the plurality of semiconductor chips, the second semiconductor substrate is singulated by dicing while cleaning the second semiconductor substrate using a mixed cleaning fluid in which a gas is introduced into a cleaning liquid.
Tsutomu teaches the same field of an endeavor wherein in the semiconductor substrate is singulated by dicing while cleaning the semiconductor substrate using a mixed cleaning fluid in which a gas is introduced into a cleaning liquid (see pars. 18-19).
Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to include in the acquiring of the plurality of semiconductor chips, the second semiconductor substrate is singulated by dicing while cleaning the second semiconductor substrate using a mixed cleaning fluid in which a gas is introduced into a cleaning liquid as taught by Tsutomu in the teaching of Uzoh ‘867 in order to prevent the contamination from adhering to the workpiece (see par. 19).
Regarding claim 6, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Tsutomu teaches in the acquiring of the plurality of semiconductor chips, mist after cleaning of the mixed cleaning fluid ejected onto the second semiconductor substrate is collected (see par. 59).
Regarding claim 7, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Uzoh ‘867 teaches a semiconductor device according to any one of wherein, in the acquiring of the plurality of semiconductor chips dicing is performed from the second insulating film toward the second substrate body (see par. 23. NOTE: Before singulating, a protective layer 18 formed over the bonding surface 24 which is above the second insulating layer. Thus, it is inherently that dicing is performed from the protective layer through the second insulating layer to the substrate). In Tsutomu reference, the dicing apparatus including the mixed cleaning fluid is ejected onto the cutting surface which is known as the second insulating film of the second semiconductor substrate (see pars. 18-19).
Regarding claim 8, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Uzoh ‘867 teaches the second insulating film of the second semiconductor substrate contains an inorganic material (see par. 30).
Regarding claim 9, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Uzoh ‘867 teaches the second insulating film of the second semiconductor substrate contains an organic material (see par. 30).
Regarding claim 12, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Tsutomu teaches a first introduction unit (42) configured to introduce the cleaning liquid (refer to cleaning water); a second introduction unit (43) configured to introduce the gas (refer to compressed air); a mixing unit (42) configured to mix the gas with the cleaning liquid to form the mixed cleaning fluid; and a nozzle (45) that ejects the mixed cleaning fluid (see fig. 2; par. 45).
Regarding claim 13, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Tsutomu teaches a mist collector that collects mist after cleaning of the mixed cleaning fluid ejected through the nozzle (see par. 59).
Regarding claim 14, Uzoh ‘ 867 teaches a cleaning method in figs 1-2, comprising:
preparing a semiconductor substrate (18) including a substrate body (21) and an insulating film (22) and a plurality of electrodes (23), the insulating film (22) and the plurality of electrodes (23) being provided on a surface of the substrate body (21).
Uzoh ‘867 does not teach cleaning when singulating the semiconductor substrate, wherein, in the cleaning, the semiconductor substrate is singulated by dicing while cleaning the semiconductor substrate using a mixed cleaning fluid in which a gas is introduced into a cleaning liquid.
Tsutomu teaches the same field of an endeavor, wherein cleaning when singulating the semiconductor substrate, wherein, in the cleaning, the semiconductor substrate is singulated by dicing while cleaning the semiconductor substrate using a mixed cleaning fluid in which a gas is introduced into a cleaning liquid (see pars. 18-19).
Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to include the step of cleaning when singulating the semiconductor substrate, wherein, in the cleaning, the semiconductor substrate is singulated by dicing while cleaning the semiconductor substrate using a mixed cleaning fluid in which a gas is introduced into a cleaning liquid as taught by Tsutomu in the teaching of Uzoh ‘867 in order to prevent the contamination from adhering to the workpiece (see par. 19).
Claims 3 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Uzoh '867 in view of Tsutomu as applied to claim 1 above, and further in view of Said (US 202/028136; hereinafter Said).
Regarding claim 3, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above except for the second insulating film has a thickness of 20 m or less.
Said teaches the same field of an endeavor wherein the second insulating film has a thickness of 20 µm or less (see par. 97).
Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to include wherein the second insulating film has a thickness of 20 µm or less as taught by Said in the teaching of Uzoh ‘ 867 and Tsutomu in order to reduce a thickness of the overall semiconductor device.
Regarding claim 10, Uzoh ‘ 867 and Tsutomu teach all the limitations of the claimed invention for the same reasons as set forth above except for the second insulating film has a thickness of 4 µm or more.
Said teaches the same field of an endeavor wherein the second insulating film has a thickness of 4 µm or more (see par. 97).
Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to include wherein the second insulating film has a thickness of 4 µm or more as taught by Said in the teaching of Uzoh ‘ 867 and Tsutomu in order to reduce a thickness of the overall semiconductor device.
Allowable Subject Matter
Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “an adhesive strength of the second insulating film with respect to the second substrate body is an adhesion strength at which a peeling rate in a cross-cut test is 1% or less.”
Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “wherein, in the acquiring of the plurality of semiconductor chips, cleaning is performed by ejecting the mixed cleaning fluid toward the second semiconductor substrate so that an ejection pressure of the mixed cleaning fluid is 0.980665 MPa or less.”
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “in the acquiring of the plurality of semiconductor chips, cleaning is performed by ejecting the mixed cleaning fluid toward the second semiconductor substrate so that an ejection pressure of the mixed cleaning fluid is 0.196133 MPa or more.”
Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the organic material contained in the second insulating film contains polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor.”
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “wherein, in the cleaning, cleaning is performed by ejecting the mixed cleaning fluid toward the semiconductor substrate so that an ejection pressure of the mixed cleaning fluid is from 0.196133 MPa to 0.980665 MPa, wherein, the insulating film of the semiconductor substrate to be cleaned contains an organic material, and the insulating film has a thickness of 4 µm or more.”
Claim 16 is allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 15, the prior art of record alone or in combination neither teaches nor makes obvious the invention of a semiconductor device, comprising: “there is no more than one piece of debris of 50 pm or more within a range of 15 mm in length and 15 mm in width on the second insulating film” in combination of all of the limitations of claim 16.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Niki Tram Nguyen whose telephone number is (571) 272-5526. The examiner can normally be reached on 6:00am-4:00pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke can be reached on (703)872-9306. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NIKI H NGUYEN/ Primary Examiner, Art Unit 2818