Prosecution Insights
Last updated: August 04, 2026
Application No. 18/550,044

METHOD FOR PRODUCING A SILICON CARBIDE-BASED SEMICONDUCTOR STRUCTURE AND INTERMEDIATE COMPOSITE STRUCTURE

Non-Final OA §103
Filed
Sep 11, 2023
Priority
Mar 09, 2021 — FR FR2102306 +1 more
Examiner
LEE, DA WEI
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Soitec
OA Round
2 (Non-Final)
76%
Grant Probability
Favorable
2-3
OA Rounds
7m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
28 granted / 37 resolved
+7.7% vs TC avg
Strong +18% interview lift
Without
With
+18.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
22 currently pending
Career history
78
Total Applications
across all art units

Statute-Specific Performance

§103
72.7%
+32.7% vs TC avg
§102
23.6%
-16.4% vs TC avg
§112
2.7%
-37.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 37 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Amendment filed on 02/17/2026 has been entered. Claims 1, 11 are amended. Claims 1 – 20 are pending in the present application. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3 – 7, 11 – 13, 15, 17 – 18 are rejected under 35 U.S.C. 103 as being unpatentable over Leow ( Pub. No. US 20220220635 A1 ), hereinafter Leow, in view of Auberton-Herve ( Pub. No. US 20030129780 A1 ), hereinafter Auberton-Herve. PNG media_image1.png 860 1094 media_image1.png Greyscale Regarding Independent Claim 1 ( Currently Amended ), Leow teaches a method for producing a semiconductor structure, comprising: providing a temporary substrate of graphite ( Leow, [0008], graphite substrate ) having a grain size of between 4 microns and 35 microns ( Leow, [0033], In some embodiments, the second SiC layer is polycrystalline SiC having an average grain size of about 1 micron to about 100 microns; [0047], In some embodiments, a graphite has an average grain size of about 0.05 mm or less, such as about 0.04 mm or less, such as about 0.03 mm or less, such as about 0.015 mm or less ), a porosity of between 6 and 17% ( [0046], A graphite base substrate may have a degree of porosity of about 6% to about 15% ), and a coefficient of thermal expansion of between 4×10−6/° C. and 5×10−6/° C ( Leow, [0019], a first SiC layer has a coefficient of thermal expansion (CTE) of about 3×10E-6/° C. to about 5×10E-6/° C ); depositing, directly on a front face of the temporary substrate, a carrier layer of polycrystalline silicon carbide having a thickness between 10 microns and 200 microns ( Leow, [0008], The first silicon carbide layer has a thickness of about 1 micron to about 200 microns ); removing the temporary substrate to form the semiconductor structure, the semiconductor structure including the active layer, the working layer and the carrier layer ( Leow, [0022], A first SiC layer can act as a buffer layer that blocks tendril formation of SiC into graphite, which facilitates graphite removal from SiC during a subsequent removal process, reducing roughness of the SiC substrate that is formed, and reducing warpage or bow of the SiC substrate when graphite is removed. The reduced warpage or bow provides reduced material (e.g., the warped portions of the SiC substrate) that needs to be removed (e.g., ashed) from the SiC substrate after removal of the deposited SiC from the base substrates ). Leow fails to disclose: transferring a working layer of monocrystalline silicon carbide on the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion; forming an active layer on the working layer; and after forming the active layer on the working layer, However, Auberton-Herve teaches: transferring a working layer of monocrystalline silicon carbide ( Auberton-Herve, [0052], When the aim is transfer to a monocrystalline support, for example a monocrystalline silicon support, the polishing techniques currently employed by all substrate manufacturers are sufficient; [0102], In the second embodiment of the invention, shown in FIG. 3, a monocrystalline silicon layer 10 is transferred from a monocrystalline source substrate 12; [0109], The monocrystalline silicon layer 10 is therefore transferred onto the support 2 by direct bonding via the amorphous silicon layer 6 ) on the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion ( Auberton-Herve, FIG. 6, [0082], The first embodiment of the invention is used for direct bonding of a monocrystalline silicon element onto a polycrystalline silicon support; [0107], The source substrate 12 made fragile in this way is then brought into contact with the polished free surface of the amorphous silicon layer 6 to form a bond by direct bonding (FIG. 3b) ); forming an active layer ( Auberton-Herve, FIG. 6, 9; [0080], The first, second, third and fifth embodiments concern a bonding process which involves transferring an active layer onto a polycrystalline support substrate; [0125], a monocrystalline silicon carbide active layer 9 on a polycrystalline silicon carbide support 7 ) on the working layer; and after forming the active layer ( Auberton-Herve, FIG. 6, monocrystalline silicon carbide active layer 9 ) on the working layer ( Auberton-Herve, FIG. 3, monocrystalline silicon layer 10 ), Leow and Auberton-Herve are both considered to be analogous to the claimed invention because they are forming silicon carbide ( SiC ) layers. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow ( forming polycrystalline SiC substrate having specific porosity and CTE ), to incorporate the teachings of Auberton-Herve ( active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to implement the low cost and high performance fabrication of silicon carbide layers. Doing so would provide specific process parameters ( e.g. buffer layer, direct bonding monocrystalline on polycrystalline ), and therefore low cost and high performance ( e.g. reduced porosity and cracks ) silicon carbide layers can be implemented. Regarding Claim 3 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 1, on which this claim is dependent, Auberton-Herve further teaches: wherein the transferring of the working layer (Auberton-Herve, [0052], [102], [0109] ) comprises: introducing light species ( Auberton-Herve, [0104], atoms of hydrogen ) into a donor substrate ( Auberton-Herve, [0104], A monocrystalline source substrate 12 is implanted with atoms of hydrogen; [0105], Atomic species can be implanted in the material using an ion beam implanter, an implanter operating by immersion in a plasma, etc; FIG. 6, [0123], monocrystalline silicon carbide source substrate 13 ) of monocrystalline silicon carbide ( Auberton-Herve, [0123], In the fifth embodiment of the invention, shown in FIG. 6, a substrate is made including an active layer 9 of monocrystalline silicon carbide ) to form a buried weakened plane ( Auberton-Herve, FIG. 6, [0106] The implantation generates a fragile area or weakened zone 14; [0123], a fragile area 14 obtained as described above are prepared ) defining, with a front face of the donor substrate, the working layer; joining the front face of the donor substrate to the carrier layer, directly or via an intermediate layer, by way of bonding by molecular adhesion ( Auberton-Herve, FIG. 6, [0124], The support 7 and the substrate 13 are brought into contact and assembled by direct bonding (FIG. 6b) ); and separating, along the buried weakened plane ( Auberton-Herve, FIG. 6, [0125] An action is then applied to detach the monocrystalline silicon carbide layer 9 from the silicon carbide source substrate 13, in a similar manner to that described with reference to the second, third and fourth embodiments, so as to form a substrate incorporating a monocrystalline silicon carbide active layer 9 on a polycrystalline silicon carbide support 7 (FIG. 6c) ), to transfer the working layer to the carrier layer. Regarding Claim 4 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 3, on which this claim is dependent, Auberton-Herve further teaches: wherein the front face of the donor substrate ( Auberton-Herve, FIG. 6, [0123], monocrystalline silicon carbide source substrate 13 ) is joined to the carrier layer ( Auberton-Herve, FIG. 6, [0124], The support 7 ) via the intermediate layer ( Auberton-Herve, FIG. 6, [0123], an amorphous material layer 6 ), and the intermediate layer comprises a conductive material or a semiconductor material. Regarding Claim 5 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 1, on which this claim is dependent, Auberton-Herve further teaches: wherein the forming of the active layer ( Auberton-Herve, [0070], In another particular instance of what has been described above, the active layer is an epitaxial layer ) comprises epitaxial growth ( Auberton-Herve, [0034], Also, in the case of transferring a layer of monocrystalline silicon carbide, whether obtained from a massive substrate or from a layer grown epitaxially ) of at least one additional layer of doped monocrystalline silicon carbide on the working layer, the additional layer forming all or part of the active layer. Regarding Claim 6 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 1, on which this claim is dependent, Auberton-Herve further teaches: further comprising producing electronic components ( Auberton-Herve, [0012], for use in optics, electronics or opto-electronics, that is to include an operation of bonding an active layer ) on and/or in the active layer after forming the active layer ( Auberton-Herve, [0066], The layer or stack of layers constitutes the active part of the substrate, i.e., it is this part that will be used, because of its physical properties, to produce structures for use in optics, electronics or opto-electronics) and before removing the temporary substrate. Regarding Claim 7 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 1, on which this claim is dependent, Leow further teaches: wherein: the removing of the temporary substrate ( Leow, [0022], A first SiC layer can act as a buffer layer that blocks tendril formation of SiC into graphite, which facilitates graphite removal from SiC during a subsequent removal process, reducing roughness of the SiC substrate that is formed, and reducing warpage or bow of the SiC substrate when graphite is removed. The reduced warpage or bow provides reduced material (e.g., the warped portions of the SiC substrate) that needs to be removed (e.g., ashed) from the SiC substrate after removal of the deposited SiC from the base substrates ) comprises mechanical detachment ( Leow, [0041], After removing the deposited SiC, the first SiC layer can be removed from the second SiC layer, for example, by O2 ashing, saw cutting, or the like ) by propagating a crack through the temporary substrate following application of a mechanical stress, the crack extending substantially parallel to a plane of the interface between the temporary substrate and the carrier layer ( Leow, [0084], The buffer layer reduces stress/strain mismatch between the base substrate and polycrystalline silicon carbide layer…The reduced stress/strain provides a number of benefits including (1) reduced warpage or bow of the polycrystalline silicon carbide (upon removal from the base substrate to form a polycrystaline silicon carbide substrate), as well as (2) decreased removal of excess silicon carbide from the polycrystalline silicon carbide to obtain a substantially flat polycrystalline silicon carbide substrate in light of the reduced warpage or bow ); Regarding Independent Claim 11 ( Currently Amended ), Leow teaches a composite structure, comprising: a temporary substrate of graphite ( Leow, [0008], graphite substrate ) having a grain size of between 4 microns and 35 microns ( Leow, [0033], In some embodiments, the second SiC layer is polycrystalline SiC having an average grain size of about 1 micron to about 100 microns; [0047], In some embodiments, a graphite has an average grain size of about 0.05 mm or less, such as about 0.04 mm or less, such as about 0.03 mm or less, such as about 0.015 mm or less ), a porosity of between 6 and 17% ( [0046], A graphite base substrate may have a degree of porosity of about 6% to about 15% ), and a coefficient of thermal expansion of between 4×10−6/° C and 5×10−6/° C ( Leow, [0019], a first SiC layer has a coefficient of thermal expansion (CTE) of about 3×10E-6/° C. to about 5×10E-6/° C ); a carrier layer of polycrystalline silicon carbide having a thickness of between 10 microns and 200 microns ( Leow, [0008], The first silicon carbide layer has a thickness of about 1 micron to about 200 microns ), at least arranged on and in contact with a front face of the temporary substrate; Leow fails to disclose: a working layer made of monocrystalline silicon carbide, arranged on the carrier layer; and an active layer on the working layer. However, Auberton-Herve teaches: a working layer made of monocrystalline silicon carbide ( Auberton-Herve, [0052], When the aim is transfer to a monocrystalline support, for example a monocrystalline silicon support, the polishing techniques currently employed by all substrate manufacturers are sufficient; [0102], In the second embodiment of the invention, shown in FIG. 3, a monocrystalline silicon layer 10 is transferred from a monocrystalline source substrate 12; [0109], The monocrystalline silicon layer 10 is therefore transferred onto the support 2 by direct bonding via the amorphous silicon layer 6 ), arranged on the carrier layer; and an active layer ( Auberton-Herve, FIG. 6, monocrystalline silicon carbide active layer 9 ) on the working layer ( Auberton-Herve, FIG. 3, monocrystalline silicon layer 10 ). Leow and Auberton-Herve are both considered to be analogous to the claimed invention because they are forming silicon carbide ( SiC ) layers. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow ( forming polycrystalline SiC substrate having specific porosity and CTE ), to incorporate the teachings of Auberton-Herve ( active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to implement the low cost and high performance fabrication of silicon carbide layers. Doing so would provide specific process parameters ( e.g. buffer layer, direct bonding monocrystalline on polycrystalline ), and therefore low cost and high performance ( e.g. reduced porosity and cracks ) silicon carbide layers can be implemented. Regarding Claim 12 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 11, on which this claim is dependent, Auberton-Herve further teaches: wherein the working layer has a thickness of between 100 nm and 1500 nm (Auberton-Herve, [0088], In each case the polycrystalline silicon layer 5 is advantageously from 500 to a few thousand angstroms thick for use in microelectronics and a few tens of microns thick for photovoltaic applications ). Regarding Claim 13 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 11, on which this claim is dependent, Leow further teaches: wherein the temporary substrate has a thickness of between 100 microns and 2000 microns ( Leow, [0033], In some embodiments, the second SiC layer is polycrystalline SiC having an average grain size of about 1 micron to about 100 microns; [0047], In some embodiments, a graphite has an average grain size of about 0.05 mm or less, such as about 0.04 mm or less, such as about 0.03 mm or less, such as about 0.015 mm or less ). Regarding Claim 15 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 4, on which this claim is dependent, Auberton-Herve further teaches: wherein the intermediate layer ( Auberton-Herve, FIG. 6, [0101], amorphous silicon layer 6; [0123], an amorphous material layer 6; [0011], The amorphous layer may have been deposited on the first or the second layer before bonding the layers together. The first layer may be a made of a monocrystalline material (e.g., silicon carbide) and the second material may be of made of a polycrystalline material (e.g., silicon); [0020], If desired, the amorphous material may be electrically conductive ) comprises tungsten, silicon, or silicon carbide. Regarding Claim 17 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 16, on which this claim is dependent, Auberton-Herve further teaches: wherein the forming of the active layer ( Auberton-Herve, [0070], In another particular instance of what has been described above, the active layer is an epitaxial layer ) comprises epitaxial growth ( Auberton-Herve, [0034], Also, in the case of transferring a layer of monocrystalline silicon carbide, whether obtained from a massive substrate or from a layer grown epitaxially ) of at least one additional layer of doped monocrystalline silicon carbide on the working layer, the additional layer forming all or part of the active layer. Regarding Claim 18 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 17, on which this claim is dependent, Auberton-Herve further teaches: further comprising producing electronic components ( Auberton-Herve, [0012], for use in optics, electronics or opto-electronics, that is to include an operation of bonding an active layer ) on and/or in the active layer after forming the active layer ( Auberton-Herve, [0066], The layer or stack of layers constitutes the active part of the substrate, i.e., it is this part that will be used, because of its physical properties, to produce structures for use in optics, electronics or opto-electronics) and before removing the temporary substrate. Claims 2, 8, 16 are rejected under 35 U.S.C. 103 as being unpatentable over Leow, in view of Auberton-Herve, further in view of Nagasawa ( Pub. No. 20190382918 A1 ), hereinafter Nagasawa. Regarding Claim 2 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 1, on which this claim is dependent, Leow further teaches: wherein depositing of the carrier layer ( Leow, [0008], The first silicon carbide layer has a thickness of about 1 micron to about 200 microns ) is also performed: Leow and Auberton-Herve do not explicitly disclose: on a back face of the temporary substrate to form a second carrier layer; and/or on a peripheral edge of the temporary substrate. However, Nagasawa teaches: on a back face of the temporary substrate to form a second carrier layer ( Nagasawa, Abstract, forming a polycrystalline silicon carbide film 10 on both surfaces of the support substrate ); Leow, Auberton-Herve and Nagasawa are all considered to be analogous to the claimed invention because they are forming silicon carbide ( SiC ) layers. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow ( forming polycrystalline SiC substrate having specific porosity and CTE ) and Auberton-Herve ( active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to incorporate the teachings of Nagasawa ( forming a polycrystalline silicon carbide film 10 on both surfaces of the support substrate ), to implement that on a back face of the temporary substrate to form a second carrier layer. Doing so would provide specific process parameters ( i.e. carrier layer on both sides of the temporary substrate ), and therefore low cost and high performance ( i.e. reduce the stress/strain mismatch from both sides of the temporary substrate ) silicon carbide layers can be implemented. Regarding Claim 8 ( Previously Presented ), Leow, Auberton-Herve and Nagasawa teach the method as claimed in claim 2, on which this claim is dependent, Leow, Auberton-Herve and Nagasawa do not explicitly disclose: the transferring of the working layer comprises transferring a second working layer of monocrystalline silicon carbide to the second carrier layer, directly or via a second intermediate layer, the transfer implementing bonding by molecular adhesion; the forming of the active layer comprises forming a second active layer on the second working layer; and the removing of the temporary substrate results in formation of a second semiconductor structure, the second semiconductor structure including the second active layer, the second working layer and the second carrier layer. However, Leow and Auberton-Herve explicitly disclose: transferring a working layer of monocrystalline silicon carbide ( Auberton-Herve, [0052], [0102], [0109] ) on the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion ( Auberton-Herve, FIG. 6, [0082], [0107] ); forming an active layer ( Auberton-Herve, [0080] ) on the working layer; and removing the temporary substrate to form the semiconductor structure, the semiconductor structure including the active layer, the working layer and the carrier layer ( Leow, [0022] ). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to duplicate ( see MPEP § 2144, VI. B. Duplication of Parts ) above teachings from Leow and Auberton-Herve and to make: the transferring of the working layer comprises transferring a second working layer of monocrystalline silicon carbide to the second carrier layer, directly or via a second intermediate layer, the transfer implementing bonding by molecular adhesion; the forming of the active layer comprises forming a second active layer on the second working layer; and the removing of the temporary substrate results in formation of a second semiconductor structure, the second semiconductor structure including the second active layer, the second working layer and the second carrier layer. , since this is within the skill level of one in the art. Regarding Claim 16 ( Previously Presented ), Leow, Auberton-Herve and Nagasawa teach the method as claimed in claim 2, on which this claim is dependent, Auberton-Herve further teaches: wherein the transferring of the working layer (Auberton-Herve, [0052], [102], [0109] ) comprises: introducing light species ( Auberton-Herve, [0104], atoms of hydrogen ) into a donor substrate ( Auberton-Herve, [0104], A monocrystalline source substrate 12 is implanted with atoms of hydrogen; [0105], Atomic species can be implanted in the material using an ion beam implanter, an implanter operating by immersion in a plasma, etc; FIG. 6, [0123], monocrystalline silicon carbide source substrate 13 ) of monocrystalline silicon carbide ( Auberton-Herve, [0123], In the fifth embodiment of the invention, shown in FIG. 6, a substrate is made including an active layer 9 of monocrystalline silicon carbide ) to form a buried weakened plane ( Auberton-Herve, FIG. 6, [0106] The implantation generates a fragile area or weakened zone 14; [0123], a fragile area 14 obtained as described above are prepared ) defining, with a front face of the donor substrate, the working layer; joining the front face of the donor substrate to the carrier layer, directly or via an intermediate layer, by way of bonding by molecular adhesion ( Auberton-Herve, FIG. 6, [0124], The support 7 and the substrate 13 are brought into contact and assembled by direct bonding (FIG. 6b) ); and separating, along the buried weakened plane ( Auberton-Herve, FIG. 6, [0125] An action is then applied to detach the monocrystalline silicon carbide layer 9 from the silicon carbide source substrate 13, in a similar manner to that described with reference to the second, third and fourth embodiments, so as to form a substrate incorporating a monocrystalline silicon carbide active layer 9 on a polycrystalline silicon carbide support 7 (FIG. 6c) ), to transfer the working layer to the carrier layer. Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Leow, in view of Auberton-Herve, further in view of Mersen ( U: Mersen Graphite, Properties of Popular Mersen Grades ), hereinafter Mersen. Regarding Claim 14 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 11, on which this claim is dependent, Leow further teaches: wherein the temporary substrate ( Leow, [0008], graphite substrate ) has a thermal conductivity. Leow and Auberton-Herve do not explicitly disclose: wherein the temporary substrate has a thermal conductivity of between 70 W.m−1.K−1 and 130 W.m−1.K−1. However, Mersen teaches: wherein the temporary substrate has a thermal conductivity of between 70 W.m−1.K−1 and 130 W.m−1.K−1( Mersen, Thermal Conductivity of graphite is between 77 W.m−1.K−1 and 140 W.m−1.K−1 ). Leow, Auberton-Herve and Mersen are all considered to be analogous to the claimed invention because they are forming silicon carbide ( SiC ) layers on graphite. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow ( forming polycrystalline SiC substrate having specific porosity and CTE ) and Auberton-Herve ( active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to incorporate the teachings of Merson ( Thermal Conductivity of graphite is between 77 W.m−1.K−1 and 140 W.m−1.K−1 ), to implement that wherein the temporary substrate has a thermal conductivity of between 70 W.m−1.K−1 and 130 W.m−1.K−1. Doing so would provide specific process parameters ( i.e. cthermal conductivity range of graphite substrate ), and therefore low cost and high performance silicon carbide layers can be implemented. Claims 9, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Leow, in view of Auberton-Herve, in view of Johnson ( Pub. No. US 20110014774 A1 ), hereinafter Johnson. Regarding Claim 9 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 1, on which this claim is dependent, Leow and Auberton-Herve fail to disclose: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is 5% to 10% wider than a target diameter for the semiconductor structure. However, Johnson teaches: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is 5% to 10% wider than a target diameter for the semiconductor structure ( Johnson, [0053], The diameter of the carrier wafer is usually the same as or slightly larger than the diameter of the device wafer, in order to support the device wafer edge and prevent cracking or chipping of the device wafer edge ). Leow and Auberton-Herve and Johnson are all considered to be analogous to the claimed invention because they are forming silicon / silicon carbide wafers and bonding. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow and Auberton-Herve ( forming polycrystalline SiC substrate having specific porosity and CTE, active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to incorporate the teachings of Johnson ( diameter of the carrier wafer is the same as or slightly larger than the diameter of the device wafer), to implement the temporary substrate is in the form of a circular wafer and has a diameter that is 5% to 10% wider than a target diameter for the semiconductor structure. Doing so would provide specific diameters for carrier wafer and target wafer, and therefore be able to support the device wafer edges and prevent cracks or damages, so the production yield rate can be improved. Regarding Claim 19 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 18, on which this claim is dependent, Leow and Auberton-Herve fail to disclose: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is 5% to 10% wider than a target diameter for the semiconductor structure. However, Johnson teaches: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is 5% to 10% wider than a target diameter for the semiconductor structure ( Johnson, [0053], The diameter of the carrier wafer is usually the same as or slightly larger than the diameter of the device wafer, in order to support the device wafer edge and prevent cracking or chipping of the device wafer edge ). Leow and Auberton-Herve and Johnson are all considered to be analogous to the claimed invention because they are forming silicon / silicon carbide wafers and bonding. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow and Auberton-Herve ( forming polycrystalline SiC substrate having specific porosity and CTE, active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to incorporate the teachings of Johnson ( diameter of the carrier wafer is the same as or slightly larger than the diameter of the device wafer), to implement the temporary substrate is in the form of a circular wafer and has a diameter that is 5% to 10% wider than a target diameter for the semiconductor structure. Doing so would provide specific diameters for carrier wafer and target wafer, and therefore be able to support the device wafer edges and prevent cracks or damages, so the production yield rate can be improved. Claims 10, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Leow, in view of Auberton-Herve, in view of Shin ( Pub. No. US 20120094502 A1 ). Regarding Claim 10 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 1, on which this claim is dependent, Leow and Auberton-Herve fail to disclose: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is slightly smaller than a target diameter for the semiconductor structure, and wherein the depositing of the carrier layer is also performed on a peripheral edge of the temporary substrate, to provide the temporary substrate with the target diameter. However, Shin teaches: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is slightly smaller ( Shin, [0031], The diameter of ceramic cover 512 may also be adjusted to determine the width of the bevel edge film deposition on the upper side of the wafer. For example, a smaller outer diameter of ceramic cover 512 may allow more deposition on the upper outer edge of the bevel ) than a target diameter for the semiconductor structure, and wherein the depositing of the carrier layer is also performed on a peripheral edge of the temporary substrate, to provide the temporary substrate with the target diameter. Leow and Auberton-Herve and Shin are all considered to be analogous to the claimed invention because they are forming silicon / silicon carbide wafers and bonding. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow and Auberton-Herve ( forming polycrystalline SiC substrate having specific porosity and CTE, active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to incorporate the teachings of Shin ( a smaller outer diameter of ceramic cover 512 ), to implement the temporary substrate is in the form of a circular wafer and has a diameter that is slightly smaller than a target diameter for the semiconductor structure. Doing so would provide specific diameters for carrier wafer and target wafer, and therefore be able to achieve specific requirement of the wafer, for instance, allow more deposition on the upper outer edge of the bevel. Regarding Claim 20 ( Previously Presented ), Leow and Auberton-Herve teach the method as claimed in claim 18, on which this claim is dependent, Leow and Auberton-Herve fail to disclose: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is slightly smaller than a target diameter for the semiconductor structure, and wherein the depositing of the carrier layer is also performed on a peripheral edge of the temporary substrate, to provide the temporary substrate with the target diameter. However, Shin teaches: wherein the temporary substrate is in the form of a circular wafer and has a diameter that is slightly smaller ( Shin, [0031], The diameter of ceramic cover 512 may also be adjusted to determine the width of the bevel edge film deposition on the upper side of the wafer. For example, a smaller outer diameter of ceramic cover 512 may allow more deposition on the upper outer edge of the bevel ) than a target diameter for the semiconductor structure, and wherein the depositing of the carrier layer is also performed on a peripheral edge of the temporary substrate, to provide the temporary substrate with the target diameter. Leow and Auberton-Herve and Shin are all considered to be analogous to the claimed invention because they are forming silicon / silicon carbide wafers and bonding. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow and Auberton-Herve ( forming polycrystalline SiC substrate having specific porosity and CTE, active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to incorporate the teachings of Shin ( a smaller outer diameter of ceramic cover 512 ), to implement the temporary substrate is in the form of a circular wafer and has a diameter that is slightly smaller than a target diameter for the semiconductor structure. Doing so would provide specific diameters for carrier wafer and target wafer, and therefore be able to achieve specific requirement of the wafer, for instance, allow more deposition on the upper outer edge of the bevel. Response to Arguments Applicant’s argument for claim 1 ( Currently Amended ): page 11, line 1 from bottom, cited “ At best, it would have been obvious to transfer a layer of monocrystalline silicon carbide onto the polycrystalline second silicon carbide layer 306 of Leow (without removing the graphite substrate 302 or after removing the graphite substrate 302 of Leow). This, however, would not involve "transferring a working layer of monocrystalline silicon carbide on the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion; forming an active layer on the working layer; and after forming the active layer on the working layer, removing the temporary substrate to form the semiconductor structure," as recited in claim 1. ”. Examiner’s response: Please refer to the Claim Rejections - 35 USC § 103 for claim 1 (Currently Amended) in this office action, cited “ removing the temporary substrate to form the semiconductor structure, the semiconductor structure including the active layer, the working layer and the carrier layer ( Leow, [0022], A first SiC layer can act as a buffer layer that blocks tendril formation of SiC into graphite, which facilitates graphite removal from SiC during a subsequent removal process, reducing roughness of the SiC substrate that is formed, and reducing warpage or bow of the SiC substrate when graphite is removed. The reduced warpage or bow provides reduced material (e.g., the warped portions of the SiC substrate) that needs to be removed (e.g., ashed) from the SiC substrate after removal of the deposited SiC from the base substrates ). Leow fails to disclose: transferring a working layer of monocrystalline silicon carbide on the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion; forming an active layer on the working layer; and after forming the active layer on the working layer, However, Auberton-Herve teaches: transferring a working layer of monocrystalline silicon carbide ( Auberton-Herve, [0052], When the aim is transfer to a monocrystalline support, for example a monocrystalline silicon support, the polishing techniques currently employed by all substrate manufacturers are sufficient; [0102], In the second embodiment of the invention, shown in FIG. 3, a monocrystalline silicon layer 10 is transferred from a monocrystalline source substrate 12; [0109], The monocrystalline silicon layer 10 is therefore transferred onto the support 2 by direct bonding via the amorphous silicon layer 6 ) on the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion ( Auberton-Herve, FIG. 6, [0082], The first embodiment of the invention is used for direct bonding of a monocrystalline silicon element onto a polycrystalline silicon support; [0107], The source substrate 12 made fragile in this way is then brought into contact with the polished free surface of the amorphous silicon layer 6 to form a bond by direct bonding (FIG. 3b) ); forming an active layer ( Auberton-Herve, FIG. 6, 9; [0080], The first, second, third and fifth embodiments concern a bonding process which involves transferring an active layer onto a polycrystalline support substrate; [0125], a monocrystalline silicon carbide active layer 9 on a polycrystalline silicon carbide support 7 ) on the working layer; and after forming the active layer ( Auberton-Herve, FIG. 6, monocrystalline silicon carbide active layer 9 ) on the working layer ( Auberton-Herve, FIG. 3, monocrystalline silicon layer 10 ), Leow and Auberton-Herve are both considered to be analogous to the claimed invention because they are forming silicon carbide ( SiC ) layers. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Leow ( forming polycrystalline SiC substrate having specific porosity and CTE ), to incorporate the teachings of Auberton-Herve ( active element transferred onto support, direct bonding monocrystalline onto polycrystalline ), to implement the low cost and high performance fabrication of silicon carbide layers. Doing so would provide specific process parameters ( e.g. buffer layer, direct bonding monocrystalline on polycrystalline ), and therefore low cost and high performance ( e.g. reduced porosity and cracks ) silicon carbide layers can be implemented. ”. Therefore, “ removing the graphite substrate 302 or after removing the graphite substrate 302 of Leow ” is mapped by “ Leow, [0022] ”; “ transferring a working layer of monocrystalline silicon carbide on the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion; forming an active layer on the working layer; ” is mapped by “Auberton-Herve, FIG. 3, monocrystalline silicon layer 10; FIG. 6, monocrystalline silicon carbide active layer 9; [0080] ”. Applicant’s argument for claim 1 ( Currently Amended ): page 12, line 10, cited “ Applicant respectfully submits that the Examiner could correlate the monocrystalline silicon carbide layer of Auberton-Herve to either the working layer or the active layer, but not both, as claim 1 expressly recites "forming an active layer on the working layer." ”. Examiner’s response: as explained in 4., the Claim Rejections - 35 USC § 103 for claim 1 (Currently Amended) in this office action, cited “ … after forming the active layer ( Auberton-Herve, FIG. 6, monocrystalline silicon carbide active layer 9 ) on the working layer ( Auberton-Herve, FIG. 3, monocrystalline silicon layer 10 ), … ”, Auberton-Herve teaches “ FIG. 6, monocrystalline silicon carbide active layer 9 ” and “ FIG. 3, monocrystalline silicon layer 10 ”, therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine “ FIG. 6, monocrystalline silicon carbide active layer 9 ” and “ FIG. 3, monocrystalline silicon layer 10 ”, to create “ forming an active layer ( monocrystalline silicon carbide active layer 9 ) on the working layer ( monocrystalline silicon layer 10 ) ”, because it is just one possible example based on the teaching from Auberton-Herve. Furthermore, “ "[t]he combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results." Id. at 415-16, 82 USPQ2d at 1395 ”, see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398, 82 USPQ2d 1385 (2007). Beside, “ [I]t is not necessary that the inventions of the references be physically combinable to render obvious the invention under review. ” In re Sneed, 710 F.2d 1544, 1550, 218 USPQ 385, 389 (Fed. Cir. 1983). Applicant’s argument for claim 11 ( Currently Amended ): page 13, line 12 from bottom, cited “ At best, it would have been obvious to provide the active layer of monocrystalline silicon carbide of Auberton-Herve on the second layer of polycrystalline silicon carbide 306 of Leow (either after removing the base substrate 302 of Leow or without removing the base substrate 302 of Leow). This, however, would not result in a composite structure according to claim 11. ”. Examiner’s response: please refer to the Claim Rejections - 35 USC § 103 for claim 11 (Currently Amended) in this office action, cited “ … and an active layer ( Auberton-Herve, FIG. 6, monocrystalline silicon carbide active layer 9 ) on the working layer ( Auberton-Herve, FIG. 3, monocrystalline silicon layer 10 ). ”. Therefore, based on the same reason explained in 5., “ a composite structure according to claim 11 ” is mapped by “ FIG. 6, monocrystalline silicon carbide active layer 9 ” and “ FIG. 3, monocrystalline silicon layer 10 ” from the teaching of Auberton-Herve. Applicant’s argument for claims 2, 8, 16: page 14, line 15, cited “ Nagasawa, however, does not appear to include any teaching or suggestion that would have motivated a person of ordinary skill in the art to modify the method of Leow, as modified in view of Auberton-Herve, in any way that would arrive at a method according to claim 1. ”. Examiner’s response: please refer to the Claim Rejections - 35 USC § 103 for claims 2, 8, 16 in this office action, for instance claim 2, cited “ Leow, Auberton-Herve and Nagasawa are all considered to be analogous to the claimed invention because they are forming silicon carbide ( SiC ) layers. … Doing so would provide specific process parameters ( i.e. carrier layer on both sides of the temporary substrate ), and therefore low cost and high performance ( i.e. reduce the stress/strain mismatch from both sides of the temporary substrate ) silicon carbide layers can be implemented. ” which is the reason and motivation for 103 rejection. Applicant’s argument for claim 14: page 14, line 15, cited “ Mersen, however, does not appear to include any teaching or suggestion that would have motivated a person of ordinary skill in the art to modify the structure of Leow, as modified in view of Auberton-Herve, in any way that would arrive at a structure according to claim 11. ”. Examiner’s response: please refer to the Claim Rejections - 35 USC § 103 for claim 14, “ Leow, Auberton-Herve and Mersen are all considered to be analogous to the claimed invention because they are forming silicon carbide ( SiC ) layers on graphite. … Doing so would provide specific process parameters ( i.e. cthermal conductivity range of graphite substrate ), and therefore low cost and high performance silicon carbide layers can be implemented. ”, which is the reason and motivation for 103 rejection. Applicant’s argument for claims 9, 19: page 16, line 1, cited “ Johnson, however, does not appear to include any teaching or suggestion that would have motivated a person of ordinary skill in the art to modify the method of Leow, as modified in view of Auberton-Herve, in any way that would arrive at a method according to claim 1. ”. Examiner’s response: please refer to the Claim Rejections - 35 USC § 103 for claims 9 and 19, for instance, claim 9, cited “ Leow and Auberton-Herve and Johnson are all considered to be analogous to the claimed invention because they are forming silicon / silicon carbide wafers and bonding. … Doing so would provide specific diameters for carrier wafer and target wafer, and therefore be able to support the device wafer edges and prevent cracks or damages, so the production yield rate can be improved. ”, which is the reason and motivation for 103 rejection. Applicant’s argument for claims 10, 20: page 16, line 1, cited “ Shin, however, does not appear to include any teaching or suggestion that would have motivated a person of ordinary skill in the art to modify the method of Leow, as modified in view of Auberton-Herve, in any way that would arrive at a method according to claim 1. ”. Examiner’s response: please refer to the Claim Rejections - 35 USC § 103 for claims 10, 20, for instance claim 10, cited, “ Leow and Auberton-Herve and Shin are all considered to be analogous to the claimed invention because they are forming silicon / silicon carbide wafers and bonding. … Doing so would provide specific diameters for carrier wafer and target wafer, and therefore be able to achieve specific requirement of the wafer, for instance, allow more deposition on the upper outer edge of the bevel. ”, which is the reason and motivation for 103 rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Da-Wei Lee whose telephone number is 703-756-1792. The examiner can normally be reached M -̶ F 8:00 am -̶ 6:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DA-WEI LEE/Examiner, Art Unit 2817 /MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
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Prosecution Timeline

Sep 11, 2023
Application Filed
Nov 18, 2025
Non-Final Rejection mailed — §103
Feb 17, 2026
Response Filed
May 14, 2026
Final Rejection mailed — §103
Jun 16, 2026
Interview Requested
Jun 24, 2026
Applicant Interview (Telephonic)
Jun 24, 2026
Examiner Interview Summary
Jul 01, 2026
Response after Non-Final Action

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2-3
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94%
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3y 6m (~7m remaining)
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