DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/13/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: DISPLAY DEVICE TRANSISTORS HAVING DIFFERENT CHANNEL LENGTHS.
Preliminary Amendment
Applicant's 12/13/2023 Preliminary Amendment to: 1. Amend the Abstract. 2. Amend the instant Specification. 3. Amend the Claims is acknowledged.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4, 5, 7-11; and 2 are rejected under 35 U.S.C. 103 as being unpatentable over MOU et al (US 2021/0376026 A1, hereafter Mou).
Re claim 1, Mou discloses in FIG. 7 (with references to FIGS. 1A-1C) a display device comprising:
a substrate layer (100; [0142]);
a thin-film transistor layer (comprising driving TFTs 111/121/131; [0054]; [0074] and [0146]) provided on the substrate layer (100); and
a light-emitting element layer (220 for each of 110/120/130; [0142]) provided on the thin-film transistor layer (comprising driving TFTs 111/121/131),
the light-emitting element layer (220 for each 110/120/130) including a light-emitting element (220; [0142]) provided in a subpixel (each 120/130/130; [0142]) constituting a display region (area of 100),
the thin-film transistor layer (comprising driving TFTs 111/121/131) including a plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130; [0142] and [0153]-[0155]) provided in the subpixel (each 120/130/130),
the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) being configured to control an operation ([0142]) of the light-emitting element (220), to display an image ([0139] and [0142]) in the display region (area of 100) by light emission ([0139] and [0142]) from the light-emitting element (220),
wherein the subpixel (any of upper-center 130 or 110 or lower-center 130 or 110; see inserted figure below) located in a middle (center; see inserted figure below) of the display region (area of 100) is a first subpixel (1st SP; see inserted figure below), and the subpixel (any of upper-left 110 or 120 or lower-left 110 or 120 or upper-right 120 or 130 or lower-right 120 or 130; see inserted figure below) located at an outer edge (perimeter) of the display region (area of 100) is a second subpixel (2nd SP; see inserted figure below).
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For the record, the inserted figure (annotated FIG. 7 of Mou) depicts a display region (area of 100), middle of the display region, first subpixels (1st SP), and second subpixels (2nd SP), where the second subpixels (2nd SP) comprise third (3rd) and (4th) subpixels.
Mou does not explicitly disclose wherein a channel length of at least one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the second subpixel (2nd SP) is shorter than a channel length of one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the first subpixel (1st SP) and having an identical function.
However,
Mou discloses the first driving transistor (111) and the second driving transistor (121), where the channel widths and channel lengths of the first driving transistor and the second driving transistor are all different ([0054]). Also, a channel width-length ratio of a third driving transistor (131) is less than ([0146]) the channel width-length ratio of the first driving transistor (111).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a channel length of at least one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the second subpixel is shorter than a channel length of one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the first subpixel and having an identical function (i.e. driving transistor), a phenomenon of insufficient brightness of blue light is avoided, so that the white balance color coordinate of the white light at the highest gray level can be avoided from deviating from the design value ([0056]-[0058]).
Re claim 2, Mou discloses in FIG. 7 (with references to FIGS. 1A-1C) a display device comprising:
a substrate layer (100; [0142]);
a thin-film transistor layer (comprising driving TFTs 111/121/131; [0054]; [0074] and [0146]) provided on the substrate layer (100); and
a light-emitting element layer (220 for each of 110/120/130; [0142]) provided on the thin-film transistor layer (comprising driving TFTs 111/121/131),
the light-emitting element layer (220 for each 110/120/130) including a light-emitting element (220; [0142]) provided in a subpixel (each 120/130/130; [0142]) constituting a display region (area of 100),
the thin-film transistor layer (comprising driving TFTs 111/121/131) including a plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130; [0142] and [0153]-[0155]) provided in the subpixel (each 120/130/130),
the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) being configured to control an operation ([0142]) of the light-emitting element (220), to display an image ([0139] and [0142]) in the display region (area of 100) by light emission ([0139] and [0142]) from the light-emitting element (220),
wherein the subpixel (any of upper-center 130 or 110 or lower-center 130 or 110; see inserted figure above) located in a middle (center; see inserted figure above) of the display region (area of 100) is a first subpixel (1st SP; see inserted figure above), and the subpixel (any of upper-left 110 or 120 or lower-left 110 or 120 or upper-right 120 or 130 or lower-right 120 or 130; see inserted figure above) located at an outer edge (perimeter) of the display region (area of 100) is a second subpixel (2nd SP; see inserted figure above).
Mou does not explicitly disclose wherein a channel width of at least one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the second subpixel (2nd SP) is wider than a channel width of one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the first subpixel (1st SP) and having an identical function.
However,
Mou discloses the first driving transistor (111) and the second driving transistor (121), where the channel widths and channel lengths of the first driving transistor and the second driving transistor are all different ([0054]). Also, a channel width-length ratio of a third driving transistor (131) is less than ([0146]) the channel width-length ratio of the first driving transistor (111).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a channel width of at least one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the second subpixel is wider than a channel width of one of the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) provided in the first subpixel and having an identical function (i.e. driving transistor), wherein a phenomenon of insufficient brightness of blue light is avoided, so that the white balance color coordinate of the white light at the highest gray level can be avoided from deviating from the design value ([0056]-[0058]).
Re claim 4, Mou discloses the display device according to claim 1, wherein the second subpixel (2nd SP) located at the outer edge but a corner (perimeter) of the display region (area of 100) is a third subpixel (3rd SP; see inserted figure above), and the second subpixel (2nd SP) located at the corner at the outer edge (upper left) of the display region (area of 100) is a fourth subpixel (4th SP; see inserted figure above), and wherein a channel length of one (111) of the plurality of thin-film transistors (T1-T7 of 221 for each 110) provided in the fourth subpixel (4th SP) is shorter than (see claim 1) a channel length of one (121) of the plurality of thin-film transistors (T1-T7 of 221 for each 120) provided in the third subpixel (3rd SP) and having an identical function (i.e. driving transistor).
Re claim 5, Mou discloses the display device according to claim 1, wherein the second subpixel (2nd SP) located at the outer edge but a corner (perimeter) of the display region (area of 100) is a third subpixel (3rd SP; see inserted figure above), and the second subpixel (2nd SP) located at the corner at the outer edge (upper left) of the display region (area of 100) is a fourth subpixel (4th SP; see inserted figure above), and wherein a channel width of one (111) of the plurality of thin-film transistors (T1-T7 of 221 for each 110) provided in the fourth subpixel (4th SP) is wider than (see claim 2) a channel width of one (121) of the plurality of thin-film transistors (T1-T7 of 221 for each 120) provided in the third subpixel (3rd SP) and having an identical function (i.e. driving transistor).
Re claim 7, Mou discloses the display device according to claim 1.
But, fails to explicitly disclose wherein channel lengths of the plurality of thin-film transistors around an outer periphery of the display region decrease along with approach from a middle of the display region to the outer edge of the display region.
However,
Mou discloses the first driving transistor (111) and the second driving transistor (121), where the channel widths and channel lengths of the first driving transistor and the second driving transistor are all different ([0054]). Also, a channel width-length ratio of a third driving transistor (131) is less than ([0146]) the channel width-length ratio of the first driving transistor (111).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide channel lengths of the plurality of thin-film transistors around an outer periphery of the display region decreasing along with approach from a middle of the display region to the outer edge of the display region, wherein a phenomenon of insufficient brightness of blue light is avoided, so that the white balance color coordinate of the white light at the highest gray level can be avoided from deviating from the design value ([0056]-[0058]).
Re claim 8, Mou discloses the display device according to claim 1.
But, fails to explicitly disclose channel widths of the plurality of thin-film transistors around an outer periphery of the display region increase along with approach from a middle of the display region to the outer edge of the display region.
However,
Mou discloses the first driving transistor (111) and the second driving transistor (121), where the channel widths and channel lengths of the first driving transistor and the second driving transistor are all different ([0054]). Also, a channel width-length ratio of a third driving transistor (131) is less than ([0146]) the channel width-length ratio of the first driving transistor (111).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide channel widths of the plurality of thin-film transistors around an outer periphery of the display region increase along with approach from a middle of the display region to the outer edge of the display region, wherein a phenomenon of insufficient brightness of blue light is avoided, so that the white balance color coordinate of the white light at the highest gray level can be avoided from deviating from the design value ([0056]-[0058]).
Re claim 9, Mou discloses the display device according to claim 1.
But, does not explicitly disclose wherein the plurality of thin-film transistors include a first thin-film transistor having a semiconductor layer composed of polysilicon, and a second thin-film transistor having a semiconductor layer composed of an oxide semiconductor.
However, Mou discloses wherein the plurality of thin-film transistors include polysilicon or oxide semiconductor thin film transistors ([0166]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the plurality of thin-film transistors to include a first thin-film transistor having a semiconductor layer composed of polysilicon, and a second thin-film transistor having a semiconductor layer composed of an oxide semiconductor, as substitutional equivalents (MPEP § 2144.06) for providing switching devices with the same characteristics ([0166]).
Re claim 10, Mou discloses the display device according to claim 1, wherein the at least one thin-film transistor (111/121/131) has a semiconductor layer (active layer; [0006]) composed of an oxide semiconductor ([0166]).
Re claim 11, Mou discloses the display device according to claim 1, wherein the light-emitting element (220) is an organic electroluminescence element ([0142]).
Claims 3; and 6 are rejected under 35 U.S.C. 103 as being unpatentable over MOU et al (US 2021/0376026 A1, hereafter Mou) in view of Nakamura et al (US 2017/0069664 A1, hereafter Nakamura).
Re claim 3, Mou discloses in FIG. 7 (with references to FIGS. 1A-1C) a display device comprising:
a substrate layer (100; [0142]);
a thin-film transistor layer (comprising driving TFTs 111/121/131; [0054]; [0074] and [0146]) provided on the substrate layer (100); and
a light-emitting element layer (220 for each of 110/120/130; [0142]) provided on the thin-film transistor layer (comprising driving TFTs 111/121/131),
the light-emitting element layer (220 for each 110/120/130) including a light-emitting element (220; [0142]) provided in a subpixel (each 120/130/130; [0142]) constituting a display region (area of 100),
the thin-film transistor layer (comprising driving TFTs 111/121/131) including a plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130; [0142] and [0153]-[0155]) provided in the subpixel (each 120/130/130),
the plurality of thin-film transistors (T1-T7 of 221 for each 110/120/130) being configured to control an operation ([0142]) of the light-emitting element (220), to display an image ([0139] and [0142]) in the display region (area of 100) by light emission ([0139] and [0142]) from the light-emitting element (220),
wherein the subpixel (any of upper-center 130 or 110 or lower-center 130 or 110; see inserted figure above) located in a middle (center; see inserted figure above) of the display region (area of 100) is a first subpixel (1st SP; see inserted figure above), and the subpixel (any of upper-left 110 or 120 or lower-left 110 or 120 or upper-right 120 or 130 or lower-right 120 or 130; see inserted figure above) located at an outer edge (perimeter) of the display region (area of 100) is a second subpixel (2nd SP; see inserted figure above).
Mou fails to disclose wherein at least one of the plurality of thin-film transistors provided in the second subpixel is a thin-film transistor of multi-gate structure, and wherein one of the plurality of thin-film transistors provided in the first subpixel and having a function identical to that of the thin-film transistor of multi-gate structure in the second subpixel is a thin-film transistor of single-gate structure.
However,
Nakamura discloses in FIGS. 1A-1C and 17 a display device (100) comprising a first driving transistor (70b; [0254]) can be a single-gate transistor ([0254]) and a second driving transistor (70c; [0254]) can be a dual-gate transistor ([0254]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention modify the structure of Mou by providing the dual-gate transistors of Nakamura, wherein at least one of the plurality of thin-film transistors provided in the second subpixel is a thin-film transistor of multi-gate structure, and wherein one of the plurality of thin-film transistors provided in the first subpixel and having a function identical to that of the thin-film transistor of multi-gate structure in the second subpixel is a thin-film transistor of single-gate structure, where a dual-gate transistor can be used as a transistor in which a higher current desirably flows, while single-gate transistors are used as the other transistors. For example, a W/L ratio between the channel length (L) and the channel width (W) of a transistor in which a higher current desirably flows can be made larger than the W/L ratio of the other transistors (Nakamura; [0156] and [0254]).
Re claim 6, Mou discloses the display device according to claim 1, wherein the second subpixel located at the outer edge but a corner of the display region is a third subpixel, and the second subpixel located at the corner at the outer edge of the display region is a fourth subpixel (see claim 4).
Mou fails to disclose wherein one of the plurality of thin-film transistors provided in the fourth subpixel is a thin-film transistor of multi-gate structure, and wherein one of the plurality of thin-film transistors provided in the third subpixel and having a function identical to that of the thin-film transistor of multi-gate structure in the fourth subpixel is a thin-film transistor of single-gate structure.
However, Nakamura would renders these limitations obvious by disclosing single-gate first driving transistors and dual-gate second driving transistors as discussed for claim 3.
Conclusion
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/ERIC W JONES/Primary Examiner, Art Unit 2892