Prosecution Insights
Last updated: August 18, 2026
Application No. 18/575,942

SEMICONDUCTOR DEVICE

Final Rejection §103
Filed
Jan 02, 2024
Priority
Jul 21, 2021 — JP 2021-120959 +4 more
Examiner
TRAN, DZUNG
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Energy Laboratory Co., Ltd.
OA Round
2 (Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
880 granted / 1054 resolved
+15.5% vs TC avg
Moderate +6% lift
Without
With
+5.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
51 currently pending
Career history
1130
Total Applications
across all art units

Statute-Specific Performance

§101
5.2%
-34.8% vs TC avg
§103
66.1%
+26.1% vs TC avg
§102
15.2%
-24.8% vs TC avg
§112
9.8%
-30.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1054 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Status of the Claims Applicant’s remarks/amendments of claims 1, 3-11, 15 and 16 in the reply filed on May 21st, 2026, are acknowledged. Claims 1, 3-4, 6-7 and 9 have been amended. Claims 10-19 have been added. Claims 1-19 are pending. Action on merits of claims 1-19 as follows. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 1-19 are rejected under 35 U.S.C. 103 as being unpatentable over Yamazaki (US 2020/0212185, hereinafter as Yama ‘185) in view of Theiss (US 2011/0253998, hereinafter as Thei ‘998) and further in view of Asami (US 2018/0019343, hereinafter as Asam ‘343). Regarding Claim 1, Yama ‘185 teaches a semiconductor device comprising: an oxide (Fig. 5B, (230b); [0179]); a first conductor (Fig. 25, (242a); [0180]), a second conductor (Fig. 25, (242b); [0180]), and a first insulator (272/273; [0173]) over the oxide (230b); a second insulator (Fig. 25, (280); [0132]) over the first conductor and the second conductor; a third insulator (250; [0179]) over the first insulator (273); a third conductor (260; [0180]) over the third insulator (250); and a fourth insulator (282; [0132]) over the second insulator (280) and the third conductor (260), wherein the fourth insulator (282) is in contact with a top surface of the second insulator (280) and a top surface of the third conductor (260), wherein the first insulator (272/273) is in contact with a side surface of the oxide (230b), a first side surface of the first conductor (242a), a first side surface of the second conductor (242b), and a side surface of the second insulator (280), wherein the oxide (230b) comprises indium, gallium, aluminum, and zinc (see para. [0192]), wherein each of the first insulator (272; [0208]) and the fourth insulator (282; [0374]) comprises aluminum and oxygen, wherein the fourth insulator (282) comprises an amorphous structure (e.g. amorphous aluminum oxide, see para. [0121]-[0122]). Thus, Yama ‘185 is shown to teach all the features of the claim with the exception of explicitly the limitations: “the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide”. However, Thei ‘998 teaches the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide (see Fig. 3B; [0029]). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Yama ‘185 by having the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide for the purpose of enhancing the stability of the semiconductor devices (see para. [0016]) as suggested by Thei ‘998. Thus, Yama ‘185 and Thei ‘998 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a first conductor, a second conductor each in contact with a top surface of the oxide”. Asam ‘343 teaches a first conductor (Fig. 1B, (13); [0106]), a second conductor (Fig. 1B, (140); [0106]) each in contact with a top surface of the oxide (122; [0106]). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Yama ‘185 and Thei ‘998 by having a first conductor, a second conductor each in contact with a top surface of the oxide in order to sufficiently release the heat generated in the oxide semiconductor layer (see para. [0107]) as suggested by Asam ‘343. Regarding Claim 4, Yama ‘185 teaches a semiconductor device comprising: an oxide (Fig. 5B, (230b); [0179]); a first conductor (Fig. 25, (242a); [0180]), a second conductor (Fig. 25, (242b); [0180]), and a first insulator (272/273; [0173]) over the oxide (230b); a second insulator (Fig. 25, (280); [0132]) over the first conductor and the second conductor; a third insulator (250; [0179]) over the first insulator (273); a third conductor (260; [0180]) over the third insulator (250); and a fourth insulator (282; [0132]) over the second insulator (280) and the third conductor (260); and a fourth conductor (205; [0179]) and a fifth insulator (214; [0132]) each under the oxide (230b), wherein the fourth insulator (282) is in contact with a top surface of the second insulator (280) and a top surface of the third conductor (260), wherein the first insulator (272/273) is in contact with a top surface of the oxide (230b), a first side surface of the first conductor (242a), a first side surface of the second conductor (242b), and a side surface of the second insulator (280), wherein the fourth conductor (205) comprises a region overlapping with the third conductor (260) with the oxide (230b) therebetween, wherein the fifth insulator (224; [0179]) is between the fourth conductor (205) and the oxide (230b), wherein the oxide (230b) comprises indium, gallium, aluminum, and zinc (see para. [0192]), wherein each of the first insulator (272; [0208]) and the fourth insulator (282; [0374]) comprises aluminum and oxygen, wherein the fourth insulator (282) comprises an amorphous structure (e.g. amorphous aluminum oxide, see para. [0121]-[0122]). Thus, Yama ‘185 is shown to teach all the features of the claim with the exception of explicitly the limitations: “the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide”. However, Thei ‘998 teaches the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide (see Fig. 3B; [0029]). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Yama ‘185 by having the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide for the purpose of enhancing the stability of the semiconductor devices (see para. [0016]) as suggested by Thei ‘998. Thus, Yama ‘185 and Thei ‘998 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a first conductor, a second conductor each in contact with a top surface of the oxide”. Asam ‘343 teaches a first conductor (Fig. 1B, (13); [0106]), a second conductor (Fig. 1B, (140); [0106]) each in contact with a top surface of the oxide (122; [0106]). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Yama ‘185 and Thei ‘998 by having a first conductor, a second conductor each in contact with a top surface of the oxide in order to sufficiently release the heat generated in the oxide semiconductor layer (see para. [0107]) as suggested by Asam ‘343. Regarding Claim 7, Yama ‘185 teaches a semiconductor device comprising: an oxide (Fig. 5B, (230b); [0179]); a first conductor (Fig. 25, (242a); [0180]), a second conductor (Fig. 25, (242b); [0180]), and a first insulator (272/273; [0173]) over the oxide (230b); a second insulator (Fig. 25, (280); [0132]) over the first conductor and the second conductor; a third insulator (250; [0179]) over the first insulator (273); a third conductor (260; [0180]) over the third insulator (250); and a fourth insulator (282; [0132]) over the second insulator (280) and the third conductor (260); wherein the first insulator (272/273) is in contact with a side surface of the oxide (230b), a first side surface of the first conductor (242a), a first side surface of the second conductor (242b), and a side surface of the second insulator (280), wherein the oxide comprises a first metal oxide layer (230a) and a second metal oxide layer (230b) over the first metal oxide layer, wherein the first metal oxide layer comprises at least one of indium, an element Mb, and zinc (see para. [0197]), wherein the second metal oxide layer comprises aluminum and at least one of indium, the element Mb, and zinc, wherein the element Mb is one or more selected from gallium, yttrium, and tin (see para. [0192]), wherein each of the first insulator (272; [0208]) and the fourth insulator (282; [0374]) comprises aluminum and oxygen, wherein the fourth insulator (282) comprises an amorphous structure (e.g. amorphous aluminum oxide, see para. [0121]-[0122]). Thus, Yama ‘185 is shown to teach all the features of the claim with the exception of explicitly the limitations: “the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide”. However, Thei ‘998 teaches the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide (see Fig. 3B; [0029]). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Yama ‘185 by having the oxide has a concentration gradient in which an aluminum concentration increases toward the top surface of the oxide from a bottom surface of the oxide for the purpose of enhancing the stability of the semiconductor devices (see para. [0016]) as suggested by Thei ‘998. Thus, Yama ‘185 and Thei ‘998 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a first conductor, a second conductor each in contact with a top surface of the oxide”. Asam ‘343 teaches a first conductor (Fig. 1B, (13); [0106]), a second conductor (Fig. 1B, (140); [0106]) each in contact with a top surface of the oxide (122; [0106]). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Yama ‘185 and Thei ‘998 by having a first conductor, a second conductor each in contact with a top surface of the oxide in order to sufficiently release the heat generated in the oxide semiconductor layer (see para. [0107]) as suggested by Asam ‘343. PNG media_image1.png 358 498 media_image1.png Greyscale Figs. 5B and 5D (Yama ‘185) Regarding Claims 2, 5 and 8, Yama ‘185 teaches the fourth insulator (282; [0132]) comprises a first stack, wherein the first stack comprises a first layer (282) and a second layer (283) over the first layer, Yama ‘185, Thei ‘998 and Asam ‘343 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the first layer comprises a region with a thickness of greater than or equal to 3.0 nm and less than or equal to 8.0 nm”. However, it has been held to be within the general skill of a worker in the art to select the first layer comprises a region with a thickness of greater than or equal to 3.0 nm and less than or equal to 8.0 nm on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. A person of ordinary skills in the art is motivated to select the first layer comprises a region with a thickness of greater than or equal to 3.0 nm and less than or equal to 8.0 nm in order to improve the performance of the semiconductor devices. Regarding Claims 3, 6 and 9, Yama ‘185 teaches each of the first conductor and the second conductor comprises a second stack (see Fig. 30B; [0554] and [0559]), wherein the second stack comprises a third layer and a fourth layer over the third layer, wherein each of the third layer and the fourth layer comprises tantalum and nitrogen (e.g. tantalum nitride; [0227]). Yama ‘185, Thei ‘998 and Asam ‘343 are shown to teach all the features of the claim with the exception of explicitly the limitations: “an atomic ratio of nitrogen to tantalum in the third layer is higher than an atomic ratio of nitrogen to tantalum in the fourth layer”. However, it has been held to be within the general skill of a worker in the art to select an atomic ratio of nitrogen to tantalum in the third layer is higher than an atomic ratio of nitrogen to tantalum in the fourth layer on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to select an atomic ratio of nitrogen to tantalum in the third layer is higher than an atomic ratio of nitrogen to tantalum in the fourth layer in order to improve the performance of the semiconductor devices. Regarding Claims 10-12, Yama ‘185, Thei ‘998 and Asam ‘343 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the third layer comprises a region with a thickness of greater than or equal to 1.0 nm and less than or equal to 3.0 nm”. However, it has been held to be within the general skill of a worker in the art to select the third layer comprises a region with a thickness of greater than or equal to 1.0 nm and less than or equal to 3.0 nm on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. A person of ordinary skills in the art is motivated to select the third layer comprises a region with a thickness of greater than or equal to 1.0 nm and less than or equal to 3.0 nm in order to improve the performance of the semiconductor devices. Regarding Claims 13-15, Asam ‘343 teaches a stress test (see para. [0306]). Yama ‘185, Thei ‘998 and Asam ‘343 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the first conductor and the second conductor comprises a compressive stress”. However, it has been held to be within the general skill of a worker in the art to have the first conductor and the second conductor comprises a compressive stress on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to have the first conductor and the second conductor comprises a compressive stress in order to improve the performance of the semiconductor devices. Regarding Claims 16 and 18, Yama ‘185 teaches a fifth insulator (272_left side; [0173]) between the first conductor (242a; [0179]) and the second insulator (280; [0132]); a sixth insulator (272_right side; [0173]) between the second conductor (242b; [0179]) and the second insulator (280; [0132]); a seventh insulator (273; [0173]) between the second insulator (280) and the fifth insulator (272_left side; [0173]), the seventh insulator (273; [0173]) between the second insulator (280) and the sixth insulator (272_right side; [0173]); and wherein the seventh insulator (273; [0173]) is in contact with a side surface of the fifth insulator (272_left side; [0173]), a side surface of the sixth insulator (272_right side; [0173]), Asam ‘343 teaches the seventh insulator (172; [00274]) is in contact a second side surface of the first conductor (130), a second side surface of the second conductor (140), and a side surface of the oxide (122) (see Fig. 1B). Regarding Claim 17, Yama ‘185 teaches a sixth insulator (272_right side; [0173]) between the first conductor (242a; [0179]) and the second insulator (280); a seventh insulator (273; [0173]) between the second conductor (242b; [0179]) and the second insulator (280); and a eighth insulator (283; [0084]) is in contact with a top surface of the fourth insulator (282). Asam ‘343 teaches an eighth insulator (170; [0108) between the second insulator (175; [0116]) and the sixth insulator (172; [0274), the eighth insulator (170) between the second insulator and (175) the seventh insulator (172) (see Fig. 16B), wherein the eighth insulator (170) is in contact with a side surface of the sixth insulator, a side surface of the seventh insulator, a second side surface of the first conductor, a second side surface of the second conductor (see Fig. 16B). Regarding Claim 19, Yama ‘185 teaches the second metal oxide layer (230b) is in contact with a top surface and a side surface of the first metal oxide layer (230a). Further, it has been held to be within the general skill of a worker in the art to have the second metal oxide layer is in contact with a side surface of the first metal oxide layer on the basis of it suitability for the intended use as a matter of obvious design choice. A person of ordinary skills in the art is motivated to have the second metal oxide layer is in contact with a side surface of the first metal oxide layer in order to improve the performance of the semiconductor devices. Response to Arguments Applicant’s arguments with respect to claims 1-19, filed on May 21st, 2026, have been considered but are moot in view of the new ground of rejection. Interviews After Final Applicants note that an interview after a final rejection is permitted in order to place the application in condition for allowance or to resolve issues prior to appeal. However, prior to the interview, the intended purpose and content of the interview should be presented briefly, preferably in writing. Upon review of the agenda, the Examiner may grant the interview if the examiner is convinced that disposal or clarification for appeal may be accomplished with only nominal further consideration. Interviews merely to restate arguments of record or to discuss new limitations will be denied. See MPEP § 714.13 Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Examiner Dzung Tran whose telephone number is (571) 270-3911. The examiner can normally be reached on M-F 8 AM-5PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Supervisor Sue Purvis can be reached on 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DZUNG TRAN/ Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Jan 02, 2024
Application Filed
Feb 23, 2026
Non-Final Rejection mailed — §103
May 21, 2026
Response Filed
Jul 27, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
89%
With Interview (+5.5%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1054 resolved cases by this examiner. Grant probability derived from career allowance rate.

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