Prosecution Insights
Last updated: August 17, 2026
Application No. 18/581,290

EUV SENSITIVE METAL OXIDE MATERIAL AS UNDERLAYER FOR THIN CAR TO IMPROVE PATTERN TRANSFER

Non-Final OA §102§103
Filed
Feb 19, 2024
Priority
Mar 20, 2023 — provisional 63/453,410 +1 more
Examiner
SULLIVAN, CALEEN O
Art Unit
Tech Center
Assignee
Applied Materials Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
1010 granted / 1140 resolved
+28.6% vs TC avg
Moderate +11% lift
Without
With
+11.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
11 currently pending
Career history
1147
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
60.3%
+20.3% vs TC avg
§102
19.2%
-20.8% vs TC avg
§112
5.7%
-34.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1140 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4 and 9-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Inoue (US 2022/0050379). Inoue discloses a resist underlayer material and process using the material. Inoue discloses the material for forming an underlayer film of the first embodiment is a material for forming a “resist underlayer film” to be disposed between a resist layer and a substrate (including a substrate having an uneven structure) in a step of producing a semiconductor device. (Para, 0190). Inoue discloses an intermediate layer such as a hard mask layer or an anti-reflective layer may be disposed between the resist underlayer film and the resist layer. (Para, 0190). Inoue discloses a resist underlayer film can be produced (formed) by using a material for forming an underlayer film. (Para, 0362). Inoue discloses the method of producing the resist underlayer film includes a step of forming a coating film containing the material for forming an underlayer film on the substrate (hereinafter, also referred to as a “coating film forming step”). (Para, 0363). Inoue discloses the method may further perform a step of heating the coating film (hereinafter, also referred to as a “heating step”) as necessary. (Para, 0364). Inoue discloses the method for forming the coating film (coating method) is not particularly limited and includes using a method such as spin coating, solution cast coating, roll coating, slit coating, or ink jet coating. (Para, 0377). Inoue discloses the film thickness of the resist underlayer film formed from the bottom of the recess portion on the substrate to the atmospheric surface is not particularly limited with the average value Hav described later is preferably 5 to 2000 nm, more preferably 5 to 1000 nm, and still more preferably 5 to 500 nm. (Para, 0378). This disclosure teaches the limitation of claim 11. Inoue also discloses in the heating step, the coating film formed in the coating film forming step is heated with the temperature of heating the coating film is preferably 100° C. to 400° C., more preferably 150° C. to 300° C., and still more preferably 180° C. to 250° C. (Para, 0380). Inoue discloses the heating time is preferably 5 seconds to 60 minutes, more preferably 10 seconds to 10 minutes, and still more preferably 30 seconds to 3 minutes and the coating film may be heated in an air atmosphere or an inert gas atmosphere such as nitrogen gas or argon gas; and the like. (Para, 0380). These disclosures teach the limitation of claim 1, ‘ A method of patterning a substrate, comprising: depositing an underlayer over a substrate…’ and the limitation of claims 2-3 and 12. Inoue discloses a laminate that includes a substrate and a resist underlayer film formed using a material for forming an underlayer film on one surface of the substrate. (Para, 0394). Inoue discloses it is preferable that the laminate has a structure in which the substrate is in contact with the resist underlayer film. (Para, 0395). Inoue also discloses a resist film forming step, which forms a resist film on a upper side of the resist underlayer. (Para, 0447). As discussed in the details of the photolithography patterning process, the resist layer can be exposed to various forms of light to form a pattern including EUV. (Para, 0457). These disclosures teach the limitation of claim 1, ‘ A method of patterning a substrate, comprising: …applying an extreme ultra violet (EUV) sensitive resist over the underlayer…’ Inoue discloses the pattern forming method includes (i) a step of forming a resist pattern on an upper surface side of the resist underlayer film as described above (hereinafter, also referred to as a “resist pattern forming step”); and (ii) a step of sequentially etching the resist underlayer film and the substrate using the resist pattern as a mask (hereinafter, also referred to as an “etching step”). (Para, 0433). Inoue explains the pattern forming method may be performed by forming an intermediate layer on an upper surface side of the resist underlayer film to form a resist pattern on an upper surface side of the intermediate layer in the resist pattern forming step and etching the intermediate layer in the etching step. (Para, 0434). Inoue discloses that the intermediate layer indicates a layer that compensates for the functions of the resist underlayer film and/or the resist film or has these functions for imparting the functions that the resist underlayer film and/or the resist film does not have in the formation of the resist pattern or the like. (Para, 0439). Inoue explains a hard mask layer can be formed as an intermediate layer, so the influence on the resist underlayer film at the time of using an alkali developer is suppressed and/or the insufficient etching resistance of the resist pattern formation layer at the time of etching the substrate formed of silicon, aluminum, nickel, and the like of the lower layer after the resist underlayer film is etched can be compensated. (Para, 0439). These disclosures teach the limitation of claim 13. Inoue discloses that an examples of the method of forming the resist pattern on the upper surface side of the resist underlayer film or the intermediate layer include a method of using photolithography. (Para, 0444). Inoue explains the method of using photolithography may include a step of forming a resist film on the upper surface side of the resist underlayer film using a resist composition or the like (hereinafter, also referred to as a “resist film forming step”); a step of exposing the resist film (hereinafter, also referred to as an “exposing step”), and a step of developing the exposed resist film (hereinafter, also referred to as a “developing step”). (Para, 0445). Inoue discloses the method of coating using the resist composition is not particularly limited and can be performed using a spin coating method, a cast coating method, or a roll coating method. (Para, 0453). Inoue discloses a prebake temperature may be appropriately selected depending on the kind of resist composition used and the like and is typically 30° C. to 200° C., preferably 50° C. to 150° C. (Para, 0454). Inoue discloses resist film formed in the resist film forming step is exposed through, for example, a predetermined mask pattern and liquid immersion as necessary. (Para, 0455). Inoue discloses the exposure light is appropriately selected from electromagnetic waves such as visible light, ultraviolet rays, far ultraviolet rays, X rays, and γ rays; and particle beams such as electron beams, molecular beams, ion beams, and a rays depending on the kind of the photoacid generator used in the resist composition. (Para, 0456). Inoue discloses, far ultraviolet rays are preferable; KrF excimer laser light (248 nm), ArF excimer laser light (193 nm), F2 excimer laser light (wavelength of 157 nm), Kr2 excimer laser light (wavelength of 147 nm), ArKr excimer laser light (wavelength of 134 nm), or extreme ultraviolet rays (wavelength of 13 nm and the like) are more preferable, and ArF excimer laser light is still more preferable. (Para, 0457). These disclosures teach the limitation of claim 1, ‘ A method of patterning a substrate, comprising: …exposing the substrate…’ Inoue discloses after the exposure, post-baking can be performed in order to improve the resolution, the pattern profile, and the developability of the resist pattern to be formed (post exposure bake). (Para, 0458). Inoue discloses the temperature at this time may be appropriately adjusted depending on the kind of resist composition used and the like such as 50° C. to 200° C., preferably 70° C. to 150° C. (Para, 0458). Inoue discloses the exposed resist film is then developed. (Para, 0460). Inoue discloses the developer used in the development may be appropriately selected depending on the kind of the resist composition to be used. (Para, 0461). Inoue discloses by forming the intermediate layer as described above, the influence of the developer on the resist underlayer film can be suppressed. (Para, 0464). Inoue discloses after the development using the developer, a predetermined resist pattern is formed by performing washing and drying on the resist film. (Para, 0465). These disclosures teach the limitation of claim 1, ‘ A method of patterning a substrate, comprising: …developing the EUV sensitive resist to form a pattern in the EUV sensitive resist…’ Inoue discloses the resist underlayer film and the substrate are then sequentially etched using the obtained resist pattern as a mask so the pattern is formed on the substrate. (Para, 0468). Inoue discloses in the case of forming an intermediate layer, the intermediate layer is also etched. (Para, 0468). These disclosures teach the limitations of claim 1, ‘ A method of patterning a substrate, comprising: …transferring the pattern into the underlayer; and transferring the pattern into the substrate.’ Inoue discloses the above-described etching may be dry etching or wet etching. (Para, 0469). This disclosure teaches the limitation of claims 9-10. Therefore, claims 1-4 and 9-13 are anticipated by the disclosures of Inoue. Claim(s) 14-16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Saha (US 2023/0077088; IDS, 07/19/2024). Saha discloses a method of forming an underlayer for EUV dose reduction and the resulting structure. (Para, 0007). Saha discloses structures that include a photoresist absorber layer with relatively high EUV sensitivity. (Para, 0007). Saha explains the relatively high sensitivity allows for use of a relatively low dosage of EUV to obtain desired contrast between exposed and unexposed areas of the photoresist, which, in turn, allows for the formation of features with desired properties, such as small critical dimensions, which can be formed in a relatively cost-effective manner. (Para, 0007). Saha discloses that only needing a relatively low dosage of EUV advantageously allows reducing exposure times, thereby increasing throughput of EUV exposures. (Para, 0007). Saha discloses exemplary EUV absorber layers or underlayers include an element with relatively high EUV absorption such as an oxide of such an element (or a metal oxide) is formed, which can be used as an EUV absorption-enhancing underlayer for EUV lithography. (Para, 0008). Saha further explains exemplary underlayers, e.g., oxides of high-z elements such as I, Te, Cs, Sb, Sn, In, Bi, Ag, Pb, Au, Pt, and Ir (with oxides of Sn or In being desirable in some implementations). (Para, 0008). Saha also discloses a discloses a structure for forming patterned features using extreme ultraviolet (EUV) radiation. (Para, 0013). Saha discloses the structure may include a substrate and an absorber layer formed overlying the substrate. (Para, 0013). Saha discloses the absorber layer may include an oxide of I, Te, Cs, Sb, Sn, In, Bi, Ag, Pb, Au, Pt, or Ir. (Para, 0013). Saha discloses the structure may also include an EUV photoresist layer formed overlying the absorber layer and in some embodiments of the structures, the absorber layer includes tin oxide or indium oxide. (Para, 0013). These disclosures teach the limitations of claim 14 ‘ A photoresist stack, comprising: an underlayer, wherein the underlayer is sensitive to extreme ultraviolet (EUV) radiation; and an EUV sensitive resist over the underlayer.’ Moreover, these disclosures also teach the limitations of claims 15-16. Therefore, claims 14-16 are anticipated by the disclosures of Saha. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Inoue in view of Saha. The disclosures of Inoue as discussed in the rejection of claims 1-4 and 9-13 in paragraph 3 above teach and/or suggest the limitations of claim 17, ‘ A method of patterning a substrate, comprising: providing an underlayer over the substrate…disposing a photoresist over the underlayer, wherein the photoresist is sensitive to EUV radiation, and wherein the photoresist is applied with a spin coating process; exposing the substrate to EUV radiation and developing the photoresist to form a pattern in the photoresist; transferring the pattern into the underlayer; and transferring the pattern into the substrate.’ Moreover, the disclosures of Inoue as discussed above teach and/or suggest the limitations of claims 18-20. Still, the disclosures of Inoue as discussed above fail to explicitly teach and/or suggest the limitation of claim 17, ‘ A method of patterning a substrate, comprising: …wherein the underlayer is sensitive to extreme ultraviolet (EUV) radiation…’ However, the disclosures of Inoue in view of the disclosures of Saha provide such teachings. Saha is relied upon as discussed in the rejection of claims 14-16 in paragraph 4 above. The disclosures of Inoue in view of the disclosures of Saha as discussed in paragraph 4 above teach and/or suggest the limitation of claim 17, ‘ A method of patterning a substrate, comprising: …wherein the underlayer is sensitive to extreme ultraviolet (EUV) radiation…’ It would have been obvious to one of ordinary skill in the art at the time of filing of the present application by applicant to modify the disclosures of Inoue in view of the disclosures of Saha because both are directed to underlayer film forming compositions for photolithography pattering processes for resist layers that are sensitive to and/or exposed to EUV radiation and Saha discloses a resist underlayer film forming composition that is highly sensitive to EUV radiation which allows for using a relatively low dosage of EUV to obtain desired contrast between exposed and unexposed areas of the photoresist and formation of features with desired properties, such as small critical dimensions, in a relatively cost-effective manner. Claim(s) 5-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Inoue as applied to claims 1-4 and 9-13 in paragraph 3 above, and further in view of Shimura (US 2021/0318618). The disclosures of Inoue as discussed in paragraph 3 above fail to explicitly teach and/or suggest the limitation of claim 5, ‘ The method of claim 2, wherein the treatment process comprises an ultraviolet (UV) radiation treatment.’ However, the disclosures of Inoue further in view of the disclosures of Shimura provide such teachings. Shimura discloses a substrate treatment method of treating a treatment object substrate includes before applying a resist solution for forming a resist film onto a base film formed on a substrate surface of the treatment object substrate, performing a treatment of decreasing a polarity of the base film when the polarity of the base film is higher than a polarity of the resist solution, and performing a treatment of increasing the polarity of the base film when the polarity of the base film is lower than the polarity of the resist solution. (Abstract). Shimura discloses the resist layer applied is for EUV exposure. (Para, 0040). Shimura describes the wafer treatment process performed using the substrate treatment system 1. (Para, 0057). Shimura illustrates the example process in a flowchart. (Para, 0057; Fig.6). Shimura discloses that on the wafer W being an object to be treated, the base film has been already formed before the treatment in the substrate treatment system 1 in some cases or the base film is formed in the substrate treatment system 1 in some cases. (Para, 0057). Shimura discloses the wafer W is first transferred into the substrate treatment system 1 (Step S1). (Para, 0058; Fig.6). Shimura discloses in the case where the lower anti-reflection film, namely, the base film composed of a non-organic acid has not been formed on the wafer W, the wafer W is transferred to the lower anti-reflection film forming apparatus 31 in which a lower anti-reflection film composed of an organic acid is formed (Step S2). (Para, 0059). Shimura discloses the wafer W is then transferred to the UV radiation apparatus 41 in which the UV light is radiated to the entire surface of the lower anti-reflection film being the base film (Step S3). (Para, 0059; Fig.6). Shimura explains the polarity of the base film composed of the organic acid is lower than the polarity of the resist solution, but the UV light is radiated to the surface of the base film to increase the polarity, thereby making the polarity of the base film almost the same as the polarity of the resist solution. (Para, 0059; Fig.6). The disclosures of Inoue further in view of these disclosures and illustrations of Shimura teach and/or suggest the limitation of claim 5. Moreover, as discussed in paragraph 3 above Inoue discloses treatment of the wafer in an air atmosphere or an inert gas atmosphere such as nitrogen gas or argon gas; and the like. (Para, 0380). Therefore, the disclosures of Inoue further in view of these disclosures and illustrations of Shimura contemplate the limitation of claim 6. Shimura also discloses a case where the lower anti-reflection film composed of the non-organic acid has been formed on the wafer W, the wafer W is transferred to the HMDS treatment apparatus 42, and the surface of the lower anti-reflection film as the base film is treated with the HMDS gas, namely, subjected to the HMDS treatment (Step S4). (Para, 0060; Fig.6). Shimura explains, the lower anti-reflection film composed of the non-organic acid is, for example, SiON or the like formed by a CVD (Chemical Vapor Deposition) method of, and its polarity is higher than the polarity of the resist film. (Para, 0060; Fig.6). Shimura discloses the the surface of the lower anti-reflection film composed of the non-organic acid, namely, the surface of the base film is treated with the HMDS gas as explained above and thereby covered with hydrophobic groups (specifically, methyl groups) to be decreased in polarity, whereby the polarity of the base film becomes almost the same as the polarity of the resist solution. (Para, 0060; Fig.6). The disclosures of Inoue further in view of these disclosures of Shimura teach and/or suggest the limitations of claims 7-8. Shimura discloses after a polarity adjusting process on the base film surface as at Step S3 or Step S4, the wafer W is transferred to the resist coating apparatus 32 in which the coating film of the resist solution is formed on the base film of the wafer W (Step S5). (Para, 0061). It would have been obvious to one of ordinary skill in the art at the time of filing of the present application by applicant to modify the disclosures of Inoue further in view of the disclosures and illustrations of Shimura because both Inoue and Shimura are directed to analogous photolithography processes using underlayers for exposing overlying resist layer with EUV radiation and Shimura discloses a treatment step which will make the resist underlayer and overlying EUV sensitive resist layer more compatible for the photolithography process resulting in more precise pattern forming process and pattering of the resulting substrate for semiconductor device formation. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEEN O SULLIVAN whose telephone number is (571)272-6569. The examiner can normally be reached Mon-Fri: 7:30 am-4:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Feb 19, 2024
Application Filed
Nov 10, 2025
Response after Non-Final Action
Aug 03, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
99%
With Interview (+11.4%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1140 resolved cases by this examiner. Grant probability derived from career allowance rate.

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