Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Attorney Docket Number: TSMP20231261US02
Filling Date: 02/22/24
Priority Date: 11/29/2023
Inventor: Chou et al
Examiner: Bilkis Jahan
DETAILED ACTION
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Election/Restrictions
Applicant’s election of Group I, claims 1-15 and 21-25 in the reply filed on 08/03/26 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 6 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al (US 2022/0246818 A1).
Regarding claim 1, Chen discloses a device (Fig. 7) comprising: a semiconductor die 113 (Para. 69) bonded to an integrated circuit die 150, 121, 111, 112, 103 (Paras. 51, 52, 54, 86), wherein the integrated circuit die 150, 121, 111, 112, 103 comprises a first interconnect structure 121, 150, 103 a first redistribution structure 106 (Opara. 58), wherein the first interconnect structure 121, 150, 103 is bonded to the first redistribution structure 106; and a composite heat dissipation material 140 between a bottom surface of the first interconnect structure 121, 150, 103 and a top surface of the first redistribution structure 106.
Chen does not explicitly disclose the first interconnect structure has a metal density of at least 50%; first redistribution structure having a metal density of at least 50%.
However, Chen discloses the first interconnect structure 121, 150, 103 has a metal density (Paras. 52, 37) and first redistribution structure having a metal density 106 (Paras. 61-63). Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to obtain the first interconnect structure has a metal density of at least 50%; first redistribution structure having a metal density of at least 50% for improved connection (Fig. 7).
Regarding claim 3, Chen further discloses the device of claim 1, wherein the semiconductor die 113 (Para. 78) is bonded to a second interconnect structure 115 of the integrated circuit die, wherein the second interconnect structure 115 has a metal density of less than 50% (consider the drawing is scaled, obvious).
Regarding claim 6, Chen further discloses the device of claim 1, wherein the semiconductor die 113 is bonded to the integrated circuit die 111, 112 using dielectric-to-dielectric bonding 160, 120 (Paras. 78).
Regarding claim 8, Chen further discloses the device of claim 1, wherein the integrated circuit die 112, 111 is closer to the first redistribution structure 106 than the semiconductor die 113.
Claim(s) are 2, 4, 7-9, 12-14 and 15 rejected under 35 U.S.C. 103 as being unpatentable over Chen et al (US 2022/0246818 A1) in view of Fujimoto (US 2017/0237227 A1).
Regarding claim 2, Chen does not explicitly disclose the device of claim 1, wherein the composite heat dissipation material has a thermal conductivity in the range of 30 W/m-K to 50 W/m-K.
However, Fujimoto discloses same material as instant application heat dissipation material (Au nanoparticles, Para. 38). Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to obtain the composite heat dissipation material has a thermal conductivity in the range of 30 W/m-K to 50 W/m-K because of the same material as instant application.
Regarding claim 4, Chen does not explicitly disclose the device of claim 1, wherein the composite heat dissipation material comprises gold nanoparticles.
However, Fujimoto discloses the composite heat dissipation material comprises gold nanoparticles (Au nanoparticles, Para. 38). Fujimoto teaches the above modification is used to improve heat dissipation of the device (Fig. 7).
Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute Chen heat dissipation material with Fujimoto heat dissipation material to improve heat dissipation of the device (Fig. 7).
Regarding claim 7, Chen does not explicitly disclose the device of claim 1, wherein the composite heat dissipation material covers sidewalls of the semiconductor die and the integrated circuit die.
However, Fujimoto discloses the composite heat dissipation material (Au nanoparticles, Para. 38) covers sidewalls of the semiconductor die and the integrated circuit die (Chen discloses the heat dissipation material 140, 160 covers sidewalls of 112, 111 and 113, every material has heat dissipation capability).
Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute Chen heat dissipation material with Fujimoto heat dissipation material to improve heat dissipation of the device (Fig. 7).
Regarding claim 9, Chen discloses a device (Fig. 7) package comprising: a package component comprising: a first semiconductor die 113 comprising: a front-side interconnect structure 115; and a back-side interconnect structure 121 (claim does not define back side), wherein the back-side interconnect structure has a metal density greater than that of the front side interconnect structure (Fig. 7); and a second semiconductor die 112 bonded to the front-side interconnect structure 115; a package substrate comprising: a first redistribution structure 106, wherein the first redistribution structure 106 has a metal density greater than that of the front side interconnect structure 115, wherein the package component 113 is attached to the first redistribution structure 106 (attached through other layers); and an underfill 140 between the package component 113 and the package substrate 106.
Chen does not explicitly disclose the underfill has a thermal conductivity that is greater than 10 W/m-K.
However, Fujimoto discloses the underfill has a thermal conductivity that is greater than 10 W/m-K (Au nanoparticles, Para. 38, same material as instant application).
Fujimoto teaches the above modification is used to improve heat dissipation of the device (Fig. 7).
Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute Chen heat dissipation material with Fujimoto heat dissipation material to improve heat dissipation of the device (Fig. 7).
Regarding claim 12, Chen discloses the package of claim 9, wherein the underfill comprises a filler material 140 in a base material 101 (Para. 26), wherein the filler material comprises at least one of metal nanoparticles or metal nanotubes (Fujimoto, Au nanoparticles, Para. 38), wherein the filler material is between 50% by weight and 90% by weight of the underfill (Fujimoto, same material as instant application).
Regarding claim 13, Chen discloses the package of claim 9, wherein the package substrate further comprises a second redistribution structure 107, 108 that has a metal density greater than that of the front side interconnect structure 115.
Regarding claim 14, Chen discloses the package of claim 9, wherein the back-side interconnect structure has a metal density in the range of 50% to 70% 121, 151 (obvious).
Regarding claim 15, Chen discloses the package of claim 9 further comprising a lid 140 that is attached to a top surface of the first redistribution structure 106 and is attached to a top surface of the second semiconductor die 112.
Claim(s) 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al (US 2022/0246818 A1) in view of Fujimoto (US 2017/0237227 A1) and further in view of Lee et al (US 2024/0136329 A1).
Regarding claims 10 and 11, Chen in view of Fujimoto does not explicitly disclose the package of claim 9, wherein the back-side interconnect structure comprises a power supply line; the package of claim , wherein the back-side interconnect structure of the package component is bonded to the first redistribution structure.
However, Lee discloses multiple RDL layers and power line is in the RDL layer (Claim 15). Lee teaches the above modification is used to supply power of the package (claim 15).
Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to combine Chen in view of Fujimoto structure with Lee power supply line as suggested above to supply power of the package (claim 15).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al (US 2022/0246818 A1) in view of Stone et al (US 2015/0034144 A1).
Regarding claim 5, Chen does not explicitly disclose the device of claim 1, wherein the composite heat dissipation material comprises silicon oxide particles.
However, Stone discloses the composite heat dissipation material comprises silicon oxide particles (Para. 46). Stone teaches the above modification is used to improve heat sense of the device (Para. 46). Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute Chen heat dissipation material with Stone heat dissipation material to improve heat sense of the device (Para. 46).
Allowable Subject Matter
Claims 21-25 are allowed.
Conclusion
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BILKIS . JAHAN
Primary Examiner
Art Unit 2817
/BILKIS JAHAN/Primary Examiner, Art Unit 2817
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