Prosecution Insights
Last updated: July 17, 2026
Application No. 18/585,854

INTEGRATED CIRCUIT PACKAGE AND METHOD

Non-Final OA
Filed
Feb 23, 2024
Priority
Nov 16, 2023 — provisional 63/599,585
Examiner
RODELA, EDUARDO A
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
924 granted / 1072 resolved
+18.2% vs TC avg
Moderate +6% lift
Without
With
+5.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
30 currently pending
Career history
1088
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
78.7%
+38.7% vs TC avg
§102
7.0%
-33.0% vs TC avg
§112
3.8%
-36.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1072 resolved cases

Prosecution Timeline

Feb 23, 2024
Application Filed
Apr 17, 2026
Non-Final Rejection mailed (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12672411
METHOD FOR PRODUCING A NATIVE EMISSION MATRIX
2y 6m to grant Granted Jun 30, 2026
Patent 12660525
APPARATUS AND METHODS FOR PROCESSING BONDING SEMICONDUCTOR WAFERS
3y 6m to grant Granted Jun 16, 2026
Patent 12660457
DISPLAY DEVICE INCLUDING SENSORS
3y 3m to grant Granted Jun 16, 2026
Patent 12660144
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
2y 10m to grant Granted Jun 16, 2026
Patent 12652800
VERTICAL MEMORY DEVICE
2y 10m to grant Granted Jun 09, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
92%
With Interview (+5.8%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1072 resolved cases by this examiner. Grant probability derived from career allowance rate.

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