Prosecution Insights
Last updated: July 17, 2026
Application No. 18/592,741

METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE DEVICE

Non-Final OA §102§103
Filed
Mar 01, 2024
Examiner
HARRISTON, WILLIAM A
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
953 granted / 1066 resolved
+21.4% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
16 currently pending
Career history
1089
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
65.6%
+25.6% vs TC avg
§102
11.5%
-28.5% vs TC avg
§112
1.0%
-39.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1066 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings filed on 03/01/2024 are acceptable. Specification The abstract of the disclosure and the specification filed on 03/01/2024 are acceptable. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 9, 11 and 12 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Liu (US 2014/0011324). PNG media_image1.png 380 680 media_image1.png Greyscale PNG media_image2.png 408 696 media_image2.png Greyscale Regarding claim 1, Liu (US 2014/0011324) discloses: A method for manufacturing a semiconductor package device, comprising: forming a first semiconductor structure (100, ¶0020 and later 100a¶0035) and a second semiconductor structure (100 and later 100b, ¶0035), the first semiconductor structure including a first dielectric bonding layer (114, ¶0018) and a first conductive bonding feature (112, ¶0018) disposed in the first dielectric bonding layer (114), the second semiconductor structure including a second dielectric bonding layer (114) and a second conductive bonding feature (112) disposed in the second dielectric bonding layer (114); treating the first semiconductor structure and the second semiconductor structure with an acidic reactant including an acid, so that metal oxide formed on the first conductive bonding feature and metal oxide formed on the second conductive bonding feature are reduced to pure metal (¶0026, ¶0027); and bonding the first semiconductor structure (100a) to the second semiconductor structure (100b) by a hybrid bonding process (¶0031) so as to permit the first dielectric bonding layer to be bonded to the second dielectric bonding layer and to permit the first conductive bonding feature to be bonded to the second conductive bonding feature (¶0034). Regarding claim 2, Liu further discloses: wherein the acid includes hydrochloric acid (¶0026). Regarding claim 9, Liu discloses: A method for manufacturing a semiconductor package device, comprising: forming a first semiconductor structure (100a) and a second semiconductor structure (100b), the first semiconductor structure including a first dielectric bonding layer (114) and a first conductive bonding feature (112) disposed in the first dielectric bonding layer, the second semiconductor structure including a second dielectric bonding layer (114) and a second conductive bonding feature (112) disposed in the second dielectric bonding layer; treating the first semiconductor structure and the second semiconductor structure with an acidic reactant and an alkaline reactant, so that metal oxide formed on the first conductive bonding feature and metal oxide formed on the second conductive bonding feature are reduced to pure metal by treating with the acidic reactant, and so that an amount of hydroxide ions formed on the first dielectric bonding layer and the second dielectric bonding layer are increased by treating with the alkaline reactant, the acidic reactant including an acid, the alkaline reactant including alkaline water, an alkaline solution or a combination thereof (¶0026, ¶0027, ¶0029); and bonding the first semiconductor structure to the second semiconductor structure by a hybrid bonding process so as to permit the first dielectric bonding layer to be bonded to the second dielectric bonding layer and to permit the first conductive bonding feature to be bonded to the second conductive bonding feature(¶0034). Regarding claim 11, Liu further discloses: wherein the acid includes an organic acid, an inorganic acid, or a combination thereof (¶0026). Regarding claim 12, Liu further discloses: wherein the alkaline solution includes an ammonia aqueous solution (¶0029). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 3, 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu. Regarding claim 3, Liu does not disclose “wherein the acidic reactant has a hydrogen ion concentration ranging from 10-3 mol/L to 10-4 mol/L”. However, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only ordinary skill in the art. In re Aller, 105 USPQ 233. In the instant case the prior art device would not perform differently if modified to the claimed range(s). Therefore the claimed limitations are considered met. Regarding claim 4, Liu does not disclose “wherein the acidic reactant is introduced for a time period ranging from 30 seconds to 120 seconds”. However, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only ordinary skill in the art. In re Aller, 105 USPQ 233. In the instant case the prior art device would not perform differently if modified to the claimed range(s). Therefore the claimed limitations are considered met. Allowable Subject Matter Claims 5-8, 10 and 13-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 5, the prior art does not disclose “after formation of the first semiconductor structure and the second semiconductor structure and before treatment of the first semiconductor structure and the second semiconductor structure with the acidic reactant, the first semiconductor structure and the second semiconductor structure are treated with an alkaline reactant that includes alkaline water, an alkaline solution, or a combination thereof” in combination with the remaining claimed features. Regarding claim 10, the prior art does not disclose “wherein the first semiconductor structure and the second semiconductor structure are treated with the alkaline reactant before being treated with the acidic reactant. Regarding claim 13, the prior art does not disclose “before treatment of the first semiconductor structure and the second semiconductor structure, subjecting each of the acidic reactant and the alkaline reactant to a dissociation reaction by a plasma treatment, a catalysis treatment, or a combination thereof” in combination with the remaining claimed features. Claims 17-20 are allowed. Regarding claims 17-20, the prior art does not disclose “ treating the first semiconductor structure and the second semiconductor structure with an alkaline reactant that includes alkaline water, an alkaline solution or a combination thereof; treating the first semiconductor structure and the second semiconductor structure, which are treated with the alkaline reactant, with an acidic reactant that includes an acid, so that metal oxide formed on the first conductive bonding feature and metal oxide formed on the second conductive bonding feature are reduced to pure metal” in combination with the remaining claimed features. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A HARRISTON whose telephone number is (571)270-3897. The examiner can normally be reached Mon-Fri, 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM A HARRISTON/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Mar 01, 2024
Application Filed
Jun 24, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
98%
With Interview (+8.2%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1066 resolved cases by this examiner. Grant probability derived from career allowance rate.

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