CTNF 18/594,074 CTNF 100146 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions 08-25-01 AIA Applicant’s election without traverse of Group II in the reply filed on May 21, 2026 is acknowledged. 08-06 AIA Claim s 15-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group , there being no allowable generic or linking claim. Election was made without traverse in the reply filed on May 21, 2026 . Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-3, and 8 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Benetik et al. (US 20050208728 A1) herein after “Benetik” . Regarding claim 1, Figs. 5 and 7 of Benetik discloses a structure (Fig. 5, capacitance structure K, ¶ [0039]) comprising: a first conductive line (Fig. 5, metallization plane 3, ¶ [0047]) within a dielectric material (Fig. 5, “This insulating layer has a capacitance structure K integrated in it”, ¶ [0039]), the dielectric material (“insulating layer”) extending over the first conductive line (3); a second conductive line (Fig. 5, metallization planes 4, ¶ [0047]) within the dielectric material (“insulating layer”) and substantially vertically aligned with the first conductive line (3); and a conductive pillar (Fig. 5, bars 41a to 46a, ¶ [0047]) within the dielectric material (“insulating layer”) between the first conductive line (3) and the second conductive line (4), wherein the conductive pillar (41a-46a) includes one of an upper surface contacting a lower surface of the second conductive line (4) and a lower surface contacting an upper surface of the first conductive line (3), wherein a vertical thickness of the conductive pillar (41a-46a) is less than a vertical thickness between the first conductive line (3) and the second conductive line (4), a first capacitive junction (Fig. 7, second capacitance components C2, ¶ [0044]) is between the conductive pillar (41a-46a) and one of the first conductive line (3) and the second conductive line (4). Regarding claim 2, Figs. 5 and 7 of Benetik disclose the structure of claim 1 as applied above, and Benetik further discloses wherein the first conductive line (3) and the second conductive line (4) are each one of a plurality of conductive lines extending horizontally outward from a conductive wire (“The lines 31, 33, 35, 42, 44 and 46 are electrically connected to a first connecting line (not shown)”, ¶ [0047]). Regarding claim 3, Figs. 5 and 7 of Benetik disclose the structure of claim 1 as applied above, and Fig. 5 of Benetik further discloses wherein the conductive pillar (41a-46a) is one of a plurality of pillars within the dielectric material (“insulating layer”), each of the plurality of pillars having a horizontal length less than a horizontal length of the first conductive line (3) or the second conductive line (4). Regarding claim 8, Figs. 5 and 7 of Benetik disclose the structure of claim 1 as applied above, and Fig. 7 of Benetik further discloses wherein a second capacitive junction (Fig. 7, first capacitance component C1, ¶ [0044]) is between the conductive pillar (41a-46a) and a horizontally adjacent conductive pillar (41a-46a) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 4-6, and 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Benetik (US 20050208728 A1) in view of Chen et al. (US 20100123213 A1) herein after “Chen” . Regarding claim 4, Figs. 5 and 7 of Benetik disclose the structure of claim 1 as applied above, but Benetik fails to explicitly disclose wherein the dielectric material includes an etch stop layer (ESL) vertically between the conductive pillar and one of the first conductive line and the second conductive line. In the similar field of endeavor of MIM capacitors, Fig. 4 of Chen discloses wherein the dielectric material (Fig. 4, “A number of caps and etch-stops, referred to collectively as caps 46”, ¶ [0039]) includes an etch stop layer (ESL) (Fig. 4, “Caps 46 may also include etch-stops for use during processing”, ¶ [0039]) vertically between the conductive pillar (Fig. 4, metal layer M3, ¶ [0030]) and one of the first conductive line (Fig. 4, metal layer M2, ¶ [0030]) and the second conductive line. It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the dielectric material layer of Benetik to include the etch stop layer as disclosed by Chen, to prevent diffusion of conductive material (see Chen, ¶ [0039]). Regarding claim 5, Benetik and Chen together disclose the structure of claim 4 as applied above, but Benetik fails to disclose wherein the ESL vertically interfaces with the conductive pillar and each of a plurality of additional conductive pillars between the first conductive line and the second conductive line. In the similar field of endeavor of MIM capacitors, Fig. 4 of Chen discloses wherein the ESL (46) vertically interfaces with the conductive pillar (M3) and each of a plurality of additional conductive pillars between the first conductive line (M2) and the second conductive line. It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the dielectric material layer of Benetik to include the etch stop layer as disclosed by Chen, to prevent diffusion of conductive material (see Chen, ¶ [0039]). Regarding claim 6, Benetik and Chen together disclose the structure of claim 4 as applied above, but Benetik fails to disclose wherein the dielectric material further includes an inter-level dielectric (ILD) layer on the ESL, the ILD layer having a different composition from the ESL. In the similar field of endeavor of MIM capacitors, Fig. 4 of Chen discloses wherein the dielectric material further includes an inter-level dielectric (ILD) layer (Fig. 4, dielectric material 52, ¶ [0039]) on the ESL (46), the ILD layer (52) having a different composition from the ESL (46) (“dielectric material 52 may have a dielectric constant .epsilon. of 2.5 .epsilon..sub.0, whereas caps 46 may have dielectric constants ranging from 2.7 .epsilon..sub.0 to 4.5 .epsilon..sub.0”, ¶ [0041]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the dielectric material layer of Benetik to include the materials as disclosed by Chen, to obtain the desired capacitive coupling (see Chen, ¶ [0041]). Regarding claim 9, Figs. 5 and 7 of Benetik discloses a structure (K) comprising: a first plurality of conductive lines (3) within a dielectric material (“insulating layer”); a second plurality of conductive lines (4) on the dielectric material (“insulating layer”) and substantially vertically aligned with the first plurality of conductive lines (3), each of the second plurality of conductive lines (4) having an alternating polarity relative to an adjacent conductive line in the second plurality of conductive lines (4); and a plurality of conductive pillars (41a-46a) within the dielectric material (“insulating layer”), wherein each of the plurality of conductive pillars (41a-46a) includes one of an upper surface interfacing with a lower surface of the second plurality of conductive lines (4) and a lower surface interfacing with an upper surface of the first plurality of conductive lines (3) conductive line, a vertical thickness of each conductive pillar is less than a vertical thickness between the plurality of first conductive lines (3) and the plurality of second conductive, a first capacitive junction (C2) is between each conductive pillar and one of the first plurality of conductive lines (3) and the second plurality of conductive lines (4), and a second capacitive junction (C3) is between two horizontally adjacent conductive pillars of the plurality of conductive pillars (41a-46a). Benetik discloses each of the first plurality of conductive lines (3) having an different potentials (“vertically and laterally adjacent lines being at different potentials”, ¶ [0004]) relative to an adjacent conductive line of the first plurality of conductive lines (3), but fails to explicitly disclose each of the first plurality of conductive lines having an alternating polarity relative to an adjacent conductive line of the first plurality of conductive lines. In the similar field of endeavor of MIM capacitors, Fig. 5 of Chen discloses each of the first plurality of conductive lines having an alternating polarity relative to an adjacent conductive line of the first plurality of conductive lines (Fig. 5, “The metal lines within a metal interconnect layer may be arranged in parallel and with alternating polarity”, “the M2 and M4 metal interconnect layers of capacitor 60 contain parallel metal lines 62 of polarity A and parallel metal lines 64 of polarity B”, ¶ [0007] and [0043]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the conductive lines layer of Benetik to include the alternating polarity as disclosed by Chen, to reduce parasitic inductive coupling effects (see Chen, ¶ [0009]). Regarding claim 10, Benetik and Chen together disclose the structure of claim 9 as applied above, and Fig. 5 of Benetik further discloses comprising: a first conductive wire (“The lines 31, 33, 35, 42, 44 and 46 are electrically connected to a first connecting line (not shown)”, ¶ [0047]) coupled to the first plurality of conductive lines (3), wherein each of the first plurality of conductive lines (3) extends horizontally outwardly from the first conductive wire; and a second conductive wire (“The lines 32, 34, 36, 41, 43 and 45 are electrically connected to a second connecting line (not shown)”, ¶ [0047]) coupled to the second plurality of conductive lines (4), wherein each of the second plurality of conductive lines (4) extends horizontally outwardly from the second conductive wire. Regarding claim 11, Benetik and Chen together disclose the structure of claim 9 as applied above, and Benetik further discloses the dielectric material between each of the plurality of conductive pillars and the respective first conductive line or the respective second conductive line (Fig. 5, “This insulating layer has a capacitance structure K integrated in it”, ¶ [0039]), but fails to disclose wherein the dielectric material includes an etch stop layer (ESL). In the similar field of endeavor of MIM capacitors, Fig. 4 of Chen discloses wherein the dielectric material (Fig. 4, “A number of caps and etch-stops, referred to collectively as caps 46”, ¶ [0039]) includes an etch stop layer (ESL) (Fig. 4, “Caps 46 may also include etch-stops for use during processing”, ¶ [0039]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the dielectric material layer of Benetik to include the etch stop layer as disclosed by Chen, to prevent diffusion of conductive material (see Chen, ¶ [0039]). Regarding claim 12, Benetik and Chen together disclose the structure of claim 11 as applied above, but Benetik fails to disclose wherein the dielectric material further includes an inter-level dielectric (ILD) layer on the ESL, the ILD layer having a different composition from the ESL. In the similar field of endeavor of MIM capacitors, Fig. 4 of Chen discloses wherein the dielectric material (52) further includes an inter-level dielectric (ILD) layer (52) on the ESL (46), the ILD layer (52) having a different composition from the ESL (46) (“dielectric material 52 may have a dielectric constant .epsilon. of 2.5 .epsilon..sub.0, whereas caps 46 may have dielectric constants ranging from 2.7 .epsilon..sub.0 to 4.5 .epsilon..sub.0”, ¶ [0041]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the dielectric material layer of Benetik to include the materials as disclosed by Chen, to obtain the desired capacitive coupling (see Chen, ¶ [0041]) . 07-21-aia AIA Claim s 7 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Benetik (US 20050208728 A1) and Chen (US 20100123213 A1) in further view of Tien et al. (US 20200343137 A1) herein after “Tien” . Regarding claim 7, Benetik and Chen together disclose the structure of claim 6 as applied above, but Benetik and Chen fail to disclose wherein the ILD layer includes silicon carbonitride (SiCN). In the similar field of endeavor of integrated circuits, Fig. 2 of Tien discloses wherein the ILD layer (Fig. 2, first dielectric layer 104, ¶ [0022]) includes silicon carbonitride (SiCN) (“the material of the first dielectric layer 104 includes silicon carbide (SiC), silicon dioxide (SiO.sub.2), silicon oxycarbide (SiOC), silicon nitride (SiN), silicon carbon nitride (SiCN)”, ¶ [0022]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the dielectric material layer of Benetik to include the materials as disclosed by Tien, to obtain the desired insulating properties (see Tien, ¶ [0022]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07). Regarding claim 13, Benetik and Chen together disclose the structure of claim 12 as applied above, but Benetik and Chen fail to disclose wherein the ILD layer includes silicon carbonitride (SiCN). In the similar field of endeavor of integrated circuits, Fig. 2 of Tien discloses wherein the ILD layer (104) includes silicon carbonitride (SiCN) (“the material of the first dielectric layer 104 includes silicon carbide (SiC), silicon dioxide (SiO.sub.2), silicon oxycarbide (SiOC), silicon nitride (SiN), silicon carbon nitride (SiCN)”, ¶ [0022]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the dielectric material layer of Benetik to include the materials as disclosed by Tien, to obtain the desired insulating properties (see Tien, ¶ [0022]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07) . 07-21-aia AIA Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Benetik (US 20050208728 A1) and Chen (US 20100123213 A1) in further view of Tien (US 20200343137 A1) . Regarding claim 14, Benetik and Chen together disclose the structure of claim 9 as applied above, but the combination fails to disclose wherein a material composition of the plurality of conductive pillars is different from a material composition of the first plurality of conductive lines or the second plurality of conductive lines. In the similar field of endeavor of integrated circuits, Fig. 2 of Tien discloses wherein a material composition of the plurality of conductive pillars (Fig. 2, metal lines 105, ¶ [0022]) is different from a material composition of the first plurality of conductive lines (Fig. 2, contacts 102C, ¶ [0018]) or the second plurality of conductive lines (“The conductive material includes a metal, such as cobalt, tungsten, copper, aluminum, gold, silver”, “the material of the metal lines 105 includes Ta, TaN, TiN”, ¶ [0021] and [0023]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the structure of Benetik with the conductive materials as disclosed by Tien, to improve production quality (see Tien, ¶ [0012]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORALIE NETTLES whose telephone number is (571)270-5374. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.A.N./Examiner, Art Unit 2893 /YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893 Application/Control Number: 18/594,074 Page 2 Art Unit: 2893 Application/Control Number: 18/594,074 Page 3 Art Unit: 2893 Application/Control Number: 18/594,074 Page 4 Art Unit: 2893 Application/Control Number: 18/594,074 Page 5 Art Unit: 2893 Application/Control Number: 18/594,074 Page 6 Art Unit: 2893 Application/Control Number: 18/594,074 Page 7 Art Unit: 2893 Application/Control Number: 18/594,074 Page 8 Art Unit: 2893 Application/Control Number: 18/594,074 Page 9 Art Unit: 2893 Application/Control Number: 18/594,074 Page 10 Art Unit: 2893 Application/Control Number: 18/594,074 Page 11 Art Unit: 2893 Application/Control Number: 18/594,074 Page 12 Art Unit: 2893
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