Prosecution Insights
Last updated: October 01, 2026
Application No. 18/595,374

SEGMENTED FORMATION OF GATE INTERFACE

Non-Final OA §102§103
Filed
Mar 04, 2024
Priority
Apr 10, 2023 — provisional 63/458,331
Examiner
EMPIE, NATHAN H
Art Unit
4100
Tech Center
4100
Assignee
Applied Materials Inc.
OA Round
1 (Non-Final)
44%
Grant Probability
Moderate
1-2
OA Rounds
1y 0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 44% of resolved cases
44%
Career Allowance Rate
317 granted / 728 resolved
-16.5% vs TC avg
Strong +43% interview lift
Without
With
+43.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
45 currently pending
Career history
773
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
54.4%
+14.4% vs TC avg
§102
13.0%
-27.0% vs TC avg
§112
26.6%
-13.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 728 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election with traverse of Group I (claims 1-13) in the reply filed on 7/1/26 is acknowledged. The traversal is on the ground(s) that no unreasonable search and examination burden exists because a search of Group I would be applicable to Group II. This is not found persuasive because a serious search and / or examination burden exists, as noted in the 5/7/26 Requirement for restriction wherein it was noted that the following reasons exist herein: the inventions have acquired a separate status in the art in view of their different classification the inventions have acquired a separate status in the art due to their recognized divergent subject matter the inventions require a different field of search (e.g., searching different classes/subclasses or electronic resources, or employing different search strategies or search queries). Further a serious burden exists in the differing issues likely to arise during the prosecution of the different inventions. The requirement is still deemed proper and is therefore made FINAL. Claims 14-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 7/1/26. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1- 3, 5, 7-9, and 11-12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hung (US 2021/0057215; hereafter Hung). Claim 1 and 9: Hung teaches a method of forming a semiconductor structure (see, for example, abstract), the method comprising: performing a first deposition process (such as some initial duration of 230) to deposit a first high-κ dielectric layer on a surface of a substrate (see, for example, abstract, Fig 2, [0029-0030]); performing an interface formation process (such as 220) to form an interfacial layer on the surface of the substrate (see, for example, Fig 2, [0028]); performing a second deposition process (such as some subsequent duration of 230 beyond the initial period of the first deposition process) to deposit a second high-κ dielectric layer on the interfacial layer (see, for example, abstract, Fig 2, [0030]); wherein the application of high-K dielectric, such as HfO2 is taught to be achieved via ALD comprised of periods of alternating metal-containing precursor and oxygen-containing precursor which overtime additively deposits a plurality of layers of HfO2 at a total thickness; thus an initial period of ALD of some subset of the total high-k dielectric deposited is interpreted as the third deposition process, and the latter as the second); performing a plasma nitridation process (such as 260) to insert nitrogen atoms in the first high-κ dielectric layer and the second high-κ dielectric layer (see, for example, [0035]); and performing an anneal process (such as 280 or 290) to passivate chemical bonds in the first high-κ dielectric layer and the second high-κ dielectric layer (See, for example, [0039-0041]). Claims 2 and 10: Hung further teaches wherein the first deposition process, the interface formation process, the second deposition process, the plasma nitridation process, and the anneal process are performed in a processing system without breaking vacuum (see, for example, [0007], claim 2). Claim 3: Hung further teaches prior to the first deposition process, pre-cleaning the surface of the substrate (such as step 210) (See, for example, Fig 2, [0027]) ; and subsequent to the anneal process (280/290), performing a passivation process (such as 250 or some initial period of time of step 290]) to diffuse oxygen or oxidant from ambient through the second high-κ dielectric layer, the first high-κ dielectric layer, and the interfacial layer into the substrate (See, for example, Fig 2, [0033], [0041]). Claim 5 and 12: Hung further teaches wherein the first deposition process and the second deposition process each comprise an atomic layer deposition (ALD) process, in which hafnium tetrachloride (HfCl4) and water are alternately delivered to the substrate (see, for example, [0030]). Claim 7: Hung further teaches wherein the plasma nitridation process comprises exposing the first high-κ dielectric layer and the second high-κ dielectric layer to nitrogen plasma using a mixture of nitrogen (N2) and ammonia (NH3) gas (see, for example, [0035]). Claim 8: Hung further teaches wherein the anneal process comprises spike annealing the first high-κ dielectric layer and the second high-κ dielectric layer in a nitrogen (N2) and argon (Ar) ambient at a temperature of between of between 700° C. and 850° C (see, for example, [0039-0040]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hung. Claims 4 and 11: Hung teaches the method of claim 1 /9 (per the 35 USC 102 (a)(1) rejection above), and further teaches wherein high-K dielectric material is HfO2, and wherein the total deposited amount of high-K dielectric is on the order of about 10 Å to about 30 Å formed via a cyclic ALD process (See, for example, [0030]). As described in the rejection of claim 1 above, the first and second high-k dielectric layers are interpreted as initial and subsequent periods respectively of the total high-k deposition process thus the period / thickness of each could be designated as any particular subset of the total disclosed about 10 Å to about 30 Å. It is acknowledged that this range does not fully anticipate the claimed conditions of the first being 3 Å and 10 Å, and the second between 10 Å and 25 Å; but it does overlap (such as selection of total thickness of 13 Å to 30 Å, and appropriate respective designation). Therefore it would have been obvious to one of ordinary skill in the art at the time before the effective filing date of the claimed invention to have incorporated a thickness of 13 Å to 30 Å, (allowing designation of the first and second portions thereof as 3 Å and 10 Å, and between 10 Å and 25 Å) since in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976) Claim(s) 1-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hung in view of Im et al (US 2005/0070063; hereafter Im). Claims 1, 6, 9, and 13: Hung teaches a method of forming a semiconductor structure (see, for example, abstract), the method comprising: performing a first deposition process (such as 230) to deposit a high-κ dielectric layer on a surface of a substrate (see, for example, abstract, Fig 2, [0030]); performing an interface formation process (such as 250) to form an interfacial layer on the surface of the substrate (see, for example, [0029]); performing a plasma nitridation process (such as 260) to insert nitrogen atoms in the high-κ dielectric layer (see, for example, [0035]); and performing an anneal process (such as 280 or 290) to passivate chemical bonds in the high-κ dielectric layer (See, for example, [0039-0041]). Hung further teaches wherein the interfacial layer comprises silicon oxide (SiO2), and the interface formation process comprises thermally oxidizing the substrate through the first high-κ dielectric layer utilizing nitrous oxide (N2O) gas (see, for example, [0029], [0033], Fig 2). Hung does not explicitly teach performing a second deposition process to deposit a second high-κ dielectric layer on the interfacial layer particularly deposited via the method described above (such as providing a deposition following step 250, but before step 260). Im teaches a method of forming a semiconductor structure comprising high-k dielectric layers, further of HfO2 (See, for example, abstract, [0003]). Im further teaches wherein improved dielectric layer robustness and art-known issues of contamination in such high dielectric layers can be combated by oxidant treatment following initial hafnium oxide layer deposition, (See, for example, [0016]. [0021], [0058]). Such steps appear to mimic steps 230 and 250 of Hung; but Im further notes that oxidation treatments are limited by mass transport and wherein the effectiveness can drop-off with thickness (See, for example, [0042-0043], Fig 3A-3B). Im then taught wherein overall improvement in dielectric layer quality can be achieved by breaking up the overall HfO2 deposition process into a plurality of intermediate layer depositions HFO2 with an oxidation cycle between each (See, for example, [0050-0055], [0059], [0063]). Therefore it would have been obvious to one of ordinary skill in the art at the time before the effective filing date of the claimed invention to have separated the overall high-k deposition process into a plurality of intermediate high-k deposition processes with intervening re-oxidation processes as repetition of known substeps would predictably result in the deposition of a desired high k-dielectric layer with improved process control, and / or as it would predictably reduce film contamination and enhance overall dielectric film robustness. By the combination with Im, the process sequence of steps of 230 and 250 of Hung would be performed a plurality of time in series to build up the resulting high-k dielectric layer, as such an initial iteration / period of deposition will be interpreted as the claimed first deposition process, and a subsequent as the second; wherein as an intervening step of 250 is conducted prior to the second deposition process the claimed interfacial layer would already exist prior to the deposition of the second high-k dielectric layer, thus meeting the limitation wherein performing the second deposition process deposits the second high-k dielectric layer on the interfacial layer. Claims 2 and 10: Hung further teaches wherein the first deposition process, the interface formation process, the second deposition process, the plasma nitridation process, and the anneal process are performed in a processing system without breaking vacuum (see, for example, [0007], claim 2). Claim 3: Hung further teaches prior to the first deposition process, pre-cleaning the surface of the substrate (such as step 210) (See, for example, Fig 2, [0027]) ; and subsequent to the anneal process (280/290), performing a passivation process (such as a final 250 following a few iterations of 230+250, or alternatively, some initial period of time of step 290]) to diffuse oxygen or oxidant from ambient through the second high-κ dielectric layer, the first high-κ dielectric layer, and the interfacial layer into the substrate (See, for example, rejection of claim 1 above, Fig 2, [0033], [0041]). Claim 4 and 11: Hung in view of Im teaches the method of claim 1 above, and Hung further teaches wherein high-K dielectric material is HfO2, and wherein the total deposited amount of high-K dielectric is on the order of about 10 Å to about 30 Å formed via a cyclic ALD process (See, for example, [0030]). As described in the rejection of claim 1 above, the first and second high-k dielectric layers are interpreted as initial and subsequent periods respectively of the total high-k deposition process thus the period / thickness of each could be designated as any particular subset of the total disclosed about 10 Å to about 30 Å. It is acknowledged that this range does not fully anticipate the claimed conditions of the first being 3 Å and 10 Å, and the second between 10 Å and 25 Å; but it does overlap (such as selection of total thickness of 13 Å to 30 Å, and appropriate respective designation). Therefore it would have been obvious to one of ordinary skill in the art at the time before the effective filing date of the claimed invention to have incorporated a thickness of 13 Å to 30 Å, (allowing designation of the first and second portions thereof as 3 Å and 10 Å, and between 10 Å and 25 Å) since in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976) Claim 5 and 12: Hung further teaches wherein the first deposition process and the second deposition process each comprise an atomic layer deposition (ALD) process, in which hafnium tetrachloride (HfCl4) and water are alternately delivered to the substrate (see, for example, [0030]). Claim 7: Hung further teaches wherein the plasma nitridation process comprises exposing the first high-κ dielectric layer and the second high-κ dielectric layer to nitrogen plasma using a mixture of nitrogen (N2) and ammonia (NH3) gas (see, for example, [0035]). Claim 8: Hung further teaches wherein the anneal process comprises spike annealing the first high-κ dielectric layer and the second high-κ dielectric layer in a nitrogen (N2) and argon (Ar) ambient at a temperature of between of between 700° C. and 850° C (see, for example, [0039-0040]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN H EMPIE whose telephone number is (571)270-1886. The examiner can normally be reached Monday-Thursday 5:30AM - 4 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Cleveland can be reached at 571-272-1418. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NATHAN H EMPIE/Primary Examiner, Art Unit 1712
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Prosecution Timeline

Mar 04, 2024
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
44%
Grant Probability
87%
With Interview (+43.1%)
3y 7m (~1y 0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 728 resolved cases by this examiner. Grant probability derived from career allowance rate.

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