Prosecution Insights
Last updated: August 17, 2026
Application No. 18/596,237

DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
Mar 05, 2024
Priority
Apr 17, 2023 — RE 10-2023-0049983
Examiner
BEARDSLEY, JONAS TYLER
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
60%
Grant Probability
Moderate
1-2
OA Rounds
8m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
170 granted / 283 resolved
-7.9% vs TC avg
Strong +30% interview lift
Without
With
+30.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
35 currently pending
Career history
327
Total Applications
across all art units

Statute-Specific Performance

§103
45.9%
+5.9% vs TC avg
§102
32.6%
-7.4% vs TC avg
§112
20.9%
-19.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 283 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 15-20 in the reply filed on 6/4/2026 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 15, 17 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by LIU (US 20190355836). Regarding claim 15, LIU discloses A method of manufacturing a display panel, the method comprising: forming a first active layer (fig 2, 20, para 47) and a second active layer (fig 2, 30, para 47) on a base substrate (fig 2, 10, para 47); forming a first active pattern layer (the patterned portion 21 of 20, see fig 4, para 54) and a second active pattern layer (the etched portion OF 30 over 21 in fig 4, see para 54) by a first etching step of etching the first active layer and the second active layer together (the etching process in fig 4, see para 54) by using a first photoresist layer (fig 3-4, the photoresist 90 including 93, para 54); ashing the first photoresist layer (the ashing process in fig 4-5, see para 55) to form a first photoresist pattern layer (the ashed photoresist 90 including 93 in fig 5, see para 55); forming a drain and a source (the etched portions 31 of 30, see fig 6, para 56) by a second etching step of etching the second active pattern layer exposed from the first photoresist pattern layer (the etching process in fig 5-6, see para 56); forming a gate insulating layer (fig 10, 60, para 59) on the drain, the source, and the first active pattern layer; and forming a gate electrode (fig 12, 81, para 66) and a connection electrode (fig 12, 71, para 66) on the gate insulating layer, wherein a portion of the first active pattern layer exposed from the drain and the source is defined as a channel region (the portion of 21 between and exposed from the two parts 31 will form the channel, see fig 12, para66). Regarding claim 17, LIU discloses the method of claim 15, wherein the gate insulating layer covers a portion of each of the drain and the source, which does not overlap the gate electrode (60 covers parts of 30 which do not overlap vertically with 81, see fig 12). Regarding claim 20, LIU discloses the method of claim 15, wherein the first photoresist layer comprises a first portion (the thicker portion 93, see fig 3, para 51) and a second portion (the thin portion 91, see fig 3, para 51) forming a single body with the first portion (91 and 93 form a single piece, see fig 3), the second portion having a thickness smaller than that of the first portion (91 is thinner than 93, see fig 3), and in the ashing of the first photoresist layer, the second portion is removed to expose a portion of the second active pattern layer corresponding to the channel region (91 is removed, see fig 5). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over LIU (US 20190355836) in view of PARK (US 20210327910). Regarding claim 16, LIU discloses the method of claim 15. LIU fails to explicitly disclose a method, wherein the gate electrode overlaps an end portion of the drain and an end portion of the source defining the channel region. PARK teaches a method, wherein the gate electrode overlaps an end portion of the drain and an end portion of the source defining the channel region (the gate electrode 11 overlaps along a vertical axis with 142 and 141, see fig 3, para 66). LIU and PARK are analogous art because they both are directed towards methods of making TFT semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the method of LIU with the gate overlap of PARK because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the method of LIU with the gate overlap of PARK in order to improve the electrical characteristics (see PARK para 74). Claim(s) 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over LIU (US 20190355836) in view of KIM (US 20100308324). Regarding claim 18, LIU discloses the method of claim 15. LIU fails to explicitly disclose a method, wherein the first etching step is a wet etching process. KIM teaches a method, wherein the first etching step is a wet etching process (the etching of 119, 123 and 129 in fig 3E can be a wet etch, see fig 3E, para 32). LIU and KIM are analogous art because they both are directed towards methods of making TFT devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of LIU with the specifically wet etching process of KIM because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of LIU with the specifically wet etching process of KIM in order to improve the characteristics of the TFT (see KIM para 40). Regarding claim 19, LIU discloses the method of claim 15. LIU fails to explicitly disclose a method, wherein the second etching step is a wet etching process. KIM teaches a method, wherein the second etching step is a wet etching process (the etching of 119, 123 and 129 in fig 3G can be a wet etch, see fig 3G, para 34-35). LIU and KIM are analogous art because they both are directed towards methods of making TFT devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of LIU with the specifically wet etching process of KIM because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of LIU with the specifically wet etching process of KIM in order to improve the characteristics of the TFT (see KIM para 40). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONAS TYLER BEARDSLEY whose telephone number is (571)272-3227. The examiner can normally be reached 930-600 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONAS T BEARDSLEY/Examiner, Art Unit 2811 /LYNNE A GURLEY/Supervisory Patent Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Mar 05, 2024
Application Filed
Jul 16, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
60%
Grant Probability
90%
With Interview (+30.0%)
3y 1m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 283 resolved cases by this examiner. Grant probability derived from career allowance rate.

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