DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 7-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 2020/0020780 A1).
With respect to claim 1, Kim discloses, in Figs.1-20F, a capacitor, comprising: a first electrode (103); a second electrode (101) over the first electrode (103); and a composite storage layer (DE1) sandwiched between the first electrode (101) and the second electrode (103) (see Par.[0042]-[0052] wherein referring to FIG. 1, the semiconductor device 100 may include a semiconductor layer stack 110; the semiconductor layer stack 110 may include a first conductive layer 101, a dielectric layer stack DE1, and a second conductive layer 103; the dielectric layer stack DE1 may include a dielectric layer HK and an interface control layer ICL1), comprising: a first storage layer (HBG) in physical contact with the first electrode (103); and a second storage layer (HK) in physical contact with the second electrode (101), wherein a conduction band offset of the first storage layer (HBG) is greater than a conduction band offset of the second storage layer (HK), and a dielectric constant of the second storage layer (HK) is greater than a dielectric constant of the first storage layer (HBG) (see Par.[0046] wherein the dielectric layer HK may have a dielectric constant that is higher than the dielectric constant of a silicon oxide (SiO.sub.2); the dielectric constant of the silicon oxide may be approximately 3.9, and the dielectric layer HK may include a material having a dielectric constant of approximately 4 or higher; the high-k material may have a dielectric constant of approximately 20 or higher; the high-k material may include a hafnium oxide (HfO.sub.2), a zirconium oxide (ZrO.sub.2), an aluminum oxide (Al.sub.2O.sub.3), a titanium oxide (TiO.sub.2), a tantalum oxide (Ta.sub.2O.sub.5), a niobium oxide (Nb.sub.2O.sub.5) or a strontium titanium oxide (SrTiO.sub.3); the dielectric layer HK may be a composite layer including two or more layers made of the above-described high-k material; the dielectric layer HK may include a stack of a high-k material and a high bandgap material having a higher bandgap than the high-k material; the dielectric layer HK may have a higher dielectric constant than the high bandgap layer HBG; the high bandgap layer HBG may include an aluminum oxide. In some embodiments, the high bandgap layer HBG may include a silicon oxide; the aluminum oxide and the silicon oxide have a high band gap of approximately 8 eV or higher and are not easily reduced).
With respect to claim 2, Kim discloses, in Figs.1-20F, the capacitor, wherein a first voltage is applied to the first electrode (103), a second voltage is applied to the second electrode (101), and the second voltage is greater than the first voltage (see Par.[0227], [0232] wherein to a positive bias leakage current density and a negative bias leakage current density, respectively; ‘pBV’ and ‘nBV’ refer to a positive bias breakdown voltage and a negative bias breakdown voltage, respectively; as such maximum voltage (V103 – V101) across the capacitor is negative of positive).
With respect to claim 3, Kim discloses, in Figs.1-20F, the capacitor, wherein the first voltage is a negative voltage and the second voltage is a positive voltage (see Par.[0227], [0232] wherein to a positive bias leakage current density and a negative bias leakage current density, respectively; ‘pBV’ and ‘nBV’ refer to a positive bias breakdown voltage and a negative bias breakdown voltage, respectively; as such maximum voltage (V103 – V101) across the capacitor is negative of positive).
With respect to claim 4, Kim discloses, in Figs.1-20F, the capacitor, wherein a material of the first storage layer comprises LaO, AlO, SiO, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0046] wherein the dielectric layer HK may have a dielectric constant that is higher than the dielectric constant of a silicon oxide (SiO.sub.2); the dielectric constant of the silicon oxide may be approximately 3.9, and the dielectric layer HK may include a material having a dielectric constant of approximately 4 or higher; the high-k material may have a dielectric constant of approximately 20 or higher; the high-k material may include a hafnium oxide (HfO.sub.2), a zirconium oxide (ZrO.sub.2), an aluminum oxide (Al.sub.2O.sub.3), a titanium oxide (TiO.sub.2), a tantalum oxide (Ta.sub.2O.sub.5), a niobium oxide (Nb.sub.2O.sub.5) or a strontium titanium oxide (SrTiO.sub.3); the dielectric layer HK may be a composite layer including two or more layers made of the above-described high-k material; the dielectric layer HK may include a stack of a high-k material and a high bandgap material having a higher bandgap than the high-k material; the dielectric layer HK may have a higher dielectric constant than the high bandgap layer HBG; the high bandgap layer HBG may include an aluminum oxide. In some embodiments, the high bandgap layer HBG may include a silicon oxide; the aluminum oxide and the silicon oxide have a high band gap of approximately 8 eV or higher and are not easily reduced).
With respect to claim 5, Kim discloses, in Figs.1-20F, he capacitor of claim 4, wherein a material of the second storage layer comprises ZrO, HfO, HfZrO, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0046] wherein the dielectric layer HK may have a dielectric constant that is higher than the dielectric constant of a silicon oxide (SiO.sub.2); the dielectric constant of the silicon oxide may be approximately 3.9, and the dielectric layer HK may include a material having a dielectric constant of approximately 4 or higher; the high-k material may have a dielectric constant of approximately 20 or higher; the high-k material may include a hafnium oxide (HfO.sub.2), a zirconium oxide (ZrO.sub.2), an aluminum oxide (Al.sub.2O.sub.3), a titanium oxide (TiO.sub.2), a tantalum oxide (Ta.sub.2O.sub.5), a niobium oxide (Nb.sub.2O.sub.5) or a strontium titanium oxide (SrTiO.sub.3); the dielectric layer HK may be a composite layer including two or more layers made of the above-described high-k material; the dielectric layer HK may include a stack of a high-k material and a high bandgap material having a higher bandgap than the high-k material; the dielectric layer HK may have a higher dielectric constant than the high bandgap layer HBG; the high bandgap layer HBG may include an aluminum oxide. In some embodiments, the high bandgap layer HBG may include a silicon oxide; the aluminum oxide and the silicon oxide have a high band gap of approximately 8 eV or higher and are not easily reduced).
With respect to claim 7, Kim discloses, in Figs.1-20F, the capacitor, wherein a doping concentration of the dopant in the first storage layer is greater than a doping concentration of the dopant in the second storage layer (see Par.[0161], [0166], [0191]).
With respect to claim 8, Kim discloses, in Figs.1-20F, the capacitor, wherein the composite storage layer further comprises a blocking layer (HLK) sandwiched between the first storage layer and the second storage layer (see Par.[0073]-[0074] wherein the leakage blocking layer HLK may prevent a dopant from being excessively diffused from the dopant-containing layer HKD; see Par.[0011] wherein a dielectric layer, leakage blocking material, dopant material and high bandgap material stack in which the dielectric layer, the leakage blocking material, the dopant material and the high bandgap material are sequentially stacked may include a ZAZATA (ZrO.sub.2/Al.sub.2O.sub.3/ZrO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/Al.sub.2O.sub.3) stack, a ZAZATS (ZrO.sub.2/Al.sub.2O.sub.3/ZrO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/SiO.sub.2) stack, an HAHATA (HfO.sub.2/Al.sub.2O.sub.3/HfO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/Al.sub.2O.sub.3) stack, an HAHATS (HfO.sub.2/Al.sub.2O.sub.3/HfO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/SiO.sub.2) stack or an HSHSTS (HfO.sub.2/SiO.sub.2/HfO.sub.2/SiO.sub.2/TiO.sub.2/SiO.sub.2) stack).
With respect to claim 9, Kim discloses, in Figs.1-20F, the capacitor, wherein a material of the blocking layer comprise AlO, Y2O3, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0073]-[0074] wherein the leakage blocking layer HLK may prevent a dopant from being excessively diffused from the dopant-containing layer HKD; see Par.[0011] wherein a dielectric layer, leakage blocking material, dopant material and high bandgap material stack in which the dielectric layer, the leakage blocking material, the dopant material and the high bandgap material are sequentially stacked may include a ZAZATA (ZrO.sub.2/Al.sub.2O.sub.3/ZrO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/Al.sub.2O.sub.3) stack, a ZAZATS (ZrO.sub.2/Al.sub.2O.sub.3/ZrO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/SiO.sub.2) stack, an HAHATA (HfO.sub.2/Al.sub.2O.sub.3/HfO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/Al.sub.2O.sub.3) stack, an HAHATS (HfO.sub.2/Al.sub.2O.sub.3/HfO.sub.2/Al.sub.2O.sub.3/TiO.sub.2/SiO.sub.2) stack or an HSHSTS (HfO.sub.2/SiO.sub.2/HfO.sub.2/SiO.sub.2/TiO.sub.2/SiO.sub.2) stack).
Claims 1-6, 8-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Pesic (US 2022/0138544 A1).
With respect to claim 1, Pesic discloses, in Figs.1-20, a capacitor, comprising: a first electrode (1804, 1824); a second electrode (1822, 1802) over the first electrode (1804, 1824); and a composite storage layer (1890) sandwiched between the first electrode (1804, 1824) and the second electrode (1802, 1822), comprising: a first storage layer/(SiO2 layer) in physical contact with the first electrode (1804, 1824); and a second storage layer/(HfO2 layer) in physical contact with the second electrode (1802, 1822), wherein a conduction band offset of the first storage layer/(SiO2 layer) is greater than a conduction band offset of the second storage layer/(HfO2) (see Fig.18A wherein band gap offset of SiO2 layer in contact with electrode material 1824 is greater than that of HfO2 is contact with electrode material 1822), and a dielectric constant of the second storage layer/(HfO2) is greater than a dielectric constant of the first storage layer/(SiO2) (it is submitted that the dielectric constant of the silicon oxide may be approximately 3.9, and the HfO2 layer is a high-K material having a dielectric constant of approximately 4 or higher or the high-k material may have a dielectric constant of approximately 20 or higher).
With respect to claim 2, Pesic discloses, in Figs.1-20, the capacitor, wherein a first voltage is applied to the first electrode, a second voltage is applied to the second electrode, and the second voltage is greater than the first voltage (see Par.[0116] wherein the configuration illustrated above in FIG. 18A was bipolar, such that a read voltage may be chosen at both (positive and negative) polarities; it allows the read voltage to be taken only on one, non-rectifying polarity; other embodiments may use an inverted configuration with tunneling layer 1822 next to bottom electrode 1804).
With respect to claim 3, Pesic discloses, in Figs.1-20, the capacitor, wherein the first voltage is a negative voltage and the second voltage is a positive voltage (see Par.[0116] wherein the configuration illustrated above in FIG. 18A was bipolar, such that a read voltage may be chosen at both (positive and negative) polarities; it allows the read voltage to be taken only on one, non-rectifying polarity; other embodiments may use an inverted configuration with tunneling layer 1822 next to bottom electrode 1804).
With respect to claim 4, Pesic discloses, in Figs.1-20, the capacitor, wherein a material of the first storage layer/(SiO2 layer) comprises LaO, AlO, SiO, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Fig.18A).
With respect to claim 5, Pesic discloses, in Figs.1-20, the capacitor, wherein a material of the second storage layer/(HfO layer) comprises ZrO, HfO, HfZrO, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Fig.18A).
With respect to claim 6, Pesic discloses, in Figs.1-20, the capacitor, wherein the dopant in the first storage layer and the dopant in the second storage layer respectively comprise La, Al, Si, or a combination thereof (see Par.[0107] wherein hafnium oxide, silicon oxide, and titanium oxide are used as examples for materials in the ISM, other materials having similar properties may be used as substitutes; the hafnium oxide may be replaced with materials such as ZrOx, HfOx, ZrOx doped with various elements such as Si, Al, Y, Sr, Gd, N, La, and/or any combination of these materials).
With respect to claim 8, Pesic discloses, in Figs.1-20, the capacitor, wherein the composite storage layer further comprises a blocking layer/(middle HfO2 layer) sandwiched between the first storage layer and the second storage layer (see Fig.18A).
With respect to claim 9, Pesic discloses, in Figs.1-20, the capacitor, wherein a material of the blocking layer comprise AlO, Y2O3, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Fig.18A).
Claims 1-5, 8-13, 15-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jeng et al. (US 2023/0154972 A1 hereinafter referred to as “Jeng”).
The applied reference has a common Assignee Information Name: Taiwan Semiconductor Manufacturing Company, Ltd. with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
With respect to claim 1, Jeng discloses, in Figs.1A-5, a capacitor, comprising: a first electrode (132); a second electrode (136) over the first electrode (132); and a composite storage layer (134) sandwiched between the first electrode (132) and the second electrode (136), comprising: a first storage layer (233) in physical contact with the first electrode (132); and a second storage layer (231) in physical contact with the second electrode (136), wherein a conduction band offset of the first storage layer (233) is greater than a conduction band offset of the second storage layer (231), and a dielectric constant of the second storage layer (231) is greater than a dielectric constant of the first storage layer (233) (see Fig.4, Par.[0025]-[0028] wherein an insulating layer 116 and an interconnect structure 120 are successively formed over the insulating layer 102, as shown in FIG. 1B in accordance with some embodiments; the interconnect structure 120 that is electrically connected to the contact structures 111 may be used as a redistribution (RDL) structure for routing; the insulating layer 116 may be a single layer or a multi-layer structure and be formed of silicon oxide, silicon carbide (SiC), silicon nitride (Si.sub.xN.sub.y), silicon oxynitride, or low-k dielectric materials), comprising; dielectric layers (134); and a first capacitor (240) embedded in the dielectric layers (134) (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 2, Jeng discloses, in Figs.1A-5, the capacitor, wherein a first voltage is applied to the first electrode, a second voltage is applied to the second electrode, and the second voltage is greater than the first voltage (see Par.[0019] wherein the semiconductor device structure 200 includes a capacitor device 140 (such as a MIM or MIS capacitor device) formed over semiconductor devices; in capacitor anode is positively charged and cathode is negative charged).
With respect to claim 3, Jeng discloses, in Figs.1A-5, the capacitor, wherein the first voltage is a negative voltage and the second voltage is a positive voltage (see Par.[0019] wherein the semiconductor device structure 200 includes a capacitor device 140 (such as a MIM or MIS capacitor device) formed over semiconductor devices; in capacitor anode is positively chaged and cathode is negative charged).
With respect to claim 4, Jeng discloses, in Figs.1A-5, the capacitor, wherein a material of the first storage layer comprises LaO, AlO, SiO, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 5, Jeng discloses, in Figs.1A-5, the capacitor, wherein a material of the second storage layer comprises ZrO, HfO, HfZrO, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 8, Jeng discloses, in Figs.1A-5, the capacitor, wherein the composite storage layer/(middle 231 and 233 layers) further comprises a blocking layer sandwiched between the first storage layer and the second storage layer (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 9, Jeng discloses, in Figs.1A-5, the capacitor, wherein a material of the blocking layer comprise AlO, Y2O3, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 10, Jeng discloses, in Figs.1A-5, an integrated circuit, comprising: a substrate (100); a transistor (110) over the substrate (100) (see Par.[0019], [0022]-[0023] wherein source and drain regions 108 are formed in the substrate 100 and next to the corresponding gate structure 110 prior to the formation of the insulating layer 102 and after the formation of the gate structures 110; the gate structure 110 embedded in the insulating layer 102 and the corresponding source and drain regions 108 formed in the substrate 100 forms a transistor); and an interconnect structure (120) disposed on the substrate (100) (see Par.[0025]-[0028] wherein an insulating layer 116 and an interconnect structure 120 are successively formed over the insulating layer 102, as shown in FIG. 1B in accordance with some embodiments; the interconnect structure 120 that is electrically connected to the contact structures 111 may be used as a redistribution (RDL) structure for routing; the insulating layer 116 may be a single layer or a multi-layer structure and be formed of silicon oxide, silicon carbide (SiC), silicon nitride (Si.sub.xN.sub.y), silicon oxynitride, or low-k dielectric materials), comprising; dielectric layers (134); and a first capacitor (240) embedded in the dielectric layers (134) (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure), comprising: a first electrode (132); a first storage layer (231) on the first electrode (132); a second electrode (136) over the first storage layer (231); and a second storage layer (233) between the first storage layer (231) and the second electrode (136), wherein a material of the first storage layer (231) is different from a material of the second storage layer (233) (see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 11, Jeng discloses, in Figs.1A-5, the integrated circuit, wherein a conduction band offset of the first storage layer is greater than a conduction band offset of the second storage layer, and a dielectric constant of the second storage layer is greater than a dielectric constant of the first storage layer (see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 12, Jeng discloses, in Figs.1A-5, the integrated circuit, wherein a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode (see Par.[0019] wherein the semiconductor device structure 200 includes a capacitor device 140 (such as a MIM or MIS capacitor device) formed over semiconductor devices; in capacitor anode is positively charged and cathode is negative charged).
With respect to claim 13, Jeng discloses, in Figs.1A-5, the integrated circuit, wherein a material of the first storage layer comprises LaO, AlO, SiO, HfO having a dopant, ZrO having a dopant, or a combination thereof, and a material of the second storage layer comprises ZrO, HfO, HfZrO, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 15, Jeng discloses, in Figs.1A-5, the capacitor, wherein the composite storage layer/(middle 231 and 233 layers) further comprises a blocking layer sandwiched between the first storage layer and the second storage layer (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 16, Jeng discloses, in Figs.1A-5, the capacitor, wherein a material of the blocking layer comprise AlO, Y2O3, HfO having a dopant, ZrO having a dopant, or a combination thereof (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 17, Jeng discloses, in Figs.1A-5, the integrated circuit, wherein the interconnect structure further comprises a second capacitor over the first capacitor and embedded in the dielectric layers, and the second capacitor comprises: a third electrode; a third storage layer on the third electrode; a fourth electrode over the third storage layer; and a fourth storage layer between the third storage layer and the fourth electrode, wherein a conduction band offset of the third storage layer is greater than a conduction band offset of the fourth storage layer, and a dielectric constant of the fourth storage layer is greater than a dielectric constant of the third storage layer (see Par.[0036] wherein the capacitor insulating stack 134 that has a multi-layer structure includes first layers (which are also referred to first capacitor dielectric layers) alternatingly stacked with second layers (which are also referred to second capacitor dielectric layers); moreover, the first capacitor dielectric layer is made of a different material than the second capacitor dielectric layer; as a result, the dielectric constant of the first capacitor dielectric layer is different than the dielectric constant of the second capacitor dielectric layer. Moreover, the lattice constant of the first capacitor dielectric layer is also different than the lattice constant of the second capacitor dielectric layer).
With respect to claim 18, Jeng discloses, in Figs.1A-5, a manufacturing method of an integrated circuit, comprising: providing a substrate (100); forming a transistor (108) over the substrate (100) (see Par.[0019], [0022]-[0023] wherein source and drain regions 108 are formed in the substrate 100 and next to the corresponding gate structure 110 prior to the formation of the insulating layer 102 and after the formation of the gate structures 110; the gate structure 110 embedded in the insulating layer 102 and the corresponding source and drain regions 108 formed in the substrate 100 forms a transistor); and forming an interconnect structure (120) over the substrate (100), comprising: forming dielectric layers; and forming a capacitor in the dielectric layers (see Par.[0025]-[0028] wherein an insulating layer 116 and an interconnect structure 120 are successively formed over the insulating layer 102, as shown in FIG. 1B in accordance with some embodiments; the interconnect structure 120 that is electrically connected to the contact structures 111 may be used as a redistribution (RDL) structure for routing; the insulating layer 116 may be a single layer or a multi-layer structure and be formed of silicon oxide, silicon carbide (SiC), silicon nitride (Si.sub.xN.sub.y), silicon oxynitride, or low-k dielectric materials), comprising: depositing a first electrode (132); forming a composite storage layer (134) on the first electrode (132) (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure), comprising: depositing a first storage layer (231) on the first electrode (132); and depositing a second storage layer (233) over the first storage layer (231), wherein a material of the first storage layer is different from a material of the second storage layer; and depositing a second electrode on the composite storage layer (see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 19, Jeng discloses, in Figs.1A-5, the method, wherein a conduction band offset of the first storage layer is greater than a conduction band offset of the second storage layer, and a dielectric constant of the second storage layer is greater than a dielectric constant of the first storage layer (see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
With respect to claim 20, Jeng discloses, in Figs.1A-5, the method, wherein forming the composite storage layer further comprises: depositing a blocking layer on the first storage layer prior to the deposition of the second storage layer (see Par.[0032] wherein a capacitor insulating stack 134 is formed over the capacitor electrode layer 132, and a capacitor electrode layer 136 is formed over the capacitor insulating stack 134, as shown in FIG. 1D in accordance with some embodiments of the disclosure; see Par.[0030]-[0039] wherein the capacitor electrode layers 132, 133 are made of a metal or metal alloy, including titanium (Ti), tantalum (Ta), copper (Cu), platinum (Pt), tungsten (W), aluminum (Al), titanium nitride (TiN), tantalum nitride (TaN), tantalum aluminum nitride (TaAlN), copper alloy, aluminum (Al) alloy, copper aluminum alloy (AlCu), or tungsten (W) alloy or another applicable material; the capacitor insulating stack 134 has a multi-layer structure and is made of high-k dielectric materials; the high-k dielectric material has a dielectric constant (k value) that is substantially equal to or greater than 4; examples of high-k dielectric material may include hafnium oxide (HfO.sub.2), zirconium oxide (ZrO.sub.2), aluminum oxide (Al.sub.2O.sub.3), lanthanum oxide (La.sub.2O.sub.3), lanthanum aluminum oxide (LaAlO.sub.3), titanium oxide (Ti.sub.xO.sub.y, wherein x is a real number and y is a real number), tantalum oxide (Ta.sub.xO.sub.y, wherein x is a real number and y is a real number), titanium oxide nitride (Ti.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number), tantalum oxide nitride (Ta.sub.xO.sub.yN.sub.z, wherein x is a real number, y is a real number and z is a real number) and the like; the capacitor dielectric layer 231 is made of HfO.sub.2, and the capacitor dielectric layer 233 is made of ZrO.sub.2; in this case, the dielectric constant of the capacitor dielectric layer HfO2 231 (i.e.; K= 16-20) is lower than the dielectric constant of the capacitor dielectric layer ZrO2 233 (i.e.; K=33); further, the lattice constant of the capacitor dielectric layer 231 is also lower than the lattice constant of the capacitor dielectric layer 233; further, it is submitted that band gap of ZrO2 is approximately 5.2 eV and band gap of HfO2 is 3.6-5.6 eV (monoclinic phase= 5.6eV; cubic phase = 3.65eV and tetragonal phase =4.62eV)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Jeng in view of Pesic.
With respect to claim 14, Jeng discloses all the claimed limitations of claim 10. However, Jeng does not explicitly disclose the limitation of claim 14.
Pesic discloses, in Figs.1-20, the capacitor, wherein the dopant in the first storage layer and the dopant in the second storage layer respectively comprise La, Al, Si, or a combination thereof (see Par.[0107] wherein hafnium oxide, silicon oxide, and titanium oxide are used as examples for materials in the ISM, other materials having similar properties may be used as substitutes; the hafnium oxide may be replaced with materials such as ZrOx, HfOx, ZrOx doped with various elements such as Si, Al, Y, Sr, Gd, N, La, and/or any combination of these materials).
Jeng and Pesic are analogous art because they are all directed to a memory device, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Jeng to include Pesic because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify charge layer material composition in Jeng by including doping species within charge layer as taught by pesic in order to advantage offered by doping in charge layer (e.g.; Si-doped HfO2) in memory thereby improve charge injection efficiency, reduce leakage, enhance programming/eracing speed, and increase memory window charge retention.
Citation of Pertinent prior Art
The prior art made of record (e.g.; see PTO-892) and not relied upon is considered pertinent to applicant's disclosure.
Examiner’s Telephone/Fax Contacts
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOULOUCOULAYE INOUSSA whose telephone number is (571)272-0596. The examiner can normally be reached Monday-Friday (10-18).
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/Mouloucoulaye Inoussa/ Primary Examiner, Art Unit 2818
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