DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 8 is objected to because of the following informalities: a typographical error, “the plurality of dummy pixel” in line 4 should be the plurality of dummy pixels. Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-14 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 10,916,595, hereafter ‘595. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-20 of ‘595 disclose or make obvious claims 1-14 of the instant application.
Claim 1 is obvious over claims 1, 3, and 17 of ‘595.
Claim 2 is obvious over claim 1 of ‘595.
Claim 3 is obvious over claim 2 of ‘595.
Claim 4 is obvious over claim 3 of ‘595.
Claim 5 is obvious over claim 4 of ‘595.
Claim 6 is obvious over claim 17 of ‘595.
Claim 7 is obvious over claims 17 and 18 of ‘595.
Claim 8 is obvious over claim 19 of ‘595.
Claim 9 is obvious over claims 1, 3, and 17 of ‘595.
Claim 10 is obvious over claims 1, 3, 17, and 22 of ‘595
Claim 11 is obvious over claims 1, 3, 17, and 22 of ‘595.
Claim 12 is obvious over claims 4, 1, 3, 17, and 22 of ‘595.
Claim 13 is obvious over claims 1, 3, 17, and 22 of ‘595.
Claim 14 is obvious over claims 1, 3, 17, and 22 of ‘595.
Claims 1-14 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-22 of U.S. Patent No. 11,653,549, hereafter ‘549. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-22 of ‘549 disclose or make obvious claims 1-14 of the instant application.
Claim 1 is obvious over claims 1, 3, and 4 of ‘549.
Claim 2 is obvious over claims 1, 3, and 4 of ‘549.
Claim 3 is obvious over claim 2 of ‘549.
Claim 4 is obvious over claims 1, 3, and 4 of ‘549.
Claim 5 is obvious over claim 4 of ‘549.
Claim 6 is obvious over claim 17 of ‘549.
Claim 7 is obvious over claims 17 and 18 of ‘549.
Claim 8 is obvious over claim 19 of ‘549.
Claim 9 is obvious over claims 1, 3, and 17 of ‘.
Claim 10 is obvious over claims 1, 3, 17, and 22 of ‘549
Claim 11 is obvious over claims 1, 3, 17, and 22 of ‘549.
Claim 12 is obvious over claims 4, 1, 3, 17, and 22 of ‘549.
Claim 13 is obvious over claims 1, 3, 17, and 22 of ‘549.
Claim 14 is obvious over claims 1, 3, 17, and 22 of ‘549.
Claims 1-9 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-9 of U.S. Patent No. 12,035,607, hereafter ‘607. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-9 of ‘607 disclose or make obvious claims 1-9 of the instant application.
Claim 1 is disclosed by claim 1 of ‘607.
Claims 2-9 are identical to corresponding claims of ‘607.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 10-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kanaya, U.S. Pat. Pub. 2018/0151834.
Regarding claim 1, Kanaya discloses (Figs 1-4) a display device, comprising:
a substrate [112], [101];
a non-display portion (portion without pixels [109] in Fig. 3) defined in the substrate;
a insulating (par. [0041]) layer [123] disposed on the substrate;
a plurality of pixels [109] surrounding at least a portion of the non-display portion (section without pixels [109] in Fig. 3); and
a plurality of dummy pixels [D] disposed between the non-display portion and the plurality of
pixels (par. [0059], Fig. 4),
wherein each pixel comprises (Fig. 2, par. [0035]-[0036], [0045]-[0048]) a light-emitting element [130] comprising a pixel electrode [125] , a plurality of openings (in layer [126], par. [0045]) disposed on the insulating layer [123] and exposing the pixel electrode [125] (see Fig. 2), and a first pixel circuit (par. [0055], e.g., pixel circuit that includes the TFTs [120]) disposed on the substrate [112],[101],
wherein each dummy pixel [D] comprises a second pixel circuit [142] (Fig. 4) disposed on the substrate, and
wherein a surface of the insulating layer [123] corresponding to one of the plurality of dummy
pixels [D] is flat (par. [0041]).
Regarding claim 2, Kanaya further discloses (Figs 2, 3) each pixel [109] further comprises an opposite electrode [128] facing the pixel electrode [125], and an emission layer [127] (par. [0046]) disposed between the pixel electrode [125] and the opposite electrode [128].
Regarding claim 10, Kanaya discloses (Figs 1-4) a display device, comprising:
a substrate [112], [101];
a non-display portion (portion without pixels [109] in Fig. 3) defined on the substrate
an insulating (par. [0041]) layer [123] disposed on the substrate;
a plurality of pixels [109] surrounding at least a portion of the non-display portion (see Fig. 3); and
a plurality of dummy pixels [D] disposed between the non-display portion and the pixels (Figs 3,4, par. [0059]),
wherein the insulating layer [123] has an opening portion (par. [0042]-[0043]) disposed under each of the plurality of pixels [109] (see Fig. 2), and does not have the opening portion disposed under one of the plurality of dummy pixels [109] (see Fig. 4).
Regarding claim 11, Kanaya further discloses (Figs 2, 3) each pixel [109] further comprises an opposite electrode [128] facing the pixel electrode [125], and an emission layer [127] (par. [0046]) disposed between the pixel electrode [125] and the opposite electrode [128].
Regarding claim 12, Kanaya further discloses (Figs 2,3) wherein the pixel electrode [125] and the first pixel circuit [120] are connected with each other through the opening portion (par. [0042]-[0043], shown in Fig. 2 without a reference label).
Regarding claim 13, Kanaya further discloses further discloses (Fig. 4) wherein each dummy pixel [D] comprises a second pixel circuit [142] disposed on the substrate [112],[101].
Regarding claim 14, Kanaya further discloses (par. [0041], the planarization film can be multiple layers) further comprising an additional insulating layer on the insulating layer,
wherein a surface of the additional insulating layer corresponding to one of the plurality
of dummy pixels is flat (the multilayer planarization layer [123] is flat).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Kanaya, U.S. Pat. Pub. 2018/0151834, hereafter Kanaya
Regarding claim 8, Kanaya discloses everything as applied above. Kanaya further discloses (Fig. 17) wherein the non-display portion comprises:
a first through hole [110]; and
a second through hole [110] disposed adjacent to the first through hole (6 through holes are shown in Fig. 17).
The limitation
“wherein at least one of the plurality of dummy pixels is disposed between the first through
hole and the second through hole” is obvious over Kanaya because one would expect 2 of the dummy pixels [D] to be arranged horizontally, as shown in Fig. 4, and 2 arranged vertically on either side of both first and second through holes [110] in Fig. 17, and this limitation would be met.
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to combine embodiments of Kanaya and arrange multiple through holes in the display device to strengthen structural integrity of the DISPLAY device.
Claims 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Kanaya, U.S. Pat. Pub. 2018/0151834, hereafter Kanaya, in view of Yu et. al., U.S. Pat. Pub. 2018/0323247, hereafter Yu.
Regarding claim 3, Kanaya discloses everything as applied above. Kanaya fails to explicitly disclose wherein the dummy pixels are disposed successive with the pixels.
However, Yu discloses (Figs 14-15) wherein the dummy pixels [DZ] are disposed successive with the pixels [PAZ].
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to make dummy pixels and pixels identical, because Yu teaches (par. [0222]-[0224] that these can be made through the same process, which would simplify manufacturing of the display device.
Regarding claim 4, Kanaya discloses everything as applied above. Kanaya further discloses (Fig. 2) wherein a first pixel [109] from among the plurality of pixels is electrically connected to the
first pixel circuit [120], and (Fig. 4) a first dummy pixel [D] from among the plurality of dummy pixels is
electrically insulated [123] from the second pixel circuit [142].
Kanaya fails to explicitly disclose wherein each of the first pixel circuit and the
second pixel circuit comprises a thin film transistor disposed on the substrate.
However, Yu discloses (Figs 14-16) wherein each of the first pixel circuit [PAZ] and the
second pixel circuit [DZ] comprises a thin film transistor [TFT] disposed on the substrate.
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to make dummy pixels and pixels identical, because Yu teaches (par. [0222]-[0224] that these can be made through the same process, which would simplify manufacturing of the display device.
Regarding claim 5, Kanaya in view of Yu discloses everything as applied above. Kanaya further discloses (Figs 2, 4)
further comprising:
a via layer [123] (par. [0041], for a stacked layer structure, via layer may be the top layer of the stack) covering the first pixel circuit [120] and the second pixel circuit,
wherein the via layer planarizes a top surface of the via layer, and comprises a contact
hole (not labeled) that electrically connects the first pixel [125] to the first pixel circuit [120],
wherein the contact hole is not disposed (Fig. 4) in the via layer [123] corresponding to one of the
plurality of dummy pixels [D].
Claims 6-7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Kanaya, U.S. Pat. Pub. 2018/0151834, hereafter Kanaya, in view of Kim et. al., U.S. Pat. Pub. 2017/0288004, hereafter Kim.
Regarding claim 6, Kanaya discloses everything as applied above. Kanaya fails to explicitly
disclose further comprising a display area surrounding at least a portion of the non-display portion and a
non-display area disposed adjacent to the display area, wherein the non-display area comprises a first
non-display area surrounding at least a portion of an outer edge of the display area comprising an edge
of the substrate, and a second non-display area surrounding at least a portion of an outer edge of the
non-display portion between the non-display portion and the display area.
However, Kim discloses (Figs 19-20) further comprising a display area [DA] surrounding at least a portion of the non-display portion [NDA2] and a non-display area [NDA] disposed adjacent to the display area [DA], wherein the non-display area comprises a first non-display area [NDA1] surrounding at least a portion of an outer edge of the display area [DA] comprising an edge of the substrate [100], and a second non-display area [NDA2] surrounding at least a portion of an outer edge of the non-display portion between the non-display portion [NDA] and the display area [DA].
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to modify the device of Kanaya with the teachings of two-portion Non-display area of Kim, because Kim teaches (par. [0030]) that such a modification may prevent crack from occurring or propagating along surroundings of the through portion. As understood by a person of ordinary skill in the art, the scope of the inventive concept is not limited by this effect.
Regarding claim 7, Kanaya in view of Kim discloses everything as applied above. Kim further discloses (Figs 19,20) wherein the non-display portion [NDA] is disposed adjacent to the edge of the substrate, and the first non-display area [NDA1] is connected to the second non-display area [NDA2].
Regarding claim 9, Kanaya discloses everything as applied above. Kanaya fails to explicitly disclose wherein an edge of the non-display portion comprises a single closed curve.
However, Kim discloses (Fig. 19) wherein an edge of the non-display portion [NDA] comprises a single closed curve.
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to modify the device of Kanaya with the teachings of two-portion Non-display area of Kim, because Kim teaches (par. [0030]) that such a modification may prevent crack from occurring or propagating along surroundings of the through portion. As understood by a person of ordinary skill in the art, the scope of the inventive concept is not limited by this effect.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR V BARZYKIN whose telephone number is (571)272-0508. The examiner can normally be reached Monday-Friday, 9am-5pm.
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/VICTOR V BARZYKIN/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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