Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Election was made without traverse in the reply filed on 6/24/2026. Applicant has elected Group I, corresponding to claims 1-16. Invention Group II, corresponding to claims 17-20, is withdrawn from further consideration, albeit the applicant canceled claims 17-20. Finally, the examiner also acknowledges new claims 21-24, which are deemed to be part of the Group I elected invention group.
Drawings
The drawings submitted on 3/8/2024 have been accepted by the examiner.
Information Disclosure Statement
The information disclosure statements (IDS) submitted up to this point have been considered by the examiner.
Specification
The disclosure is objected to because of the following informalities:
Reference numeral 802 appears in Fig. 14 but it is not described.
Reference numeral 602 is used inconsistently between paragraphs [0036-41]; including with “protective metal oxide layer” and “protective oxide layer”
The text of [0041] describes the formation of layer 702 in Fig. 11, but that appears to be a step in Fig. 10.
Appropriate correction is required.
Claim Objections
Claim 1 is objected to because of the following informalities:
The claim language “comprises forming a first metal oxide layer” and “comprises forming a second metal oxide layer” should be changed to “comprising…” so as to use standard American English.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the dielectric oxide" in lines 7-8.
Claim 6 recites the limitation "the dielectric oxide" in line 1.
There is insufficient antecedent basis for this limitation in the claim.
For the sake of compact prosecution, the examiner proposes that this language be treated as if it were the “dielectric oxide layer”, which was recited in claim 1.
Regarding Claim 9, the applicant recites “wherein depositing a high-k dielectric layer on sidewalls of the isolation structure” and this needs revision in order to make sense. For the sake of compact prosecution, the examiner proposes “further comprising
Claims 2-10 inherit the same issues from claim 1 and are rejected at least based on that dependency.
Allowable Subject Matter
Claims 11-16 and 21-24 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding Claim 11, although the prior art shows substantial features of the claimed invention, the prior art reviewed by the examiner neither teaches nor reasonably suggests all the claimed limitations, including forming a second protective layer on a portion of the first protective layer exposed during forming of the poly-cut opening.
Regarding Claim 21, Chen-235 (US # 20250040235) teaches a method of fabricating a semiconductor device (method of manufacturing an integrated circuit device; [0010]; FIGS. 1-16C), comprising:
forming first and second superlattice structures (semiconductor fins FS, FIG. 2, each including a portion of the epitaxial stack 120; [0018]) on a substrate (substrate 110; [0012]; FIG. 1), the first and second superlattice structures each comprising alternating channel layers (epitaxial layers 124, see [0016]; FIG. 1) and sacrificial layers (122; [0013-16]);
forming a protective oxide layer (dielectric feature 142; [0022] and see FIG. 4) over the first and second superlattice structures (shown);
forming an isolation opening (gate trench GT1; see Fig. 8) extending between the first and second superlattice structures and through a polysilicon structure (dummy feature 144, [0023]) disposed on the protective oxide layer (shown in Fig. 4);
filling the isolation opening with a dielectric material (material of feature 190; [0033]; FIG. 9);
forming an isolation structure (190) having an enlarged upper portion and a narrower lower portion extending between the first and second superlattice structures (see ledge of feature 190 on top of stack 120; contrast with smaller width 190W);
removing portions (portions 142B of dummy gate dielectric layer 142) of the protective oxide layer outside the isolation structure (see Figs. 10-11);
removing the sacrificial layers to form gate openings (O1 in Fig. 11B; [0035]); and
forming gate structures (200; [0040], Figs. 13) in the gate openings.
Although the prior art shows substantial features of the claimed invention, the prior art reviewed by the examiner neither teaches nor reasonably suggests all the claimed limitations, including recessing an upper portion of the dielectric material to form an isolation structure having an enlarged upper portion and a narrower lower portion extending between the first and second superlattice structures
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claims 1-10 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is an examiner’s statement of reasons for allowance or for claims that contain allowable subject-matter subject to a 112(b) rejection:
Regarding Claim 1, although the prior art shows substantial features of the claimed invention, the prior art reviewed by the examiner neither teaches nor reasonably suggests all the claimed limitations, including forming a first metal oxide layer on a first portion of the dielectric oxide exposed during forming of the first isolation opening; and forming a second metal oxide layer on a second portion of the dielectric oxide layer exposed during forming of the second isolation opening.
As allowable subject matter has been indicated, applicant's reply must either comply with all formal requirements or specifically traverse each requirement not complied with. See 37 CFR 1.111(b) and MPEP § 707.07(a).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20200258745 A1
US 20260223446 A1
US 20220406900 A1
US 9818836 B1
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER A JOHNSON whose telephone number is (571)272-9475. The examiner can normally be reached normally working Monday to Friday between 9 am and 6 pm Eastern Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHRISTOPHER A JOHNSON/Primary Examiner, Art Unit 2899
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