Prosecution Insights
Last updated: October 27, 2026
Application No. 18/604,947

ISOLATION STRUCTURE FOR MULTI-VOLTAGE INTEGRATED CIRCUIT

Final Rejection §103
Filed
Mar 14, 2024
Examiner
AHMADI, MOHSEN
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Globalfoundries U S Inc.
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
410 granted / 472 resolved
+18.9% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
23 currently pending
Career history
501
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
51.4%
+11.4% vs TC avg
§102
27.4%
-12.6% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 472 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Applicant’s response of 09/30/2026 has been entered in the record and considered. With respect to the rejection claims 35 USC 102 (a)(1) is withdrawn in view of applicants’ amendments. The following new rejection to claims 1 and 8-10 is under 35 USC 103 (a). Claims 1-20 are under consideration. Claims 2-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 11-20 are allowed. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2018/0323187 to Moen et al. (Moen) in view of US Pub # 2020/0176562 to Chen et al. (Chen). Regarding independent claim 1, Moen discloses a structure (Fig. 3A) comprising: a semiconductor body (upper body of 315 through which 352 is extended, see Examiner’s Mark-up below); and an isolation structure including: a trench isolation region (Fig. 3A: 352) extending through the semiconductor body (upper body of 315) to an insulator layer (361 or 362 is considered to be an insulator layer, 361 and 362 comprises insulating material), wherein the trench isolation region (352) has a first edge (see Examiner’s Mark-up below) and a second edge (see Examiner’s Mark-up below) opposite the first edge; and isolating first transistors (Fig. 3A: 311-314) connected in series (¶0042) on a first portion of the semiconductor body (upper body of 315) adjacent to the first edge. Moen does not expressly disclose wherein the isolating first transistors are connected to continuously receive a supply voltage that continuously maintains the isolating first transistors in an off state. However, Chen teaches a fixed electrical connection configured to continuously receive a supply voltage that maintains an associated channel in an off state (isolation gate 440 electrically connected through metal interconnect 445 to power rail 450, Figs. 4A-4B and ¶0077-0078), thereby teaching a fixed-bias arrangement for continuously maintaining the channel in an off-state to provide electrical isolation. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the isolating first transistors (311-314) of Moen to be connected to continuously receive a supply voltage that continuously maintains the isolating first transistors in an off state, as suggested by the fixed-bias isolation technique of Chen, in order to provide continuous electrical isolation and prevent unwanted conduction through the transistors (Chen, ¶0078). PNG media_image1.png 423 975 media_image1.png Greyscale Regarding claim 8, Moen discloses a semiconductor substrate (entire 301considered to be a semiconductor substrate) and a well region (Fig. 3A: 554) in the semiconductor substrate below the isolation structure (352). Regarding claim 9, Moen discloses wherein the well region (Fig. 3A: 554) is a P-type well region (¶0043). Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2018/0323187 to Moen et al. (Moen) in view of US Pub # 2020/0176562 to Chen et al. (Chen) and further in view of US Pub # 2014/0266394 to Den Besten (Den Besten). Regarding claim 10, Moen discloses the structure of claim 8, as discussed above, including a well region (P-type region 554, Fig. 3A, ¶0043). Moen does not expressly disclose a well tap immediately adjacent to the well region, wherein the well tap is connected to receive a back gate bias voltage. However, Den Besten teaches a well tap immediately adjacent to the well region (P-type well tap disposed in the P-well region PW, Fig. 5B), wherein the well tap is connected to receive a back gate bias voltage (second P-type well tap providing DC bias voltage Vbias2 to the back-gate terminal through resistor R, Figs. 4D and 5B). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the well region (554) of Moen to include a well tap immediately adjacent to the well region and connected to receive a back gate bias voltage, as taught by Den Besten, in order to provide controlled biasing of the P-type well region and improve the electrical performance of the semiconductor structure by reducing parasitic signal loading, as taught by Den Besten (Figs. 4D and 5B and ¶0054, 0056 and 0058). Allowable Subject Matter Claims 11-20 are allowed. The examiner’s reasons for independent claims 11 and 20 and their respective dependent claims are of record in the July 07, 2026 Office action. Claim 11 has been amended to incorporate subject matter formerly indicated allowable from claim 14 and is similarly allowable for the reasons of record. Claims 2-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 2 recites: “wherein the isolating first transistors are P-channel field effect transistors, wherein the structure further includes a first bias voltage node electrically connected to a first source region in the first portion of the semiconductor body proximal to the first edge and first gates of the isolating first transistors, and wherein the first bias voltage node is connected to receive a first positive supply voltage to maintain the isolating first transistors in the off state.” The considered prior art of record appears to fail to teach or render obvious the instant limitation in combination with all of the limitations of the independent claim. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Nagasato et al. (US Pat # 9,666,580), Agrawal (US Pat # 9,385,708), Kumar (US Pub # 2015/0263707), Mallikarjunaswamy (US Pat # 8,174,070), Itoh et al. (US Pat # 7,759,714), Yang (U.S. Pat # 7,535,057), Rao et al. (U.S. Pat# 6,522,582), Srinivasan et al. (U.S. Pat # 6,294,817) and Davis et al. (U.S. Pat # 5,892,264). Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHSEN AHMADI whose telephone number is (571)272-5062. The examiner can normally be reached M-F: 9:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William F Kraig can be reached at 571-272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHSEN AHMADI/ Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Mar 14, 2024
Application Filed
Jul 07, 2026
Non-Final Rejection mailed — §103
Sep 30, 2026
Response Filed
Oct 16, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
96%
With Interview (+9.5%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 472 resolved cases by this examiner. Grant probability derived from career allowance rate.

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