DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Status of the application
This office Action is in response to Applicant's Application filled on 03/12/2026 Claims 1-20 are pending for this examination.
Response to Arguments
Applicant’s reply filed on 03/12/2026 has been entered and considered. Applicant’s amendments necessitated the shift in grounds of rejection detailed below. The shift in grounds of rejection renders Applicant’s arguments moot. Thus, this rejection is properly made FINAL.
Claim Rejection- 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Seddon et al (US 2013/0337633 A1; hereafter Seddon) in view of YU et al (US 2015/0364376 A1; hereafter Yu).
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Regarding claim 1. Seddon discloses a semiconductor die, comprising:
a first portion defined by a cut (Fig 5, trenches 27, Para [ 0019-0026]) within a semiconductor wafer (Fig 5, a semiconductor substrate 18, Para [ 0017]), the cut defined (Fig 5, trenches 27, Para [ 0019-0026]) by a partial dicing operation performed on a first surface of the semiconductor wafer (Fig 5, trenches 27, Para [ 0019-0026]), the first surface being aligned along a plane, the cut having a depth less than a thickness of the semiconductor wafer (Fig 5, trenches 27, Para [ 0019-0026]), the cut having a first cross-section non-parallel to the plane (Fig 5, trenches 27, Para [ 0019-0026], construed as first cross-section); and
a second portion defined by a cleave (Fig 5, region 63/64, Para [ 0019-0026]), the cleave defined by a cleaving operation performed on a second surface of the semiconductor wafer (Fig 5, region 63/64, Para [ 0019-0026]), the second surface being opposite the first surface, the cleave having a second cross-section (Fig 5, region 63/64, Para [ 0019-0026], have second cross-section) aligned non-parallel to the plane (Fig 5, region 63/64, Para [ 0019-0026]), the second cross-section (Fig 5, region 63/64, Para [ 0019-0026] , have second cross-section) being indicative of the cleave having originated from the second surface (Fig 5, region 63/64, Para [ 0019-0026]).
Examiner like to note that, claim 1 contain(s) process limitations “the cut defined by a partial dicing operation performed on a first surface of the silicon carbide (SiC) semiconductor wafer……………….. the cleave defined by a cleaving operation performed on a second surface of the silicon carbide (SiC) semiconductor wafer, and the second cross-section being indicative of the cleave having originated from the second surface” These limitations invoke the Product-by-Process doctrine. Product-by-process limitations are not limited by the manipulations of the recited steps, only the structure implied by the steps (MPEP 2113). Specifically, “the cut defined by a partial dicing operation performed on a first surface of the silicon carbide (SiC) semiconductor wafer………………..the cleave defined by a cleaving operation performed on a second surface of the silicon carbide (SiC) semiconductor wafer, and the second cross-section being indicative of the cleave having originated from the second surface”, does not appear to structurally distinguish the invention over the resulting structure produced by the prior art. The burden to show that the claimed method necessarily distinguishes over the prior art is on the applicant.
But Seddon does not disclose explicitly silicon carbide (Sic) semiconductor die and substrate is a silicon carbide (SiC).
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In a similar field of endeavor, Yu discloses silicon carbide (Sic) semiconductor die (Para [ 0021-0024]) and substrate is a silicon carbide (Para [0024] discloses “substrate” refers to a bulk substrate on which various layers and device structure are formed. In some embodiments, the bulk substrate includes silicon or a compound semiconductor, such as Ga As, InP, Si/Ge, or SiC).
Since Seddon and Yu are both from the similar field of endeavor, and using dicing to separate each individual die, the purpose disclosed by YU would have been recognized in the pertinent art of Seddon. Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon in light of YU teaching “silicon carbide (Sic) semiconductor die (Para [ 0021-0024]) and substrate is a silicon carbide (Para [0024] discloses “substrate” refers to a bulk substrate on which various layers and device structure are formed. In some embodiments, the bulk substrate includes silicon or a compound semiconductor, such as Ga As, InP, Si/Ge, or SiC)” for further advantage such as to manufacture reliable semiconductor device by using well-known material. The applicant is reminded, in this regard, that it has been held that a mere selection of known materials generally understood to be suitable to make a device, the selection of the particular material being on the basis of suitability for the intended use, would be entirely obvious. See In re Leshin 227 F.2d 197, 125 USPQ 416 (CCPA 1960) and also Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). (See. MPEP.2144.07).
Regarding claim 2. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 1, Seddon further disclose wherein the first cross-section has a substantially vertical sidewall (Fig 5, trenches 27, Para [ 0019-0026], construed as first cross-section).
Regarding claim 3. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 2, Seddon further disclose wherein the second cross-section (Fig 5, region 63/64, Para [ 0019-0026], have second cross-section) has a substantially vertical sidewall (Fig 5, region 63/64, Para [ 0019-0026], have second cross-section), and wherein the cleave has a second width (Fig 5, region 63/64, Para [ 0019-0026], have second cross-section) different from a first width of the cut (Fig 5, trenches 27, Para [ 0019-0026], construed as first cross-section).
Regarding claim 4. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 3, YU further discloses wherein the substantially vertical sidewall of the second cross-section is offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width (Para [ 0061] discloses “the first recess 130 and the second recess 140 share the same central axis A. Since the width W1 of the first blade and the width W2 of the second blade are difference, the width difference between the first recess 130 and the second recess 140 is predetermined and forms two notches 134 facing each other. Because the width difference is predetermined, the width of the notch 134 is also predetermined accordingly so as to avoid corner hitting between the detached die and adjacent dies. Therefore, based on the width difference is predetermined, offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width can be achieved).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon in light of Yu teaching to achieve desire offset difference between the first width and the second width for further advantage such as avoid corner hitting between the detached die and adjacent dies and desired recess shape.
In addition, the instant application specification contains no disclosure of either the critical nature of the claimed relative thickness i.e., “the substantially vertical sidewall of the second cross-section is offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width” or of any unexpected results arising therefrom. Applicant has not disclosed that having the substantially vertical sidewall of the second cross-section is offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width, solves any stated problem or is for any particular purpose. Where patentability is said to be based upon particular chosen dimensions, alignment, positioning, or upon another variable recited in a claim, the applicant must show that the chosen dimension are critical. (In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).
Regarding claim 10. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 1, Seddon further disclose wherein the cut (Fig 5, trenches 27, Para [ 0019]) and the cleave (Fig 5, region 63/64, Para [ 0019-0026]) are substantially aligned along a direction non-parallel to the plane (Fig 5, region 63/64, Para [ 0019-0026]).
Regarding claim 11. Seddon discloses a semiconductor die, comprising:
a first portion defined by a cut (Fig 5, trenches 27, Para [ 0019-0026]) within semiconductor wafer (Fig 5, a semiconductor substrate 18, Para [ 0017]), the cut defined by a partial dicing operation (Fig 5, trenches 27, Para [ 0019-0026]) performed on a first surface (upper surface of substrate 18) of the semiconductor wafer (Fig 5, a semiconductor substrate 18, Para [ 0017]), the first surface being aligned along a plane (Fig 5, a semiconductor substrate 18, Para [ 0017]), the cut having a depth less than a thickness (Fig 5, trenches 27, Para [ 0019-0026]) of the semiconductor wafer (Fig 5, a semiconductor substrate 18, Para [ 0017]), the cut being aligned along a direction non-parallel to the plane, plane (Fig 5, trenches 27, Para [ 0019-0026]), the cut having a first cross-section aligned out of the plane (Fig 5, trenches 27, Para [ 0019-0026]); and
a second portion defined by a cleave (Fig 5, region 63/64, Para [ 0019-0026]), the cleave defined by a cleaving operation (Fig 5, region 63/64, Para [ 0019-0026]) performed on a second surface (lower surface of substrate 18, Para [ 0017-0026]) of the semiconductor wafer (Fig 5, a semiconductor substrate 18, Para [ 0017]), the second surface (lower surface of substrate 18) being opposite the first surface (Fig 5, upper surface of substrate 18, Para [ 0017]), the cleave being substantially aligned along the direction and being substantially aligned (Fig 5, region 63/64, Para [ 0019-0026]) with the cut (Fig 5, trenches 27, Para [ 0019-0026]), the cleave having a second cross-section aligned out of the plane (Fig 5, region 63/64, Para [ 0019-0026]), the second cross-section being indicative of the cleave having originated from the second surface (Fig 5, region 63/64, Para [ 0019-0026]).
Examiner like to note that, claim 11 contain(s) process limitations “the cut defined by a partial dicing operation performed on a first surface of the silicon carbide (SiC) semiconductor wafer………………..the cleave defined by a cleaving operation performed on a second surface of the silicon carbide (SiC) semiconductor wafer and the second cross-section being indicative of the cleave having originated from the second surface” These limitations invoke the Product-by-Process doctrine. Product-by-process limitations are not limited by the manipulations of the recited steps, only the structure implied by the steps (MPEP 2113). Specifically, “the cut defined by a partial dicing operation performed on a first surface of the silicon carbide (SiC) semiconductor wafer………………..the cleave defined by a cleaving operation performed on a second surface of the silicon carbide (SiC) semiconductor wafer and the second cross-section being indicative of the cleave having originated from the second surface”, does not appear to structurally distinguish the invention over the resulting structure produced by the prior art. The burden to show that the claimed method necessarily distinguishes over the prior art is on the applicant.
But Seddon does not disclose explicitly silicon carbide (Sic) semiconductor die and substrate is a silicon carbide (SiC).
In a similar field of endeavor, Yu discloses silicon carbide (Sic) semiconductor die (Para [ 0021-0024]) and substrate is a silicon carbide (Para [0024] discloses “substrate” refers to a bulk substrate on which various layers and device structure are formed. In some embodiments, the bulk substrate includes silicon or a compound semiconductor, such as Ga As, InP, Si/Ge, or SiC).
Since Seddon and Yu are both from the similar field of endeavor, and using dicing to separate each individual die, the purpose disclosed by YU would have been recognized in the pertinent art of Seddon. Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon in light of YU teaching “silicon carbide (Sic) semiconductor die (Para [ 0021-0024]) and substrate is a silicon carbide (Para [0024] discloses “substrate” refers to a bulk substrate on which various layers and device structure are formed. In some embodiments, the bulk substrate includes silicon or a compound semiconductor, such as Ga As, InP, Si/Ge, or SiC)” for further advantage such as to manufacture reliable semiconductor device by using well-known material. The applicant is reminded, in this regard, that it has been held that a mere selection of known materials generally understood to be suitable to make a device, the selection of the particular material being on the basis of suitability for the intended use, would be entirely obvious. See In re Leshin 227 F.2d 197, 125 USPQ 416 (CCPA 1960) and also Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). (See. MPEP.2144.07)
Regarding claim 12. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 11, Seddon further disclose wherein the cut has a first axis out of the plane (Fig 5, trenches 27, Para [ 0019-0026]) and the cleave has a second axis out of the plane (Fig 5, region 63/64, Para [ 0019-0026]), and wherein the second axis is aligned to the first axis (Fig. [5]).
Regarding claim 13. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 11, Seddon further disclose the second cross-section (Fig 5, region 63/64, Para [ 0019-0026], have second cross-section) being different from the first cross-section (Fig 5, trenches 27, Para [ 0019-0026], construed as first cross-section).
Regarding claim 14. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 13, Seddon further disclose wherein the first cross-section has a substantially vertical sidewall (Fig 5, trenches 27, Para [ 0019-0026], construed as first cross-section).
Regarding claim 15. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 14, Seddon further disclose wherein the second cross-section has a substantially vertical sidewall (Fig 5, region 63/64, Para [ 0019-0026], have second cross-section), and wherein the cleave has a second width (Fig 5, region 63/64, Para [ 0019-0026], have second cross-section) different from a first width of the cut (Fig 5, trenches 27, Para [ 0019-0026]).
Regarding claim 16. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 15, YU further discloses wherein the substantially vertical sidewall of the second cross-section is offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width (Para [ 0061] discloses “the first recess 130 and the second recess 140 share the same central axis A. Since the width W1 of the first blade and the width W2 of the second blade are difference, the width difference between the first recess 130 and the second recess 140 is predetermined and forms two notches 134 facing each other. Because the width difference is predetermined, the width of the notch 134 is also predetermined accordingly so as to avoid corner hitting between the detached die and adjacent dies. Therefore, based on the width difference is predetermined, offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width can be achieved).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon in light of Yu teaching to achieve desire offset difference between the first width and the second width for further advantage such as avoid corner hitting between the detached die and adjacent dies and desired recess shape.
In addition, the instant application specification contains no disclosure of either the critical nature of the claimed relative thickness i.e., “the substantially vertical sidewall of the second cross-section is offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width” or of any unexpected results arising therefrom. Applicant has not disclosed that having the substantially vertical sidewall of the second cross-section is offset from the substantially vertical sidewall of the first cross-section by an amount about equal to one-half of a difference between the first width and the second width, solves any stated problem or is for any particular purpose. Where patentability is said to be based upon particular chosen dimensions, alignment, positioning, or upon another variable recited in a claim, the applicant must show that the chosen dimension are critical. (In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).
Claims 5-7 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Seddon et al (US 2013/0337633 A1; hereafter Seddon) in view of YU et al (US 2015/0364376 A1; hereafter Yu) as applied claims above and further in view of HASHIMOTO et al (US 2016/0071767 A1; hereafter HASHIMOTO)
Regarding claim 5. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 3, But Seddon and YU do not disclose explicitly wherein the substantially vertical sidewall of the second cross-section is substantially aligned with the substantially vertical sidewall of the first cross-section.
In a similar field of endeavor, HASHIMOTO discloses wherein the substantially vertical sidewall of the second cross-section is substantially aligned with the substantially vertical sidewall of the first cross-section (Fig. [ 7B-7C], Para [ 0062] discloses “ Fine grooves 140A shown in FIG. 7B have a reverse-tapered shape in which the width Sa on the surface side gradually increases to the width Sb at the bottom (Sb>Sa), and modified regions 370 are formed below the bottom in the depth direction. When the fine grooves 140A have a reverse-tapered shape, the width Sb at the bottom is increased, and thus even when a crack Q from the uppermost modified region 370A is curved, the crack easily reach the fine groove 140A. Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of HASHIMOTO teaching “wherein the substantially vertical sidewall of the second cross-section is substantially aligned with the substantially vertical sidewall of the first cross-section (Fig. [ 7B-7C], Para [ 0062] discloses “ Fine grooves 140A shown in FIG. 7B have a reverse-tapered shape in which the width Sa on the surface side gradually increases to the width Sb at the bottom (Sb>Sa), and modified regions 370 are formed below the bottom in the depth direction. When the fine grooves 140A have a reverse-tapered shape, the width Sb at the bottom is increased, and thus even when a crack Q from the uppermost modified region 370A is curved, the crack easily reach the fine groove 140A. Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section)” for further advantage such as to provide narrow cutting width.
Regarding claim 6. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 3, But Seddon and YU do not disclose explicitly wherein the first width is at least five times the second width.
In a similar field of endeavor, HASHIMOTO discloses wherein the first width is at least five times the second width (Fig. [ 7B-7C], Para [ 0055] discloses “when the width Sa of the fine grooves 140 is about 5 μm, the width Wp of the modified regions is adjusted to, for example, 1 to 2 μm”).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of HASHIMOTO teaching “wherein the first width is at least five times the second width (Fig. [ 7B-7C], Para [ 0055] discloses “when the width Sa of the fine grooves 140 is about 5 μm, the width Wp of the modified regions is adjusted to, for example, 1 to 2 μm”)” for further advantage such as to provide narrow cutting width and desired width for singulation semiconductor device.
Moreover, the instant application specification contains no disclosure of either the critical nature of the claimed relative thickness i.e., “wherein the first width is at least five times the second width” or of any unexpected results arising therefrom. Applicant has not disclosed that having the first width is at least five times the second width, solves any stated problem or is for any particular purpose. Where patentability is said to be based upon particular chosen dimensions, alignment, positioning, or upon another variable recited in a claim, the applicant must show that the chosen dimension are critical. (In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).).
Regarding claim 7. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 2, But Seddon and YU do not disclose explicitly wherein the second cross-section has a width that varies in a direction non-parallel to the plane.
In a similar field of endeavor, HASHIMOTO discloses wherein the second cross-section has a width that varies in a direction non-parallel to the plane (Fig. [ 7B-7C], Para [ 0060-0063], Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of HASHIMOTO teaching “wherein the second cross-section has a width that varies in a direction non-parallel to the plane (Fig. [ 7B-7C], Para [ 0060-0063], Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section)” for further advantage such as to provide desired width for crack propagation of the semiconductor device.
Regarding claim 17. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 15, But Seddon and YU do not disclose explicitly wherein the substantially vertical sidewall of the second cross-section is substantially aligned with the substantially vertical sidewall of the first cross-section.
In a similar field of endeavor, HASHIMOTO discloses wherein the substantially vertical sidewall of the second cross-section is substantially aligned with the substantially vertical sidewall of the first cross-section (Fig. [ 7B-7C], Para [ 0062] discloses “ Fine grooves 140A shown in FIG. 7B have a reverse-tapered shape in which the width Sa on the surface side gradually increases to the width Sb at the bottom (Sb>Sa), and modified regions 370 are formed below the bottom in the depth direction. When the fine grooves 140A have a reverse-tapered shape, the width Sb at the bottom is increased, and thus even when a crack Q from the uppermost modified region 370A is curved, the crack easily reach the fine groove 140A. Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of HASHIMOTO teaching “wherein the substantially vertical sidewall of the second cross-section is substantially aligned with the substantially vertical sidewall of the first cross-section (Fig. [ 7B-7C], Para [ 0062] discloses “ Fine grooves 140A shown in FIG. 7B have a reverse-tapered shape in which the width Sa on the surface side gradually increases to the width Sb at the bottom (Sb>Sa), and modified regions 370 are formed below the bottom in the depth direction. When the fine grooves 140A have a reverse-tapered shape, the width Sb at the bottom is increased, and thus even when a crack Q from the uppermost modified region 370A is curved, the crack easily reach the fine groove 140A. Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section)” for further advantage such as to provide narrow cutting width.
Regarding claim 18. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 14, But Seddon and YU do not disclose explicitly wherein the second cross-section has a width that varies in a direction non-parallel to the plane.
In a similar field of endeavor, HASHIMOTO discloses wherein the second cross-section has a width that varies in a direction non-parallel to the plane (Fig. [ 7B-7C], Para [ 0060-0063], Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of HASHIMOTO teaching “wherein the second cross-section has a width that varies in a direction non-parallel to the plane (Fig. [ 7B-7C], Para [ 0060-0063], Examiner interpreted groove 140 as first cross-section and cracks Q from the uppermost modified regions 380A and 390A, as second cross-section)” for further advantage such as to provide desired width for crack propagation of the semiconductor device.
Claims 8-9 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Seddon et al (US 2013/0337633 A1; hereafter Seddon) in view of YU et al (US 2015/0364376 A1; hereafter Yu) as applied claims above and further in view of TANG et al (US 2018/0166328 A1; hereafter TANG)
Regarding claim 8. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 2, But Seddon and YU do not disclose explicitly wherein the second cross-section has a tapered sidewall with respect to a direction non-parallel to the plane.
In a similar field of endeavor, TANG discloses wherein the second cross-section has a tapered sidewall with respect to a direction non-parallel to the plane (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of TANG teaching “wherein the second cross-section has a tapered sidewall with respect to a direction non-parallel to the plane (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”)” for further advantage such as to provide desired recess shape and to increase the production yield of the semiconductor wafers.
Regarding claim 9. Seddon in light of YU and TANG disclose the silicon carbide (SiC) semiconductor die of claim 8, But Seddon and YU do not disclose explicitly wherein a width of the second cross-section is larger at the second surface than at a bottom of the cut.
In a similar field of endeavor, TANG discloses wherein a width of the second cross-section is larger at the second surface than at a bottom of the cut (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of TANG teaching “wherein a width of the second cross-section is larger at the second surface than at a bottom of the cut (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”)” for further advantage such as to provide desired recess shape and to increase the production yield of the semiconductor wafers.
Regarding claim 19. Seddon in light of YU disclose the silicon carbide (SiC) semiconductor die of claim 14, But Seddon and YU do not disclose explicitly wherein the second cross-section has a tapered sidewall with respect to a direction non-parallel to the plane.
In a similar field of endeavor, TANG discloses wherein the second cross-section has a tapered sidewall with respect to a direction non-parallel to the plane (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of TANG teaching “wherein the second cross-section has a tapered sidewall with respect to a direction non-parallel to the plane (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”)” for further advantage such as to provide desired recess shape and to increase the production yield of the semiconductor wafers.
Regarding claim 20. Seddon in light of YU and TANG disclose the silicon carbide (SiC) semiconductor die of claim 8, But Seddon and YU do not disclose explicitly wherein a width of the second cross-section is larger at the second surface than at a bottom of the cut.
In a similar field of endeavor, TANG discloses wherein a width of the second cross-section is larger at the second surface than at a bottom of the cut (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Seddon and YU in light of TANG teaching “wherein a width of the second cross-section is larger at the second surface than at a bottom of the cut (Fig. [ 3C], Para [ 0049] discloses “a middle opening 85 is formed between the first opening 82 and the second opening 83 due to the sawing process using the second dicing blade 72. Therefore, a tapered structure 84 is formed at the middle opening 85. The width of the middle opening 85 gradually decreases along the thickness direction T from the first opening 82 to the second opening 83”)” for further advantage such as to provide desired recess shape and to increase the production yield of the semiconductor wafers.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOIN M RAHMAN whose telephone number is (571)272-5002. The examiner can normally be reached 8:30-5:00pm.
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/MOIN M RAHMAN/Primary Examiner, Art Unit 2898
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