DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 and 5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Han (US 11094543).
Han is directed to a method of defect correction in metal resists. Han illustrates views of a semiconductor device during various stages of fabrication in accordance with an embodiment of the present application. (Figures 1A-1E). Han discloses and illustrates a patterned metal resist layer 106 that is formed over a layer to be patterned 104 that is formed over a semiconductor substrate 102. (Col.4, 30-36; Fig.1A). Han explains the patterned metal resist layer 106 may be a pattern for device elements as known to a person having ordinary skill in the art and it exposes portions of the layer to be patterned 104. (Col.4, 30-36; Fig.1A). Han discloses the layer to be patterned 104 may be the layer that forms a device element or it may be an intervening layer that is used to subsequently form a device element. (Col.4, 37-52). Han discloses the semiconductor substrate 102 includes a semiconductor body for supporting the layer to be patterned 104 on which the patterned metal resist layer 106 is formed. (Col.4, 53-col.5,3). Han discloses the semiconductor substrate 102 may include additional layer such as an intermetal dielectric (IMD) comprising a low-k dielectric material, an oxide, a nitride, and others such as multiple interconnect levels comprising dielectric films with embedded conductive interconnect elements formed over a single-crystal bulk semiconductor or semiconductor-on-insulator (SOI) wafer in which various active devices may be fabricated. (Col.4, 53-col.5, 3). These disclosures and illustrations teach the limitation of claim 1, ‘A method of forming a device, the method comprising: forming a mask layer over a substrate; forming a patterned metal-containing photoresist over the mask layer…’
Han discloses the patterned metal resist layer 106 may be a sacrificial layer of a metal oxide photoresist film that is sensitive to EUV radiation in the wavelength range of 10 nm to about 14 nm, typically 13.5 nm, and it 106 comprises an organometal oxide photoresist comprising an organometallic compound such as tin, hafnium, or zirconium, for example. (Col.5, 4-12). Han discloses the organometal oxide photoresist may be a positive tone resist or a negative tone resist. (Col.5, 4-12). Han discloses to form the patterned metal resist layer 106, a metal resist layer is coated over the layer to be patterned 104, exposed to EUV radiation through a lithography mask, and developed to transfer a pattern of device elements from the lithography mask to the metal resist layer using, for example, 13.5 nm wavelength EUV lithography process steps known to those having ordinary skill in the art. (Col. 5, 13-21). Han explains in the case of the organo metal resist, the patterned metal resist layer 106 thus formed is a metal oxide pattern. (Col.5, 13-21).
Han discloses and illustrates a silicon containing layer 110 is selectively deposited over the patterned metal resist layer 106, forming a protective cap over the patterned metal resist layer 106 without capping the metal defect 108. (Col.5, 62-col.6, 7. Fig.1B). Han discloses the silicon containing layer 110 may fully or partially cover all of the sidewalls of the patterned metal resist layer 106. (Col.5, 62-col.6, 7; Fig. 1B). Han discloses the silicon containing layer 110 may be selectively deposited over the patterned metal resist layer 106 by exposing the patterned metal resist layer 106 to a gas mixture comprising a silicon precursor and one or more inert gasses such as helium, argon, and nitrogen through a shower head in a dedicated deposition tool or plasma etch chamber. (Col.5, 62-col.6, 7; Fig.1B).
Han discloses a cyclic process is used to form the silicon containing layer 110. (Col.6, 24-col.7, 17; Fig.1B). Han discloses this may be used to tune the thickness profile of the silicon containing layer 110 deposited over the patterned metal resist layer 106. (Col.6, 24-col.7, 17). Han explains cycles of deposition and trim process may be performed to form the silicon containing layer 110, where after depositing a layer(s) of the silicon containing layer 110, the silicon containing layer 110 may be trimmed using, for example, isotropic plasma etch processing, gas phase etching, or wet etching. (Col.6, 24-col.7, 17). Han discloses the trimming may remove any of the material of the silicon containing layer 110 deposited in the trenches between adjacent patterned metal resist layer 106 (over the metal defect 108). (Col.6, 24-col.7, 17). Han discloses an optional trim process may be performed at the end of the deposition process that forms the silicon containing layer 110 to remove any silicon containing layer 110 covering the metal defect 108 to prevent the subsequent surface clean from having difficulty in removing the metal defect 108 without also etching part of the silicon containing layer 110. (Col.6, 24-col.7, 17).
Han discloses the silicon containing layer 110 comprises a silicon oxide layer deposited using chemical vapor deposition (CVD), for example, wherein the gas mixture may comprise a silicon precursor such as silicon tetrachloride, oxygen, and one or more carrier gases. (Col.6, 24-col.7, 17). Han discloses the silicon containing layer 110 may also comprise silicon deposited using a plasma process such as plasma enhanced chemical vapor deposition (PECVD), for example, wherein the gas mixture may comprise a silicon precursor such as dichloro-silane (SiCl2H2), silane, or tetraethoxysilane (TEOS), for example, an additive gas such as O2 or H2, for example, and one or more carrier gases. (Col.6, 24-col.7, 17). Han also discloses the gas mixture may comprise silicon tetrachloride and hydrogen. (Col.6, 24-col.7, 17). Han explains the silicon containing layer 110 is selectively deposited on the top surface and sidewalls of the patterned metal resist layer 106 so that it provides a protective cap over the patterned metal resist layer 106 without covering the metal defect 108 during the subsequent surface cleaning process. (Col.6, 24-col.7, 17). These disclosures teach the limitations of claim 5.
Han discloses and illustrates the metal defect 108 is removed using a surface cleaning process by exposing the layer to be patterned 104 and the patterned metal resist layer 106 covered with the silicon containing layer 110 to a plasma process so as to form a non-defective etch mask. (Col.7, 18, col.8, 15; Fig.1C). Han discloses the surface cleaning plasma process gases are selected to be reductive and may comprise a halogen or a hydrogen chemistry. (Col.7, 18-col.8, 15). Han discloses, for example, the surface cleaning plasma process gases may comprise chlorine or bromine, and hydrogen along with an inert gas such as argon because chlorine and bromine can selectively remove metal particles without etching the silicon containing layer 110. (Col.7, 18-col.8, 15). Han also notes that in the absence of the silicon containing layer 110, chlorine/bromine will also etch the underlying patterned metal resist layer 106. (Col.7, 18-col.8, 15). Han further discloses one halogen or hydrogen chemistry is selected to remove all of the metal defect 108 without etching the underlying layer to be patterned 104 which may comprise BCl3, HBr, CH4 or H2 and a diluent gas such as Ar, Kr, or He. (Col.7, 18-col.8, 15).
Han explains gas-phase halogen plasmas are highly selective to silicon oxide so when the silicon containing layer 110 comprises silicon oxide, the majority of the silicon containing layer 110 remains over the metallic patterned resist layer 106 after the surface cleaning process with zero to minimal losses of the silicon containing layer 110 due to ion sputtering. (Col. 7, 18-col.8, 15). However, Han discloses the surface cleaning process may not be as selective to the silicon containing layer 110, for example, when the silicon containing layer 110 is made of substantially silicon, e.g., elemental silicon, so the silicon containing layer 110 may be a sacrificial layer so that subsequent etching is performed using primarily the patterned metal resist layer 106. (Col.7, 18-col.8, 15).
Han discloses and illustrates next, using the patterned metal resist layer 106 covered by the silicon containing layer 110 as an etch mask, the pattern of device elements are formed in the layer to be patterned 104 by exposing the layer to be patterned 104 to a directional etch process through the etch mask. (Col.8, 16-29; Fig.1D). Han discloses and illustrates, the directional etch process may not be selective to the silicon containing layer 110, and hence may be removed during the etching. (Col.8, 16-29; Fig.1D). These disclosures and illustrations teach the limitation of claim 1, ‘A method of forming a device, the method comprising: … using the patterned metal-containing photoresist as an etch mask patterning the mask layer to form a plurality of features…’ and the limitation of claim 2.
Han discloses and illustrates the patterned metal resist layer 106 and any remaining silicon containing layer 110 are selectively removed and a plasma etch process comprising a halogen or hydrogen chemistry similar to the halogen or hydrogen chemistry used in the surface cleaning process, may be used to remove the patterned metal resist layer 106 once the remaining silicon containing layer 110 is removed. (Col.8, 34-41; Fig.1E). These disclosures and illustrations teach the limitation of claim 1, ‘A method of forming a device, the method comprising: …and performing a first plasma process to remove the patterned metal-containing photoresist, wherein the first plasma process is performed using a plasma generated from a gas mixture comprising CH4, HBr, or hydrogen.’
Allowable Subject Matter
Claims 3-4 and 6-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The disclosures and illustrations of Han as discussed above fail to explicitly teach and/or suggest the limitation of claim 3, ‘ The method of claim 1, wherein performing the first plasma process further comprises changing a width of the plurality of features.’ The disclosures and illustrations of Han also fail to explicitly teach and/or suggest the limitation of claim 4, ‘The method of claim 1, wherein performing the first plasma process further comprises changing a height of the plurality of features.’ Furthermore, the disclosures and illustrations of Han fail to explicitly teach and/or suggest the limitation of claim 6, ‘ The method of claim 5, wherein performing the deposition process comprises performing a first CH4 plasma process, wherein the first CH4 plasma process is performed with a first CH4 flow rate.’ Moreover, the disclosures and illustrations of Han fail to explicitly teach and/or suggest the limitation of claim 7, ‘ The method of claim 6, wherein performing the trim process comprises performing a second CH4 plasma process, wherein the second CH4 plasma process is performed with a second CH4 flow rate less than the first CH4 flow rate.’ The prior art also fails to provide other relevant disclosures which are properly combinable with Han to teach and/or suggest the limitations of claims 3-4 and 6-7. Therefore, claims 3-4 and 6-7 include allowable subject matter.
The following is an examiner’s statement of reasons for allowance: The disclosures and illustrations of Han as discussed above teach the limitations of independent claim 8, ‘A method comprising: forming a mask layer over a substrate; forming a patterned metal-containing photoresist over the mask layer; patterning the mask layer to form a plurality of features; performing a first plasma process on the patterned metal-containing photoresist and the plurality of features, wherein performing the first plasma process comprises removing the patterned metal-containing photoresist…’ However, the disclosures of Han fall short of teaching and/or suggesting the limitations of independent claim 8, ‘ A method comprising: …using a CH4, HBr, or hydrogen based plasma; and performing a second plasma process on the plurality of features, wherein the second plasma process is different from the first plasma process, and wherein performing the second plasma process comprises changing a width of the plurality of features.’ The prior art fails to provide other relevant disclosures which are properly combinable with Han to teach and/or suggest these limitations of independent claim 8. Therefore, independent claim 8 and claims 9-14 depending therefrom are allowable.
Similarly, the disclosures and illustrations of Han teach the limitations of independent claim 15, ‘ A method comprising: forming a… layer over a substrate; forming a patterned metal-containing photoresist over the…layer; performing a first plasma process on the …layer, wherein performing the first plasma process comprises etching the …layer to form a plurality of features; performing a second plasma process on the patterned metal-containing photoresist and the plurality of features, wherein performing the second plasma process comprises removing the patterned metal-containing photoresist…’ Still, the disclosures and illustration of Han fall short of teaching the limitations of claim 15, ‘ A method comprising: forming a carbon-containing layer…; …photoresist over the carbon-containing layer; …first plasma process on the carbon-containing layer, …etching the carbon-containing layer to form a plurality of features; … and performing a third plasma process on the plurality of features, wherein the third plasma process is different from the second plasma process, and wherein performing the third plasma process comprises changing a height of the plurality of features.’ Similar to independent claim 8, the prior art fails to provide other relevant disclosures which are properly combinable with Han and cure the deficiency of Han to teach and/or suggest these limitations of claim 15. Therefore, independent claim 15 and claims 16-20 are allowable.
Conclusion
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/CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
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