Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/31/2026 has been entered.
Acknowledgment of Amendment
Acknowledgment is made of applicant's amendment, filed on 07/31/2026. The changes and remarks disclosed therein have been considered. Claims 2, 15 have been cancelled by the amendment. Claims 1, 8, 14 have been amended. New Claims 23-24 have been added. Therefore, claims 1, 5-14, 16-24 remain pending in the application.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 13, 19-20 are rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claim 13 repeats a limitation already presents in claim 8.
Claims 19-20 depend on a canceled claim 15.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements. For the purpose of continuing examination, it is assumed that claims 19 and 20 were intended to depend from claim 14.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 5-8, 14 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims of U.S. Patent No. 11,942,185. Although the claims at issue are not identical, they are not patentably distinct from each other.
Claim 1 further recites a “multiplexer”, and expressly recited “sensing node”, and sensing node is charged based on the bitline-voltage decrease, and the comparator is coupled to the sensing node. These limitations narrow the scope of claim 9 of parent, but they appear to describe the ordinary internal implementation of the parent’s charge-integration circuit rather than a patentably distinct invention. Parent claim 9 already requires a charge integration circuit that provides a sensing voltage and a comparator that compares that sensing voltage with a reference voltage. A person of ordinary skill would have understood that the sensing voltage of the charge integration circuit necessarily exists at an electrical node of the charge integration circuit. Designating that node as a “sensing node”, and coupling the comparator to that node to receive the sensing voltage, represents an ordinary implementation of the claimed charge-integration/comparator relationship rather than a patentably distinct arrangement.
Regarding claim 5, claim 8 of parent recites the I/O circuit sense a multiply-accumulate value for the bit line in the time domain. Claim 5 therefore appears to be an obvious control implementation of the MAC operation already required by parent claim 8.
Regarding claim 6, it is substantially the same limitation as parent claim 2.
Regarding claim 7, it is substantially the same limitation as parent claim 3.
Regarding claim 8, it is the method counterpart of child claim 1, and is the operation method of the structure claimed in parent claims 1, 8, 9. The mere conversion of patented apparatus functions into method steps normally does not make the method patentably distinct where the method is the ordinary use of the patented apparatus.
Regarding claim 13, it is substantially the same limitation as parent claims 8 and 9.
Regarding independent claim 14, it is substantially the same limitation as parent claim 9, the added expression “sensing node” identifies the node of the charge integration circuit at which the sensing voltage required by parent claim 9 is present and supplied to the comparator. Naming that node and expressly reciting that the comparator is coupled thereto does not produce a patentably distinct method.
Allowable Subject Matter
Claims 9-12, 16-18, 21-24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 19 and 20 contain allowable subject matter but are rejected under 35 U.S.C. 112(d) for improper dependency. Claims 19 and 20 would be allowable if amended to depend properly from claim 14, assuming no other defects are introduced.
The following is a statement of reasons for the indication of allowable subject matter:
The closest prior art to the present invention is Kumar US Patent 11048434 (hereinafter Kumar).
Kumar discloses a memory circuit has compute-in-memory (CIM) circuitry that performs computations based on time-to-digital conversion (TDC). The memory circuit includes an array of memory cells addressable with column address and row address. The memory circuit includes CIM sense circuitry to sense a voltage for multiple memory cells triggered together. The CIM sense circuitry including a TDC circuit to convert a time for discharge of the multiple memory cells to a digital value. A processing circuit determines a value of the multiple memory cells based on the digital value.
Regarding claim 9 (and the respective dependent claims), the prior arts of record do not disclose or suggest the combination of all the limitations in the claim and the base claim, including: charging the sensing node comprises charging the sensing node at a first rate till the sensing voltage is pulled to a threshold voltage.
Regarding claim 12, the prior arts of record do not disclose or suggest the combination of all the limitations in the claim and the base claim, including: charging the sensing node comprises: charging the sensing node based on discharge rate of a bitline voltage of the bitline.
Regarding claim 16 (and the respective dependent claims), the prior arts of record do not disclose or suggest the combination of all the limitations in the claim and the base claim, including: charging the sensing node comprises charging the sensing node at a first rate till the sensing voltage is pulled to a threshold voltage.
Regarding claim 19, the prior arts of record do not disclose or suggest the combination of all the limitations in the claim and the base claim, including: charging the sensing node comprises: charging the sensing node based on discharge rate of a bitline voltage of the bitline.
Regarding claim 20, the prior arts of record do not disclose or suggest the combination of all the limitations in the claim and the base claim, including: connecting the charge integration circuit to the bitline comprises connecting the charge integration circuit to the bitline through a multiplexer.
Regarding claim 21 (and the respective dependent claims), the prior arts of record do not disclose or suggest the combination of all the limitations in the claim and the base claim, including: the charge integration circuit comprises a charge circuit connected to a sensing node, wherein the charge circuit charges the sensing node at a first rate, and wherein the sensing node provides the sensing voltage.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled "Comments on Statement of Reasons for Allowance”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIAOCHUN L CHEN whose telephone number is (571)272-0941. The examiner can normally be reached on M-F: 9AM-5:00PM.
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/XIAOCHUN L CHEN/Examiner, Art Unit 2824
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