Prosecution Insights
Last updated: July 17, 2026
Application No. 18/617,325

POWER MODULE WITH OVERLAPPING TERMINALS

Non-Final OA §102§103
Filed
Mar 26, 2024
Priority
Mar 30, 2023 — provisional 63/455,822
Examiner
MUIR, MATTHEW SINCLAIR
Art Unit
Tech Center
Assignee
Semiconductor Components Industries LLC
OA Round
1 (Non-Final)
70%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
85 granted / 122 resolved
+9.7% vs TC avg
Strong +32% interview lift
Without
With
+32.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
26 currently pending
Career history
145
Total Applications
across all art units

Statute-Specific Performance

§103
89.7%
+49.7% vs TC avg
§102
4.8%
-35.2% vs TC avg
§112
5.5%
-34.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 122 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 3-5 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 20140218871 A1). As to Claim 1, Kim discloses: An apparatus (apparatus of Fig. 5), comprising: a direct bonded metal substrate S1 (Par. 0070 “The substrate S1, for example, may be a DBC substrate”); a first power tab T1 electrically coupled to the direct bonded metal substrate S1 (Par. 0070 “The contact part 32 of the first terminal T1 is in contact with (installed at) the part 60a of the first part 60”); a second power tab T2 electrically coupled to the direct bonded metal substrate S1 (Par. 0070 “The contact part 42 of the second terminal T2 is in contact with (installed at) the part 62a of the second part 62”); a proximal end of the first power tab T1 aligned with a first longitudinal axis (see Fig. below); and a proximal end of the second power tab T2 aligned with a second longitudinal axis (see Fig. below) non-parallel to the first longitudinal axis (first and second highlighted axis are not parallel), the proximal end of the first power tab T1 overlapping the proximal end of the second power tab T2 (highlighted proximal ends of T1 and T2 are overlapping), wherein a distal end of the first power tab T1 does not overlap a distal end of the second power tab T2 (34 and 44 do not overlap). PNG media_image1.png 441 488 media_image1.png Greyscale As to Claim 3, Kim discloses: further comprising at least two semiconductor dies 70,80 electrically coupled via a wire bond (Par. 0071 “The element modules 70 and 80 formed on the substrate S1 may be power elements, for example, a plurality of IGBTs. Each IGBT may include a switching element and a diode. Four IGBTs may be arranged in parallel in each element modules 70 and 80. The element module 70 of the third part 64 is adjacent to the first part 60. The element module 70 is connected to the first part 60 by a wire bonding 82. The element module 80 formed on the second part 62 is connected to a part adjacent to the third part 64 by a wire bonding 84”) or a clip. As to Claim 4, Kim discloses: further comprising an output tab T3 electrically coupled to the direct bonded metal substrate S1 (Par. 0072 “Third and fourth terminals T3 and T4, which are output terminals, are spaced apart from each other and are installed at a location corresponding to the second region 64b of the third part 64 of FIG. 5”). As to Claim 5, Kim discloses: wherein, in operation, current flows from the first power tab T1 to the output tab T3 and from the output tab T3 to the second power tab T2 without flowing through the direct bonded metal substrate S1 (Par. 0077 “FIG. 11 is a diagram illustrating an equivalent circuit of the devices of FIGS. 5 and 10”; Par. 0078 “The direct currents inputted through the first and second input lines 100 and 102 are switched and converted to AC signals, and then are outputted to the output line 104. Through an opposite process, a current 1001 (hereinafter, a first current) may flow from the output line 104 to the first input line 100 via the transistor of the first element E1, or a current 1021 (hereinafter, a second current) may flow from the output line 104 to the second input line 102 via the diode of the second element E2”). As to Claim 8, Kim discloses: further comprising a first opening 36 in the first power tab T1 aligned with a second opening 46 in the second power tab T2 (through holes 36 and 46 are aligned). Claims 16-18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Savino (US 20230420341 A1). As to Claim 16, Savino discloses: A method, comprising: overlapping proximal ends of a first power tab 15 and a second power tab 16 (see Fig. 4; portion of 15 and 16 are overlapping); coupling clips 20 of the first power tab 15 to a central region of a substrate 27 (substrate comprises second conductive layer 36 and contact areas 36a-36g; see Fig. 12B, clips 20 coupled to central region of 36; see Fig. below); coupling clips 21 of the second power tab 16 to an edge region of the substrate 27 (see Fig. below, clips 21 coupled to edge region of 36); and coupling clips 22 of a third power tab 17 to the central region of the substrate 27 (see Fig. below, clips 22 coupled to central region). PNG media_image2.png 483 565 media_image2.png Greyscale As to Claim 17, Savino discloses: wherein the first power tab 15, the second power tab 16, and the third power tab 17 are configured as integral elements of a plastic case (package 9; Par. 0035 “the power module 2 includes a package 9 of insulating material, such as resin, of generally parallelepiped shape, having four side surfaces 5, a first main surface 6 and a second main surface 7 (FIG. 3)”; Par. 0036 “The package 9 may be molded or made using a gel potted technique, wherein a plastic box is filled with an insulating gel, encloses the components, and has protruding leads”; Par. 0039 “A first, a second and a third power pin 15-17 protrude here from two opposite side surfaces 5 and are part of three metal bands (hereinafter also referred to as first, second and third clips 20, 21, 22)”; 15-17 protrude from resin case, power module is an integral body). As to Claim 18, Savino discloses: wherein coupling the clips 20 of the first power tab 15 and the clips 22 of the third power tab 17 to a central region of the substrate 27 comprises overlaying the clips 20,22 above circuitry on the substrate 27 by positioning the plastic case 9 relative to the substrate 27 (clips 20,22 are positioned over substrate 27, contact areas 36a-36g and package 9 is at least in part positioned around and relative to substrate 27). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20140218871 A1) as applied to claim 1 above, and further in view of Lee (US 20240347416 A1). As to Claim 2, Kim does not disclose: further comprising a heat transfer mechanism coupled to the direct bonded metal substrate. However, Lee discloses: further comprising a heat transfer mechanism (heat sink 100) coupled to the direct bonded metal substrate 10 (Par. 0030 “The ceramic substrate 10 may be any one of an active metal brazing (AMB) substrate, a direct bonded copper (DBC) substrate, and a thick printing copper (TPC) substrate”; Par. 0034 “The heat sink 100 may include a flat portion 110 in contact with one surface of the lower metal layer 13, and a plurality of heat dissipation fins 120 formed to protrude from the other surface 112 of the flat portion 110 at intervals”); in order to effectively dissipate heat generated by a semiconductor chip (Par. 0007). It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Kim as further suggested by Lee e.g., providing: further comprising a heat transfer mechanism coupled to the direct bonded metal substrate; in order to effectively dissipate heat generated by a semiconductor chip. As to Claim 6, Kim does not disclose: further comprising heat dissipating pins that are oriented perpendicular to a plane of the direct bonded metal substrate and a plane of the first power tab and the second power tab. However, Lee discloses: further comprising heat dissipating pins 120 that are oriented perpendicular to a plane of the direct bonded metal substrate 10 and a plane of the first power tab and the second power tab (tabs of Kim are in same plane as substrate S1; S1 corresponds to substrate 10 of Lee; fins 120 of Lee are perpendicular to horizontal plane); in order to effectively dissipate heat generated by a semiconductor chip (Par. 0007). It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Kim as further suggested by Lee e.g., providing: further comprising heat dissipating pins that are oriented perpendicular to a plane of the direct bonded metal substrate and a plane of the first power tab and the second power tab; in order to effectively dissipate heat generated by a semiconductor chip. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20140218871 A1) as applied to claim 1 above, and further in view of Hong (US 10985095 B2). As to Claim 7, Kim does not disclose: wherein a thickness of the first power tab and the second power tab is about three times greater than a thickness of a current path within a conductive layer of the direct bonded metal substrate. However, Hong discloses: wherein a thickness of the first power tab and the second power tab (lead frames 110, col. 7, Line 57 “The lead frames 110 may be provided in plural”) is about three times greater than a thickness of a current path within a conductive layer (pattern layer 210) of the direct bonded metal substrate (substrate 200; col. 6, Lines 57-62 “The substrate 200 includes a pattern layer 210, a conductive layer 230 (see FIG. 7) disposed to be spaced apart from the pattern layer 210 and configured to be electrically grounded, and an insulating layer 220 disposed between the pattern layer 210 and the conductive layer 230 to isolate the pattern layer 210 from the conductive layer 230”; col. 10, Lines 5-7 “the vehicle power module 100 according to the present disclosure keeps the thickness T of the pattern layer 210 as thin as possible”; col. 10, Lines 22-25 “in the vehicle power module 100 according to the present disclosure, the thickness T of the lead frame 110 may be kept large regardless of the impact transmitted to the insulating layer 220”); in order to prevent peeling within the substrate (col. 9, Lines 61-64) and prevent deformation or a broken lead frame when coupling to an external device (col. 10, Lines 16-18). It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Kim as further suggested by Hong e.g., providing: wherein a thickness of the first power tab and the second power tab is about three times greater than a thickness of a current path within a conductive layer of the direct bonded metal substrate; in order to provide structural integrity. Further, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It has also been held that discovering an optimum value of a result-effective variable (e.g., the relative thickness of the power tabs for effecting the desired results of operating voltage ranges) involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20140218871 A1) as applied to claim 1 above, and further in view of Hong (US 20190067167 A1). As to Claim 9, Kim does not disclose: wherein a perimeter of the first power tab and the second power tab forms a heart shape. However, Hong suggests in Fig. 3: wherein a perimeter of the first power tab 310 and the second power tab 320 forms a heart shape (see Fig. 3, terminals 315 of 315 and 325 of 320 resemble a heart shape); in order to provide reduced loop inductance (Par. 0042). It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Kim as further suggested by Hong e.g., providing: wherein a perimeter of the first power tab and the second power tab forms a heart shape; in order to provide reduced loop inductance. A change in shape, absent persuasive evidence that the change in shape is significant, is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Claims 10-15 are rejected under 35 U.S.C. 103 as being unpatentable over Savino (US 20230420341 A1) in view of Wakamoto (US 20200266120 A1). As to Claim 10, Savino discloses: An apparatus (power module 2; see Figs. 2-10), comprising: a direct bonded metal substrate 27 (Par. 0050 “The substrate 27 functions as support and electrical connection of the electronic power devices 28 and is formed here by a multilayer, for example a DBC (Direct Bonded Copper) substrate”); a first metal tab 16 and a second metal tab 15 coupled to the direct bonded metal substrate 27 (Par. 0040 “the first and the second power pins 15, 16 protrude from the first side surface 5A and are generally intended to receive power supply potentials (DC+, DC−)”), the first metal tab 16 oriented in a transverse direction with respect to the second metal tab 15 (16 and 15 are transverse, see Figs. 2-5); and a plastic case (package 9) surrounding a top layer of the direct bonded metal substrate 27 (Par. 0035 “the power module 2 includes a package 9 of insulating material, such as resin, of generally parallelepiped shape, having four side surfaces 5, a first main surface 6 and a second main surface 7 (FIG. 3)”; Par. 0036 “The package 9 may be molded or made using a gel potted technique, wherein a plastic box is filled with an insulating gel, encloses the components, and has protruding leads”). Savino does not disclose: a metal base plate attached to a bottom layer of the direct bonded metal substrate; an array of heat dissipating pins attached to the metal base plate. However, Wakamoto discloses: a metal base plate 10 attached to a bottom layer of the direct bonded metal substrate (electrode layer 22; Par. 0091 “Thermal diffusion unit 10 includes a high thermal conductive material and can diffuse heat. The thermal diffusion unit 10 can be formed, for example of copper (Cu) as a high thermal conductive material”; 10 attached to 22, see Fig. 26); an array of heat dissipating pins 16 attached to the metal base plate 10 (Par. 0097 “a plurality of air-cooling fin units (16FA1, 16FA2, 16FA3, . . ., 16FAm), (16FB1, 16FB2, 16FB3, . . ., 16FBm) connected to the thermal diffusion unit 10”); in order to diffuse heat and reduce thermal resistance (Par. 0092). It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Savino as further suggested by Wakamoto e.g., providing: a metal base plate attached to a bottom layer of the direct bonded metal substrate; an array of heat dissipating pins attached to the metal base plate; in order to diffuse heat and reduce thermal resistance. As to Claim 11, the obvious modification of Savino in view of Wakamoto discloses: wherein the plastic case (9 of Savino, corresponds to mold resin 300 of Wakamoto) is attached to the metal base plate (10 of Wakamoto) without screws (300 is attached to 10 without screws, see Fig. 26 of Wakamoto). As to Claim 12, the obvious modification of Savino in view of Wakamoto discloses: further comprising power tabs 15,16,17 extending over the direct bonded metal substrate 27 (15-17 extend over 27 of Savino). As to Claim 13, the obvious modification of Savino in view of Wakamoto discloses: wherein the first metal tab 16 includes a negative terminal (DC-), and the second metal tab 15 includes a positive terminal (DC+), and further comprising a third metal tab 17 including an output terminal opposite the first metal tab 16 and the second metal tab 15 (Par. 0040 “the third power pin 17 protrudes from the second side surface 5B and is generally intended to be connected to a load (not shown)”; 17 opposite 15-16; Savino). As to Claim 14, the obvious modification of Savino in view of Wakamoto discloses wherein the apparatus is configured for current to flow from the positive terminal 15 to the output terminal 17 and back to the negative terminal 16 via a central region of the direct bonded metal substrate 27 (20-22 of pins 15-17 disposed in central region of substrate 27, current within Fig. 1 flows from positive to load and back to negative; Savino). As to Claim 15, the obvious modification of Savino in view of Wakamoto discloses: wherein the first metal tab 16 is oriented at a right angle with respect to the second metal tab 15 (at least a portion of 16 is oriented at a right angle in relation to a portion of 15; see below). PNG media_image3.png 365 569 media_image3.png Greyscale Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Savino (US 20230420341 A1) as applied to claim 16 above, and further in view of Kim (US 20140218871 A1). As to Claim 19, Savino does not disclose: wherein the overlapping includes aligning a first hole in the first power tab with a second hole in the second power tab to produce aligned first and second holes. However, Kim discloses: wherein the overlapping includes aligning a first hole 36 in the first power tab T1 (see Fig. 1) with a second hole 46 in the second power tab T2 to produce aligned first and second holes (36,46 are aligned); in order to adjust mutual coupling between first and second terminals (Par. 0059). It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Savino as further suggested by Kim e.g., providing: wherein the overlapping includes aligning a first hole in the first power tab with a second hole in the second power tab to produce aligned first and second holes; in order to adjust mutual coupling between first and second terminals. Allowable Subject Matter Claim 20 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: As to claim 20, the allowability resides in the entirety of the method as recited in the dependent claim 20, including all of the limitations of its base claims and intervening claims, and at least in part, because claim 20 recites the following limitations: “further comprising attaching a heat dissipating pin to the substrate, wherein the heat dissipating pin extends through the aligned first and second holes.” – claim 20. The aforementioned limitations in combination with all remaining limitations of claim 20, are believed to render said claim 20 and all claims dependent therefrom allowable over the prior art of record, taken alone or in combination. Further, Examiner has not identified any double patenting issues. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cheng (US 20200027807 A1) discloses a power module with varying electrode terminals. Hable (US 20180122720 A1) discloses a package with overlapping electrode terminals. Yano (US 10804186 B2) discloses a power converter with overlapping bus bars. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW S MUIR whose telephone number is (571)270-1329. The examiner can normally be reached Monday - Friday 8 am - 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jayprakash Gandhi can be reached at 571-272-3740. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MATTHEW SINCLAIR MUIR/ Examiner, Art Unit 2841 /Jayprakash N Gandhi/ Supervisory Patent Examiner, Art Unit 2841
Read full office action

Prosecution Timeline

Mar 26, 2024
Application Filed
Jun 11, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
70%
Grant Probability
99%
With Interview (+32.5%)
2y 7m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 122 resolved cases by this examiner. Grant probability derived from career allowance rate.

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