Prosecution Insights
Last updated: April 19, 2026
Application No. 18/617,730

DUAL SUBSTRATE SIDE ESD DIODE FOR HIGH SPEED CIRCUIT

Final Rejection §103
Filed
Mar 27, 2024
Examiner
ZHU, SHENG-BAI
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
4 (Final)
63%
Grant Probability
Moderate
5-6
OA Rounds
2y 11m
To Grant
67%
With Interview

Examiner Intelligence

Grants 63% of resolved cases
63%
Career Allow Rate
441 granted / 705 resolved
-5.4% vs TC avg
Minimal +5% lift
Without
With
+4.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
59 currently pending
Career history
764
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
66.2%
+26.2% vs TC avg
§102
21.5%
-18.5% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 705 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detailed Action Drawings Objection Withdrawal Applicant’s amendment of Claim 44 is acknowledged. Thus, the objection to drawings is withdrawn. Claim Rejections Withdrawal Applicant’s amendment of Claim 44 is acknowledged. Thus, the rejection under 35 U.S.C. 112(a) is withdrawn. Claim Rejections – 35 U.S.C. 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 27 rejected under 35 U.S.C. 103 as being unpatentable over Staab (U.S. Patent No. 5,610,790) of record, in view of Zhang (CN 113745347, machine-translation provided). Regarding Claim 27 FIG. 9 of Staab discloses an integrated circuit device, comprising: a semiconductor substrate having a first side (front) and a second side (back), wherein the first side and the second side are opposite-facing major surfaces of the semiconductor substrate at which the semiconductor substrate interfaces with dielectric materials (901); a gate structure (950) on the first side; and a first PN diode comprising: a first well (920) extending from the first side to the second side, the first well having a first doping type (p); a second well (910) extending from the first side to the second side, the second well having a second doping type (n) opposite the first doping type; a body region (940) extending from the first side to the second side directly beneath the gate structure, wherein the body region separates the first and second wells, and has a lower dopant concentration than the dopant concentrations of the first and second wells; a first metal structure (701) disposed on the first side, wherein the first metal structure contacts the first well at the first side, and a second metal structure (705) contacting the second well. Staab is silent with respect to “a second metal structure disposed on the second side, wherein the second metal structure contacts the second well at the second side” and “the first metal structure and the second metal structure are spaced apart by a thickness of the semiconductor substrate”. FIG. 1 of Zhang discloses a similar integrated circuit device, wherein the anode is disposed on the first side and contacts the first well at the first side; and the cathode is disposed on the second side and contacts the second well at the second side [0031]. Because the first metal structure is disposed on the first side and contacts the second well; and the second metal structure is disposed on the front back and contacts the second well; it would have been obvious to one of ordinary skill in the art that the first metal structure and the second metal structure are spaced apart by a thickness of the semiconductor substrate. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Zhang, because the claimed configuration was a matter of choice, which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant (for example, to reduce parasitic capacitance). In re Dailey 149 USPQ 47, 50 (CCPA 1966). See also Glue Co. v. Upton 97 US 3,24 (USSC 1878). MPEP 2144.04. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of fast recovery speed, large softness, simple process and low cost (Abstract of Zhang). Claims 28-32 rejected under 35 U.S.C. 103 as being unpatentable over Staab and Zhang, in view of Xiao (U.S. Patent Pub. No. 2012/0032732) of record. Regarding Claim 28 Staab as modified by Zhang discloses Claim 27. Staab as modified by Zhang is silent with respect to “a boundary between the first well and the body region is aligned with a sidewall spacer on one side of the gate structure; and a boundary between the second well and the body region is aligned with a sidewall spacer on an opposite side of the gate structure”. FIG. 13 of Xiao discloses a similar integrated circuit device, wherein: a boundary between the first well and the body region is aligned with a sidewall spacer on one side of the gate structure; and a boundary between the second well and the body region is aligned with a sidewall spacer on an opposite side of the gate structure. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Xiao. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of reducing short channel effects ([0004] of Xiao). Regarding Claim 29 FIG. 13 of Xiao discloses a distance between the first and second sides is greater than a width of the gate structure [0009]. Regarding Claim 30 FIG. 13 of Xiao discloses the width of the gate structure is 100 nm or less [0009]. Regarding Claim 31 FIG. 13 of Xiao discloses the width of the gate structure is 28 nm or less [0009]. Regarding Claim 32 FIG. 13 of Xiao discloses the gate structure is a fin-field effect transistor [0002]. Claim 33 rejected under 35 U.S.C. 103 as being unpatentable over Staab, Zhang and Xiao, in view of Iwahori (WO 2019116883) of record. Regarding Claim 33 Staab as modified by Zhang and Xiao discloses Claim 29. Staab as modified by Zhang and Xiao is silent with respect to “the gate structure comprises nanosheets or nanowires”. FIG. 24 of Iwahori discloses a similar integrated circuit device, wherein: the gate structure comprises nanosheets or nanowires. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Iwahori. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of reducing the gate length and improving integration and operation speed (BACKGROUND-ART of Iwahori). Claim 34 rejected under 35 U.S.C. 103 as being unpatentable over Staab and Zhang, in view of Masayuki (CN 101714573) of record. Regarding Claim 34 Staab as modified by Zhang discloses Claim 27. Staab as modified by Zhang is silent with respect to “the first well and the second well are degenerately doped”. FIG. 5 of Masayuki discloses a similar integrated circuit device, wherein: the first well and the second well are degenerately doped [0004]. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Masayuki. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of monolithically integration lateral IGBT and diode ([0003] of Masayuki). Claim 35 rejected under 35 U.S.C. 103 as being unpatentable over Staab and Zhang, in view of Tseng (U.S. Patent Pub. No. 2017/0084604) of record. Regarding Claim 35 Staab as modified by Zhang discloses Claim 27. Staab as modified by Zhang is silent with respect to “the first and second metal structures contact the first and second wells respectively through silicide pads”. FIG. 3 of Tseng discloses a similar integrated circuit device, wherein the first and second metal structures contact the first and second wells respectively through silicide pads [0030]. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Tseng. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of preventing degradation of the underlying substrate and improving electric connection. Claims 36, 38-41 and 43-46 rejected under 35 U.S.C. 103 as being unpatentable over Staab, in view of Sharma (U.S. Patent Pub. No. 2020/0411510) of record, in view Zhang. Regarding Claim 36 FIG. 9 of Staab discloses an integrated circuit device, comprising: a semiconductor substrate having a first side (front) and a second side (back), which are opposite-facing sides separated by a thickness of the semiconductor substrate; a gate structure (950) on the first side; a first PN diode comprising: a first well (920) extending from the first side to the second side, the first well having a first doping type (p); a second well (910) extending from the first side to the second side, the second well having a second doping type (n) opposite the first doping type; a body region (940) extending from the first side to the second side directly beneath the gate structure, wherein the body region separates the first and second wells, and has a lower dopant concentration than the dopant concentrations of the first and second wells; a first contact plug (plug connecting 701 and 920) disposed on the first side, wherein the first metal structure contacts the first well, a second contact plug (plug connecting 705 and 910) contacting the second well, and wherein a second dielectric layer (890) disposed over the second side. Staab is silent with respect to “a first dielectric layer on the first side”; “a second dielectric layer on the second side”; “a second contact plug, wherein the second contact plug extends through the second dielectric layer to electrically connect the second well to a second wire, wherein the second contact plug lands on the second side without extending through the semiconductor substrate”; “the first contact plug extends through the first dielectric layer to electrically connect the first well to a first wire” and “the first contact plug lands on the first side without extending through the semiconductor substrate”. FIG. 1 of Sharma discloses a similar integrated circuit device, comprising a first dielectric layer on the first side; a first contact plug extends through a the first dielectric layer to electrically connect the first well to a first wire, a second contact plug extends through a the second dielectric layer to electrically connect the second well to a second wire. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Sharma. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of providing protection. Staab as modifed by Sharma is silent with respect to “a second dielectric layer on the second side”; and “the second contact plug lands on the second side without extending through the semiconductor substrate”. FIG. 1 of Zhang discloses a similar integrated circuit device, wherein the anode is disposed on the first side and contacts the first well at the first side; and the cathode is disposed on the second side and contacts the second well at the second side [0032]. Because the first contact plug contacts the anode; and the second contact plug contacts the cathode; it would have been obvious to one of ordinary skill in the art that the first contact plug extends through a the first dielectric layer to electrically connect the first well to a first wire; and the second contact plug extends through a the second dielectric layer to electrically connect the second well to a second wire, wherein the second dielectric layer is on the second side; and the second contact plug lands on the second side without extending through the semiconductor substrate. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Zhang, because the claimed configuration was a matter of choice, which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant (for example, to reduce parasitic capacitance). In re Dailey 149 USPQ 47, 50 (CCPA 1966). See also Glue Co. v. Upton 97 US 3,24 (USSC 1878). MPEP 2144.04. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of fast recovery speed, large softness, simple process and low cost (Abstract of Zhang). Regarding Claim 38 Modified Staab discloses a vertical separation between the first contact plug and the second contact plug is greater than a lateral separation between the first contact plug and the second contact plug. Regarding Claim 39 Modified Staab discloses the first contact plug and the second contact plug are separated by a thickness of the semiconductor substrate. Regarding Claim 40 Modified Staab discloses a second PN diode comprising: a third well extending from the first side to the second side, the third well having the first doping type; a fourth well extending from the first side to the second side, the fourth well having a second doping type opposite the first doping type; a body region extending from the first side to the second side directly beneath a second gate structure, wherein the body region separates the third and fourth wells, and has a lower dopant concentration than the dopant concentrations of the third and fourth wells; a third contact plug for the third well, wherein the third contact plug extends through the second dielectric layer, wherein the third contact plug lands on the second side without extending through the semiconductor substrate; and a fourth contact plug for the second well, wherein the fourth contact plug extends through the first dielectric layer, wherein the fourth contact plug lands on the first side without extending through the semiconductor substrate. Regarding Claim 41 FIG. 1 of Sharma discloses the first and second PN diodes are part of an electrostatic discharge protection circuit [0003]. Regarding Claim 43 FIG. 9 of Staab discloses an integrated circuit device, comprising: a semiconductor substrate having a first side (front) and a second side (back), wherein the second side is opposite-facing from the first side; a gate structure (950) on the first side; a first PN diode comprising: a first well (920) extending from the first side to the second side, the first well having a first doping type (p); a second well (910) extending from the first side to the second side, the second well having a second doping type (n) opposite the first doping type; a body region (940) extending from the first side to the second side directly beneath the gate structure, wherein the body region separates the first and second wells, and has a lower dopant concentration than the dopant concentrations of the first and second wells; a first metal interconnect structure (701) disposed on the first side, wherein the first metal interconnect structure contacts the first well at the first side, and a second metal interconnect structure (705) contacts the second well. Staab is silent with respect to “a second metal interconnect structure disposed on the second side”; “the first and second metal interconnect structures each comprise: a dielectric structure in direct contact with the semiconductor substrate; a plurality of via layers comprising vias disposed within the dielectric structure; and a plurality of metallization layers comprising wires disposed within the dielectric structure; wherein the metallization layers are interleaved with the via layers”; “the first metal interconnect structure contacts the first well at the first side; and the second metal interconnect structure contacts the second well at the second side”. FIG. 1 of Sharma discloses a similar integrated circuit device, comprising a first metal interconnect structure disposed on the first side; a second metal interconnect structure, wherein the first and second metal interconnect structures each comprise: a dielectric structure in direct contact with the semiconductor substrate; a plurality of via layers comprising vias disposed within the dielectric structure; and a plurality of metallization layers comprising wires disposed within the dielectric structure; wherein the metallization layers are interleaved with the via layers; the first metal interconnect structure contacts the first well at the first side; and the second metal interconnect structure contacts the second well. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Sharma. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of providing protection. Staab as modifed by Sharma is silent with respect to “a second metal interconnect structure disposed on the second side”; and “the second metal interconnect structure contacts the second well at the second side”. FIG. 1 of Zhang discloses a similar integrated circuit device, wherein the anode is disposed on the first side and contacts the first well at the first side; and the cathode is disposed on the second side and contacts the second well at the second side [0032]. Because the first metal structure contacts the anode; and the second metal structure contacts the cathode; it would have been obvious to one of ordinary skill in the art that the first metal interconnect structure contacts the first well at the first side; and the second metal interconnect structure contacts the second well at the second side. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Zhang, because the claimed configuration was a matter of choice, which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant (for example, to reduce parasitic capacitance). In re Dailey 149 USPQ 47, 50 (CCPA 1966). See also Glue Co. v. Upton 97 US 3,24 (USSC 1878). MPEP 2144.04. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of fast recovery speed, large softness, simple process and low cost (Abstract of Zhang). Regarding Claim 44 Modified Staab discloses the first metal interconnect structure contacts the first well without extending through the semiconductor substrate; and the second metal interconnect structure contacts the second well without extending through the semiconductor substrate. Regarding Claim 45 Modified Staab discloses the first metal interconnect structure comprises a metallization layer with two or more parallel wires, both of which are coupled to the first well; and the second metal interconnect structure comprises a metallization layer with two or more parallel wires, both of which are coupled to the second well. Regarding Claim 46 Modified Staab discloses the first metal interconnect structure comprises two parallel wires in adjacent metallization layer which are coupled to the first contact plug and which are coupled to one another by a plurality of vias; and the second metal interconnect structure comprises two parallel wires in adjacent metallization layers which are coupled to the second contact plug and which are coupled to one another by a plurality of vias. Claims 37 and 42 rejected under 35 U.S.C. 103 as being unpatentable over Staab Sharma and Zhang, in view of Wang (U.S. Patent Pub. No. 2018/0158935) of record. Regarding Claim 37 Staab as modified by Sharma and Zhang discloses Claim 36. Staab as modified by Sharma and Zhang is silent with respect to “a boundary between the first well and the body region is aligned with a sidewall spacer on one side of the gate structure; and a boundary between the second well and the body region is aligned with a sidewall spacer on an opposite side of the gate structure”. FIG. 8 of Wang discloses a similar integrated circuit device, wherein: the first and second wells border opposite sides of the gate structure at the first side. It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Staab, as taught by Wang. The ordinary artisan would have been motivated to modify Staab in the above manner for purpose of reducing current leakage ([0004] of Wang). Regarding Claim 42 FIG. 8 of Wang discloses first PN diode is a P+/N-well diode and the second PN diode is an N+/P-well diode. Pertinent Art FIG. 2 of Yang (CN 111509074) discloses the other (261) has a contact (153) on the back side. FIG. 13 of Fan (CN 110707151) discloses the other (5) has a contact (11) on the back side. Shaffer (U.S. Patent Pub. No. 2018/0053926) discloses the first metal structure contacts the first well at the first side; and a second metal structure disposed on the second side, wherein the second metal structure contacts the second well at the second side; wherein the first metal structure and the second metal structure are spaced apart by a thickness of the semiconductor substrate. Pertinent art also includes WO 2014087600, U.S. Patent Pub. No. 20170069615, 20100232077, 20080023767 and 20040240127. Response to Arguments Applicant’s arguments with respect to Claims 27-46 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG-BAI ZHU whose telephone number is (571)270-3904. The examiner can normally be reached on 11am – 7pm EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on (571)270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHENG-BAI ZHU/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Mar 27, 2024
Application Filed
Jan 27, 2025
Non-Final Rejection — §103
Feb 28, 2025
Applicant Interview (Telephonic)
Feb 28, 2025
Examiner Interview Summary
May 05, 2025
Response Filed
May 14, 2025
Final Rejection — §103
Jul 24, 2025
Examiner Interview Summary
Jul 24, 2025
Applicant Interview (Telephonic)
Aug 19, 2025
Request for Continued Examination
Aug 27, 2025
Response after Non-Final Action
Nov 30, 2025
Non-Final Rejection — §103
Jan 07, 2026
Examiner Interview Summary
Jan 07, 2026
Applicant Interview (Telephonic)
Mar 03, 2026
Response Filed
Mar 20, 2026
Final Rejection — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
63%
Grant Probability
67%
With Interview (+4.8%)
2y 11m
Median Time to Grant
High
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