Prosecution Insights
Last updated: October 02, 2026
Application No. 18/618,854

DISPLAY DEVICE

Final Rejection §103§112
Filed
Mar 27, 2024
Priority
Jun 22, 2023 — RE 10-2023-0080593
Examiner
DYKES, LAURA M
Art Unit
Tech Center
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
66%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allowance Rate
349 granted / 528 resolved
+6.1% vs TC avg
Strong +27% interview lift
Without
With
+26.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
34 currently pending
Career history
554
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
56.8%
+16.8% vs TC avg
§102
23.3%
-16.7% vs TC avg
§112
13.7%
-26.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 528 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This OA is in response to the amendment filled on 8/12/2026 that has been entered, wherein claims 1-20 are pending. Specification The objection to the specification is withdrawn in light of Applicant’s amendment 8/12/2026. Claim Rejections - 35 USC § 112 The rejection of claims 5 and 20 is withdrawn in light of Applicant’s amendment 8/12/2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-11 are rejected under 35 U.S.C. 103 as being unpatentable over Ahn et al. (US 2021/0318718 A1) in view of Lee et al. (KR 2015/0136662 A) herein Lee ‘662, both of record. Regarding claim 1, Ahn teaches a display device(Fig. 2) comprising: a display panel(DP, Fig. 4) including a display area(DP-DA) and a surrounding area(DP-NDA) surrounding the display area(DP-DA); a gate driver(GDC, ¶0091) in the surrounding area(DP-NDA) of the display panel(DP); and a bottom panel(AM, ¶0102) below the display panel(DP) and including a cutout area(LTA, ¶0102) having a width in a first direction(DR2) in a plan view(Fig. 5A), wherein the cutout area(LTA, ¶0102) comprises an opening(OP, ¶0110) through the bottom panel(AM, ¶0102). Ahn is not relied on to teach a cutout area(LTA, ¶0102) having a width in a range of 1 micrometers (μm) to 160 μm. Lee ‘662 teaches a display device(Fig. 4) comprising a cutout area(OP, ¶0043) having a width in a range of 1 micrometers (μm) to 160 μm(¶0043). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ahn, so that the cutout area has a width in a range of 1 micrometers (μm) to 160 μm, as taught by Lee ‘662, in order to prevent the user from recognizing the alignment key and degradation of the product quality(¶0043). Regarding claim 2, Ahn teaches the display device of claim 1, wherein the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) are spaced apart from each other in the first direction(DR2) in the plan view(Fig. 4, Fig. 5A, ¶0103, wherein cutout LTA overlaps alignment mark AK). Regarding claim 3, Ahn teaches the display device of claim 2, in the plan view, a separation distance(Fig. 4) between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2). Ahn and Lee ‘622 do not explicitly state a separation distance(Fig. 4) between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2) is in a range of 280 μm to 1000 μm. However, Ann teaches the cutout area(LTA, ¶0102) is shaped to allow an alignment mark to be visible(¶0103). Ann show the relative position between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2) and Lee ‘622 teaches the cutout area(OP, ¶0043) having a width in a range of 1 micrometers (μm) to 160 μm(¶0043). Increasing or decreasing the separation distance between the gate driver and the cutout area directly impacts the size of the non-display surrounding area and display size. A person of ordinary skill in the art would be motivated to optimize the balance of visibility of the alignment mark with the overall size of the non-display area. Accordingly, it would have been obvious for one of ordinary skill in the art at the time the invention was made to make a separation distance between the gate driver and the cutout area in the first direction in a range of 280 μm to 1000 μm since it has been held that when the prior art discloses the general conditions of the claimed invention, discovering the optimum or workable ranges involves only ordinary skill in the art. See MPEP 2144.05. Regarding claim 4, Ahn teaches the display device of claim 3. Ahn and Lee ‘622 do not explicitly state the separation distance is in a range of 1.75 to 1000 times the width of the cutout area(LTA, ¶0102) in the first direction(DR2). However, Ann teaches the cutout area(LTA, ¶0102) is shaped to allow an alignment mark to be visible(¶0103). Ann show the relative position between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2) and Lee ‘622 teaches the cutout area(OP, ¶0043) having a width in a range of 1 micrometers (μm) to 160 μm(¶0043). Increasing or decreasing the separation distance between the gate driver and the cutout area and increasing or decreasing the width of the cutout area directly impacts the size of the non-display surrounding area and display size. A person of ordinary skill in the art would be motivated to optimize the balance of visibility of the alignment mark with the overall size of the non-display area. Accordingly, it would have been obvious for one of ordinary skill in the art at the time the invention was made to make the separation distance is in a range of 1.75 to 1000 times the width of the cutout area in the first direction since it has been held that when the prior art discloses the general conditions of the claimed invention, discovering the optimum or workable ranges involves only ordinary skill in the art. See MPEP 2144.05. Regarding claim 5, Ahn teaches the display device of claim 1, wherein a width of the cutout area(LTA, ¶0102) in the first direction(DR2) is smaller(Fig. 5A) than a width of the cutout area(LTA, ¶0102) in a second direction(DR1) intersecting the first direction(DR2). Regarding claim 6, Ahn teaches the display device of claim 1, further comprising: an alignment mark(AK, ¶0103) in the surrounding area(DP-NDA) of the display panel(DP), and wherein a number of the alignment mark(AK, ¶0103) and a number of the cutout area(LTA, ¶0102) are the same(Fig. 5A). Regarding claim 7, Ahn teaches the display device of claim 6, wherein the alignment mark(AK, ¶0103) and the cutout area(LTA, ¶0102) correspond one-to-one(Fig. 5A). Regarding claim 8, Ahn teaches the display device of claim 6, wherein the alignment mark(AK, ¶0103) and the cutout area(LTA, ¶0102) overlap in the plan view(Fig. 5B). Regarding claim 9, Ahn teaches the display device of claim 1, wherein the cutout area(LTA, ¶0102) is spaced apart from the display area(DP-DA) in the first direction(DR2) in the plan view with the gate driver(GDC, ¶0091) interposed therebetween(Fig. 4, Fig. 5A, ¶0103, wherein cutout LTA overlaps alignment mark AK). Regarding claim 10, Ahn teaches the display device of claim 1, wherein a planar area of the bottom panel(AM, ¶0102) is smaller(Fig. 6) than a planar area of the display panel(DP). Regarding claim 11, Ahn teaches the display device of claim 1, wherein the gate driver(GDC, ¶0091) includes at least one transistor(plurality of thin-film transistors, not illustrated, ¶0091), and the transistor(plurality of thin-film transistors, not illustrated, ¶0091) includes an active pattern including a semiconductor material(¶0091). Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Ahn et al. (US 2021/0318718 A1) and Lee et al. (KR 2015/0136662 A) herein Lee ‘662 as applied to claim 1 above, further in view of Lee et al. (US 2022/0037430 A1) herein Lee ‘430, all of record. Regarding claim 12, Ahn, in view of Lee ‘662 teaches the display device of claim 11, but is not relied on to teach the gate driver(GDC, ¶0091) includes a PMOS transistor. Lee ‘430 teaches a display device(Fig. 4) wherein the gate driver(120, ¶0087) includes a PMOS transistor(p-channel metal oxide semiconductor ¶0087). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ann, so that the gate driver includes a PMOS transistor, as taught by Lee ‘430, so that the gate voltage is decreased, an amount of a current is increased, and the pixel and the light-emitting device OLED may emit light at a high brightness(¶0190). Regarding claim 13, Ahn, in view of Lee ‘662, teaches the display device of claim 11, wherein the gate driver(GDC, ¶0091) includes an NMOS transistor. Lee ‘430 teaches a display device(Fig. 4) wherein the gate driver(120, ¶0087) includes a NMOS transistor(N-channel metal oxide semiconductor ¶0087). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ann, so that the gate driver includes a PMOS transistor, as taught by Lee ‘430, so that a source voltage is lower than a drain voltage so as to allow electrons to flow from the source to the drain(¶0088). Claims 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Ahn et al. (US 2021/0318718 A1) and Lee et al. (KR 2015/0136662 A) herein Lee ‘662 as applied to claim 1 above, further in view of Song et al. (US 2020/0381502 A1) herein Lee ‘430 all of record. Regarding claim 14, Ahn, in view of Lee ‘662 teaches the display device of claim 11, wherein the display panel(DP) further includes a substrate(SUB) below the active pattern(¶0091) Ahn and Lee ‘662 are not relied on to teach the substrate(SUB) includes: a first substrate; a first barrier layer on the first substrate; a second substrate on the first barrier layer; and a second barrier layer on the second substrate. Song teaches a display device(Fig. 6) wherein the substrate(100, ¶0087) includes: a first substrate(101, ¶0087); a first barrier layer(102, ¶0087) on the first substrate(101, ¶0087); a second substrate(103, ¶0087) on the first barrier layer(102, ¶0087); and a second barrier layer(104, ¶0087) on the second substrate(103, ¶0087). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ahn so that the substrate includes: a first substrate; a first barrier layer on the first substrate; a second substrate on the first barrier layer; and a second barrier layer on the second substrate, as taught by Song, in order to prevent or reduce penetration of an external foreign substance(¶0089). Regarding claim 15, Ahn, in view of Lee ‘662 teaches the display device of claim 14, but is not relied on to teach the first substrate and the second substrate include polyimide. Song teaches a display device(Fig. 6) wherein the first substrate(101, ¶0087) and the second substrate(103, ¶0087) include polyimide(¶0088). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ahn so that the first substrate and the second substrate include polyimide, as taught by Song, in order use a material having excellent light transmittance, heat resistance, chemical resistance, mechanical strength(¶0064,¶0088). Claims 16 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Ahn et al. (US 2021/0318718 A1) in view of Lee et al. (KR 2015/0136662 A) herein Lee ‘662 and Lee et al. (US 2022/0037430 A1) herein Lee ‘430 all of record. Regarding claim 16, Ahn teaches a display device(Fig. 2) comprising: a display panel(DP) including a display area(DP-DA) and a surrounding area(DP-NDA) surrounding the display area(DP-DA); a gate driver(GDC, ¶0091) in the surrounding area(DP-NDA) of the display panel(DP) and including at least one transistor(plurality of thin-film transistors, not illustrated, ¶0091) including an active pattern including a semiconductor material(¶0091); and a bottom panel(AM, ¶0102) below the display panel(DP) and including a cutout area(LTA, ¶0102) having a width(inherent) in a first direction(DR2) in the plan view(Fig. 5A), wherein the cutout area(LTA, ¶0102) comprises an opening(OP, ¶0110) through the bottom panel(AM, ¶0102). Ahn is not relied on to teach a metal layer below the active pattern and at least a portion of the metal layer overlaps the active pattern in a plan view; a cutout area(LTA, ¶0102) having a width(inherent) in a range of 1 micrometer (μm) to 160 μm in a first direction(DR2) in the plan view. Lee ‘662 teaches a display device(Fig. 4) comprising a cutout area(OP, ¶0043 having a width in a range of 1 micrometers (μm) to 160 μm(¶0043). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ahn, so that the cutout area has a width in a range of 1 micrometers (μm) to 160 μm, as taught by Lee ‘662, in order to prevent the user from recognizing the alignment key and degradation of the product quality(¶0043). Ahn and Lee ’66 are not relied on to teach a metal layer below the active pattern and at least a portion of the metal layer overlaps the active pattern in a plan view. Lee ‘430 teaches a display device(Fig. 21A) wherein a metal layer(M01, ¶0184) below the active pattern and at least a portion of the metal layer(M01, ¶0184) overlaps the active pattern in a plan view(¶0184). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ann, to include a metal layer below the active pattern and at least a portion of the metal layer overlaps the active pattern in a plan view, as taught by Lee ‘430, in order to have an optical shield overlapping the active pattern(¶0184). Regarding claim 18, Ahn teaches the display device of claim 16, wherein the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) are spaced apart in the first direction(DR2) in the plan view, a separation distance between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2). Ahn, Lee ‘622 and Lee ‘430 do not explicitly state a separation distance(Fig. 4) between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2) is in a range of 280 μm to 1000 μm. However, Ann teaches the cutout area(LTA, ¶0102) is shaped to allow an alignment mark to be visible(¶0103). Ann show the relative position between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2) and Lee ‘622 teaches the cutout area(OP, ¶0043) having a width in a range of 1 micrometers (μm) to 160 μm(¶0043). Increasing or decreasing the separation distance between the gate driver and the cutout area directly impacts the size of the non-display surrounding area and display size. A person of ordinary skill in the art would be motivated to optimize the balance of visibility of the alignment mark with the overall size of the non-display area. Accordingly, it would have been obvious for one of ordinary skill in the art at the time the invention was made to make a separation distance between the gate driver and the cutout area in the first direction in a range of 280 μm to 1000 μm since it has been held that when the prior art discloses the general conditions of the claimed invention, discovering the optimum or workable ranges involves only ordinary skill in the art. See MPEP 2144.05. Regarding claim 19, Ahn teaches the display device of claim 18. Ahn, Lee ‘622 and Lee ‘430 do not explicitly state the separation distance is in a range of 1.75 to 1000 times the width of the cutout area(LTA, ¶0102) in the first direction(DR2). However, Ann teaches the cutout area(LTA, ¶0102) is shaped to allow an alignment mark to be visible(¶0103). Ann show the relative position between the gate driver(GDC, ¶0091) and the cutout area(LTA, ¶0102) in the first direction(DR2) and Lee ‘622 teaches the cutout area(OP, ¶0043) having a width in a range of 1 micrometers (μm) to 160 μm(¶0043). Increasing or decreasing the separation distance between the gate driver and the cutout area and increasing or decreasing the width of the cutout area directly impacts the size of the non-display surrounding area and display size. A person of ordinary skill in the art would be motivated to optimize the balance of visibility of the alignment mark with the overall size of the non-display area. Accordingly, it would have been obvious for one of ordinary skill in the art at the time the invention was made to make the separation distance is in a range of 1.75 to 1000 times the width of the cutout area in the first direction since it has been held that when the prior art discloses the general conditions of the claimed invention, discovering the optimum or workable ranges involves only ordinary skill in the art. See MPEP 2144.05. Regarding claim 20, Ahn teaches the display device of claim 16, wherein a width of the cutout area(LTA, ¶0102) in the first direction(DR2) is smaller(Fig. 5A) than a width of the cutout area(LTA, ¶0102) in a second direction(DR1) intersecting the first direction(DR2). Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Ahn et al. (US 2021/0318718 A1), Lee et al. (KR 2015/0136662 A) herein Lee ‘662 and Lee et al. (US 2022/0037430 A1) herein Lee ‘430 as applied to claim 16 above, further in view of Song et al. (US 2020/0381502 A1) herein Lee ‘430 all of record. Regarding claim 17, Ahn, in view of Lee ‘662 and Lee ‘430, teaches the display device of claim 16, wherein the display panel(DP) further includes a substrate(SUB) below the active pattern further includes a substrate(SUB) below the active pattern(¶0091). Ahn, Lee ‘662 and Lee ‘443 are not relied on to teach the substrate(SUB) includes: a first substrate; a first barrier layer on the first substrate; a second substrate on the first barrier layer; and a second barrier layer on the second substrate. Song teaches a display device(Fig. 6) wherein the substrate(100, ¶0087) includes: a first substrate(101, ¶0087); a first barrier layer(102, ¶0087) on the first substrate(101, ¶0087); a second substrate(103, ¶0087) on the first barrier layer(102, ¶0087); and a second barrier layer(104, ¶0087) on the second substrate(103, ¶0087). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ahn so that the substrate includes: a first substrate; a first barrier layer on the first substrate; a second substrate on the first barrier layer; and a second barrier layer on the second substrate, as taught by Song, in order to prevent or reduce penetration of an external foreign substance(¶0089). Response to Arguments Applicant's arguments filed on 8/12/2026 have been fully considered but they are not persuasive. Regarding claims 1 and 16, Applicant argues the width of the opening OP of Lee '662 should not disclose the claimed width because the opening OP does not include "an opening through the bottom panel" as recited in amended claims 1 and 16. FIG. 4 of Lee '662, appears to show the opening OP of the light shielding layer LS as being above the display panel (e.g., the thin film transistor array substrate 110 and color filter substrate 210). That is, the opening OP is not below the display panel. The examiner respectfully submits that Ahn is relied on to teach the cutout area(LTA, ¶0102) comprises an opening(OP, ¶0110) through the bottom panel(AM, ¶0102). Further the FS surface of Lee ‘662 is interpreted as the bottom surface of the display panel, and thus opening OP is through the bottom panel LS. Applicants argue further Lee '662 does not appear to cure the deficiencies of Ahn to reject amended claims 1 and 16, and there is no apparent reason why a person having ordinary skill in the art would have modified the disclosures of the cited references to arrive at the embodiments of amended claims 1 and 16. The examiner respectfully submits that a person of ordinary skill in the art would be motivated to modify the size of the cutout area of Ahn so that it has a width in a range of 1 micrometers (μm) to 160 μm, as taught by Lee ‘662, in order to prevent the user from recognizing the alignment key and degradation of the product quality(¶0043). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA DYKES whose telephone number is (571)270-3161. The examiner can normally be reached M-F 9:30 am-5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at 571-272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAURA M DYKES/Examiner, Art Unit 2892
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Prosecution Timeline

Mar 27, 2024
Application Filed
May 14, 2026
Non-Final Rejection mailed — §103, §112
Aug 12, 2026
Response Filed
Sep 04, 2026
Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
66%
Grant Probability
93%
With Interview (+26.9%)
2y 8m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 528 resolved cases by this examiner. Grant probability derived from career allowance rate.

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