DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Applicant’s election without traverse of Claims 1-13 in the reply filed on July 10th, 2026 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Choi et al. (U.S. Patent Application Publication No. 2021/0091320).
Regarding to claim 1, Choi teaches a display device comprising:
pixels arranged in a display area (Figs. 1-2, Fig. 5B; [0064], lines 1-3);
a pixel circuit layer comprising a pixel circuit (Figs. 1-2, Fig. 5B; [0141], lines 1-4); and
a partition wall on the pixel circuit layer in the display area and in a non-display area, the non-display area being an area other than the display area, the partition wall comprising a pixel defining layer and a separator on the pixel defining layer (Fig. 5A, please see the annotations in the attached figures),
wherein, in the non-display area, one end portion of the pixel defining layer and one end portion of the separator do not overlap with each other in a plan view (Fig. 5A, please see the annotations in the attached figures).
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Claims 1-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cao (U.S. Patent Application Publication No. 2020/0127235).
Regarding to claim 1, Cao teaches a display device comprising:
pixels arranged in a display area (Figs. 2-3; pixels arranged in display area 101);
a pixel circuit layer comprising a pixel circuit (Figs. 2-3; [0062], lines 1-2); and
a partition wall on the pixel circuit layer in the display area and in a non-display area, the non-display area being an area other than the display area, the partition wall comprising a pixel defining layer and a separator on the pixel defining layer (Fig. 3, partition wall on the pixel circuit layer in the display area 101 and in non-display area 102, comprising pixel defining layer 210/220 and separator 410/420 on the pixel defining layer),
wherein, in the non-display area, one end portion of the pixel defining layer and one end portion of the separator do not overlap with each other in a plan view (Fig. 3, please see the annotations in the attached figure).
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Regarding to claim 2, Cao teaches
a first pixel defining layer on the pixel circuit layer, the first pixel defining layer having a first defining layer width (Fig. 3, element 210); and
a second pixel defining layer on the first pixel defining layer, the second pixel defining layer having a second defining layer width (Fig. 3, element 220), and
wherein the separator comprises:
a first separator on the pixel defining layer, the first separator having a first separator width (Fig. 3, element 410); and
a second separator on the first separator, the second separator having a second separator width (Fig. 3, element 420).
Regarding to claim 3, Cao teaches the first defining layer width is larger than the second defining layer width, and wherein the pixel defining layer has a non-flat side surface (Fig. 3).
Regarding to claim 4, Cao teaches the first separator width is smaller than the second defining layer width, and wherein the second separator width is smaller than the first separator width (Fig. 3).
Regarding to claim 5, Cao teaches the separator has a curved surface, and wherein the second separator is inward of the first separator in a direction in which a plane on which the pixel circuit layer is arranged extends (Fig. 3).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6-8 are rejected under 35 U.S.C. 103 as being unpatentable over Cao (U.S. Patent Application Publication No. 2020/0127235), as applied to claims 1-2 above.
Regarding to claim 6, Cao does not disclose the pixel defining layer further comprises a third pixel defining layer on the second pixel defining layer, the third pixel defining layer having a third defining layer width, and wherein the separator further comprises a third separator on the second separator, the third separator having a third separator width. However, it would have been obvious to one having ordinary skill in the art at the time the invention was filed to configure a third pixel defining layer on the second pixel defining layer, the third pixel defining layer having a third defining layer width, and a third separator on the second separator, the third separator having a third separator width. in order to increase insulation, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8 (CA7 1977).
Regarding to claim 7, Cao as modified results in end portions of the first pixel defining layer, the second pixel defining layer, and the third pixel defining layer do not overlap with each other in the plan view (because the first, the second, and the third pixel defining layers have different widths).
Regarding to claim 8, it would have been an obvious matter of design choice to configure end portions of the first pixel defining layer, the second pixel defining layer, and the third pixel defining layer overlapping with each other in the plan view, since applicant has not disclosed that the overlapping arrangement solves any stated problem or is for any particular purpose and it appears that the invention would perform equally well if end portions of the first pixel defining layer, the second pixel defining layer, and the third pixel defining layer do not overlap with each other in the plan view (claim 7 above).
Allowable Subject Matter
Claims 9-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
Regarding to claim 9, the prior art fails to anticipate or render obvious the claimed limitations including “end portions of the first separator and the third pixel defining layer do not overlap with each other in the plan view, and wherein the second separator width is smaller than each of the first separator width and the third separator width” in combination with the limitations recited in claims 1-2 and 6-7.
Regarding to claim 10, the prior art fails to anticipate or render obvious the claimed limitations including “end portions of the first separator and the third pixel defining layer do not overlap with each other in the plan view, and wherein the first separator width, the second separator width, and the third separator width are the same” in combination with the limitations recited in claims 1-2 and 6-7.
Regarding to claim 11, the prior art fails to anticipate or render obvious the claimed limitations including “end portions of the first separator and the third pixel defining layer do not overlap with each other in the plan view, and wherein the second separator width is smaller than each of the first separator width and the third separator width” in combination with the limitations recited in claims 1-2, 6 and 8.
Regarding to claim 12, the prior art fails to anticipate or render obvious the claimed limitations including “a first electrode and a second electrode on the pixel circuit layer, wherein the second electrode comprises a (2-1)th electrode in the display area and a (2-2)th electrode in the non-display area, and wherein the (2-2)th electrode is on the partition wall” in combination with the limitations recited in claims 1-2, 6-7, and 9.
Pertinent Art
For the benefits of the Applicant, US-6218309-B1, US-10095054-B2, US-11374189-B2, US-10749140-B2, US-20180004016-A1, US-10840478-B2, US-11991905-B2, US-11258042-B2, and US-12389782-B2, are cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. These references fail to disclose “end portions of the first pixel defining layer, the second pixel defining layer, and the third pixel defining layer do not overlap with each other in the plan view.”
Conclusion
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/VU A VU/Primary Examiner, Art Unit 2897
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