DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 3/29/24 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 through 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “wherein electronic component” in line 3. The omission of an article adjective renders the antecedence of the limitation unclear, the examiner suggests “wherein the electronic component”.
Claims 2 through 13 depend from and incorporate claim 1.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2, 6, 7, 8, 12, and 13 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Lv (US 2024/0055420)
Regarding claim 1.
Lv teaches:
An electronic device, comprising: an electronic component (fig 2:301,302; [para 0042]) configured to laterally (fig 2:first direction; [para 0042]) receive a power (fig 2:411,412; [para 0081]) and configured to non-laterally transmit a signal (fig 2; [para 0068]), wherein electronic component (fig 2:301,302; [para 0042]) comprises an integrated circuit layer ([para 0062]) configured to receive the power (fig 2:411,412; [para 0081]).
Regarding claim 2.
Lv teaches the electronic device of claim 1,
Lv teaches:
the electronic component (fig 2:301,302; [para 0042]) has a first lateral surface configured to be passed by the power and a lower surface configured to be passed by the signal (fig 2; [para 0068]).
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Regarding claim 6.
Lv teaches the electronic device of claim 1, further
Lv teaches:
comprising: a conductive structure (fig 2:40; [para 0081]) laterally disposed adjacent to the electronic component (fig 2:301,302; [para 0042]) and configured to transmit the power (fig 2; [para 0081]).
Regarding claim 7.
Lv teaches the electronic device of claim 6, further
Lv teaches:
comprising: an electrical contact (fig 2:32; [para 0081]) electrically connecting the electronic component (fig 2:301,302; [para 0042]) and the conductive structure (fig 2:40; [para 0081]).
Regarding claim 8.
Lv teaches the electronic device of claim 7, further
Lv teaches:
the electrical contact (fig 2:32; [para 0081]) is disposed between the electronic component (fig 2:301,302; [para 0042]) and the conductive structure (fig 2:40; [para 0081]).
Regarding claim 12.
Lv teaches the electronic device of claim 8, further
Lv teaches:
the electrical contact (fig 2:32; [para 0081]) comprises portions (fig 2:322,321; [para 0081]), each extending downwardly to different elevations relative to an upper surface of the electronic component (fig 2:301,302; [para 0042]).
Regarding claim 13.
Lv teaches the electronic device of claim 6, further
Lv teaches:
a carrier (fig 2:10; [para 0057]) supporting the electronic component (fig 2:301,302; [para 0042]) and the conductive structure (fig 2:40; [para 0081]), wherein the carrier (fig 2:10; [para 0057]) is configured (fig 2:42; [para 0057]) to provide the conductive structure (fig 2:40; [para 0081]) with the power and configured (fig 2:21; [para 0021]) to receive the signal from the electronic component (fig 2:301,302; [para 0042]).
Claim(s) 14 and 15 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Lv (US 2024/0055420)
Regarding claim 14
Lv teaches:
An electronic device, comprising: an integrated circuit component (fig 2:301,302; [para 0042,0062]) having a lateral surface;
and a power supply element (fig 2:40; [para 0043,0081]) disposed adjacent to the integrated circuit (fig 2:301,302; [para 0042,0062]) component and having a first lateral surface, wherein the lateral surface of the integrated circuit (fig 2:301,302; [para 0042,0062]) component and the first lateral surface of the power supply element (fig 2:40; [para 0043,0081]) collectively define a power path.
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Regarding claim 15
Lv teaches:
the power path is in a gap (fig 5f ; [para 0092]) between the integrated circuit component (fig 5f:301,302; [para 0042,0062]) and the power supply element (fig 5f:40; [para 0043,0081]).
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Claim(s) 1, 2, 3, 4, and 5 is/are rejected under 35 U.S.C. 102a2 as being anticipated by Tong (US 2024/0128208)
Regarding claim 1.
Tong teaches:
An electronic device, comprising: an electronic component (fig 7j:142f; [para 0139]) configured (fig 7j:108c; [para 0139]) to laterally receive a power ([para 0077]) and configured (fig 7j:104; [para 0139]) to non-laterally transmit a signal ([para 0077]), wherein electronic component (fig 7j:142f; [para 0139]) comprises an integrated circuit layer (fig 7j:143c; [para 0139]) configured to receive the power ([para 0077]).
Regarding claim 2.
Tong teaches the electronic device of claim 1, further
Tong teaches:
the electronic component (fig 7j:142f; [para 0139]) has a first lateral surface configured to be passed by the power and a lower surface configured to be passed by the signal ([para 0139,0077]).
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Regarding claim 3.
Tong teaches the electronic device of claim 2, further
Tong teaches:
the electronic component (fig 7j:142f; [para 0139]) further comprises a first redistribution structure (fig 7j:108f; [para 0142]) at a lower side of the integrated circuit layer (fig 7j:143c; [para 0139]) and configured to transmit the signal ([para 0077]) as well as a second redistribution structure (fig 7j:108c; [para 0142]) at an upper side, opposite to the lower side, of the integrated circuit layer (fig 7j:143c; [para 0139]) and configured to receive the power ([para 0077]).
Regarding claim 4.
Tong teaches the electronic device of claim 3, further
Tong teaches:
the second redistribution structure (fig 7j:108c; [para 0142]) has a first lateral electrical connection (fig 7j:212; [para 0141]), which is configured to receive the power ([para 0077]), exposed by the first lateral surface of the electronic component (fig 7j:142f; [para 0139]).
Regarding claim 5.
Tong teaches the electronic device of claim 4, further
Tong teaches:
the second redistribution structure (fig 7j:108c; [para 0142]) has a second lateral electrical connection (fig 7j:214; [para 0143]) exposed by a second lateral surface different from the first lateral surface (fig 7j annotated).
Claim(s) 14, 16, and 17 is/are rejected under 35 U.S.C. 102a2 as being anticipated by Tong (US 2024/0128208)
Regarding claim 14.
Tong teaches:
An electronic device, comprising: an integrated circuit component (fig 7j:142f; [para 0139]) having a lateral surface;
and a power supply element (fig 7j:118A; [para 0139]) disposed adjacent to the integrated circuit component (fig 7j:142f; [para 0139]) and having a first lateral surface, wherein the lateral surface of the integrated circuit component (fig 7j:142f; [para 0139]) and the first lateral surface of the power supply element (fig 7j:118A; [para 0139]) collectively define a power path.
Regarding claim 16.
Tong teaches the electronic device of claim 14, further
Tong teaches:
the integrated circuit component (fig 7j:142f; [para 0139]) comprises an integrated circuit layer (fig 7j:143c; [para 0139]), and an elevation of the power path (fig 7j:108c; [para 0139]) is higher than that of the integrated circuit layer (fig 7j:143c; [para 0139]).
Regarding claim 17.
Tong teaches the electronic device of claim 14, further
Tong teaches:
a portion of the power path (fig 7j:108c; [para 0139]) passes past the lateral surface of the integrated circuit layer (fig 7j:143c; [para 0139]),
Claim(s) 18, 19, and 20 is/are rejected under 35 U.S.C. 102a2 as being anticipated by Tong (US 2024/0128208)
Regarding claim 18.
Tong teaches:
An electronic device, comprising: an electronic component (fig 7j:142f; [para 0139]) having a lateral side, an integrated circuit layer (fig 7j:143c; [para 0139]) and a power delivery network (PDN) (fig 7j:108c; [para 0139]) disposed over the integrated circuit layer (fig 7j:143c; [para 0139]), wherein a portion (fig 7j:212; [para 0141]) of the PDN (fig 7j:108c; [para 0139]) is exposed by the lateral side and is configured to receive a power ([para 0077]).
Regarding claim 19.
Tong teaches the electronic device of claim 18, further
Tong teaches:
the PDN (fig 7j:108c; [para 0139]) comprises a conductive via (fig 7j:214; [para 0143]) exposed by the lateral side of the electronic component (fig 7j:142f; [para 0139]).
Regarding claim 20.
Tong teaches the electronic device of claim 18, further
Tong teaches:
a power supply element (fig 7j:118a; [para 0139]) disposed adjacent to the electronic component (fig 7j:142f; [para 0139]); and an electrical contact ([para 0141]) configured to bridge the power between the power supply element (fig 7j:118a; [para 0139]) and the PDN (fig 7j:108c; [para 0139]) of the electronic component (fig 7j:142f; [para 0139]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized and struck through claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lv (US 2024/0055420) as applied to claim 8 and further in view of Lv (US 2024/0055399).
Regarding claim 9.
Lv (420) teaches the electronic device of claim 8, above
Lv (420) does not teach a portion of the electrical contact protrudes over an upper surface of the electronic component and an upper surface of the conductive structure.
Lv (399) teaches:
a portion of the electrical contact (fig 5:81; [para 0054]) protrudes over an upper surface of the electronic component (fig 2:10a; [para 0051]) and an upper surface of the conductive structure (fig 5:83; [para 0036]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a contact that protrudes over the structure because it is simpler to lead out the power supply wiring layer from the upper side of the storage module, and the conductive parts can be flexibly disposed (paragraph 28).
Regarding claim 10.
Lv (420) in view of Lv (399) teaches the electronic device of claim 9, further
Lv (399) teaches:
the portion of the electrical contact (fig 5:81; [para 0054]) covers the upper surface of the electronic component (fig 2:10a; [para 0051]) and the upper surface of the conductive structure (fig 5:83; [para 0036]).
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lv (US 2024/0055420) as applied to claim 7 and further in view of Tong (US 2024/0128208).
Regarding claim 11.
Lv teaches the electronic device of claim 7, above.
Lv teaches:
, a cavity disposed between the electronic component (fig 5f:301,302; [para 0042]) and the conductive structure (fig 5f:40; [para 0081]) and accommodating the electrical contact (fig 5f:32; [para 0081]).
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Lv does not teach encapsulation.
Tong teaches:
an encapsulant encapsulating ([para 0076,0135]) the electronic component (fig 7j:142f; [para 0139]) and the conductive structure (fig 7j:118a; [para 0139]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to encapsulate the components in encapsulant in order to support, protect, and insulate the conductive components for processing and mounting.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID J GOODWIN whose telephone number is (571)272-8451. The examiner can normally be reached Monday - Friday, 11:00 - 19:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571)272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/D.J.G/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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